hdsl_drv.h

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/*
 *  Copyright (C) 2021-2023 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
#ifndef HDSL_DRV_H_
#define HDSL_DRV_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include <stdio.h>
#include <stdlib.h>
 
#include <kernel/dpl/DebugP.h>
 
#include <drivers/pruicss.h>
#include <drivers/hw_include/cslr_soc.h>
#include <drivers/hw_include/hw_types.h>
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */
 
#define MAX_WAIT 20000
 
#define HDSL_ICSSG0_INST        0U
#define HDSL_ICSSG1_INST        1U
 
#define HWREG(x)                                                               \
        (*((volatile uint32_t *)(x)))
#define HWREGB(x)                                                              \
        (*((volatile uint8_t *)(x)))
#define HWREGH(x)                                                              \
        (*((volatile uint16_t *)(x)))
/*TSR configuration:*/
 
/*inEvent value:*/
/* ICSSG_0_EDC1_SYNC0 ICSSG0 IEP1 sync event 0 Pulse */
#define SYNCEVENT_INTRTR_IN_27 27
 
/*outEvent values:*/
/*SYNC0_OUT Pin Selectable timesync event 24 Edge (4+(24*4)) */
#define SYNCEVT_RTR_SYNC28_EVT 0x64
/* SYNC1_OUT Pin Selectable timesync event 25 Edge (4+(25*4)) */
#define SYNCEVT_RTR_SYNC29_EVT 0x68
/* SYNC2_OUT Pin Selectable timesync event 26 Edge (4+(26*4)) */
#define SYNCEVT_RTR_SYNC30_EVT 0x6C
/* SYNC3_OUT Pin Selectable timesync event 27 Edge (4+(27*4)) */
#define SYNCEVT_RTR_SYNC31_EVT 0x70
/* ICSSG0_PR1_EDC1_LATCH0_IN PRU_ICSSG0 (4+(10*4)) */
#define SYNCEVT_RTR_SYNC10_EVT 0x2C
 
enum {
    MENU_SAFE_POSITION,
    MENU_QUALITY_MONITORING,
    MENU_EVENTS,
    MENU_SUMMARY,
    MENU_ACC_ERR_CNT,
    MENU_RSSI,
    MENU_PC_SHORT_MSG_WRITE,
    MENU_PC_SHORT_MSG_READ,
    MENU_PC_LONG_MSG_WRITE,
    MENU_HDSL_REG_INTO_DDR,
    MENU_HDSL_REG_INTO_DDR_GPIO,
    MENU_DIRECT_READ_RID0_LENGTH8,
    MENU_DIRECT_READ_RID81_LENGTH8,
    MENU_DIRECT_READ_RID81_LENGTH2,
    MENU_INDIRECT_WRITE_RID0_LENGTH8_OFFSET0,
    MENU_INDIRECT_WRITE_RID0_LENGTH8,
    MENU_DIRECT_READ_RID0_LENGTH8_OFFSET6,
    MENU_LIMIT,
    MENU_INVALID,
};
 
typedef struct HDSL_Config_s         *HDSL_Handle;
 
/* ========================================================================== */
/*                  Structure Declarations & Definitions                      */
/* ========================================================================== */
 
typedef struct {
    volatile uint8_t SYS_CTRL;    
    volatile uint8_t SYNC_CTRL;   
    volatile uint8_t resvd0;      
    volatile uint8_t MASTER_QM;   
    volatile uint8_t EVENT_H;     
    volatile uint8_t EVENT_L;     
    volatile uint8_t MASK_H;      
    volatile uint8_t MASK_L;      
    volatile uint8_t MASK_SUM;    
    volatile uint8_t EDGES;       
    volatile uint8_t DELAY;       
    volatile uint8_t VERSION;     
    volatile uint8_t resvd1;      
    volatile uint8_t ENC_ID2;     
    volatile uint8_t ENC_ID1;     
    volatile uint8_t ENC_ID0;     
    volatile uint8_t POS4;        
    volatile uint8_t POS3;        
    volatile uint8_t POS2;        
    volatile uint8_t POS1;        
    volatile uint8_t POS0;        
    volatile uint8_t VEL2;        
    volatile uint8_t VEL1;        
    volatile uint8_t VEL0;        
    volatile uint8_t resvd2;      
    volatile uint8_t VPOS4;       
    volatile uint8_t VPOS3;       
    volatile uint8_t VPOS2;       
    volatile uint8_t VPOS1;       
    volatile uint8_t VPOS0;       
    volatile uint8_t VPOSCRC_H;   
    volatile uint8_t VPOSCRC_L;   
    volatile uint8_t PC_BUFFER0;  
    volatile uint8_t PC_BUFFER1;  
    volatile uint8_t PC_BUFFER2;  
    volatile uint8_t PC_BUFFER3;  
    volatile uint8_t PC_BUFFER4;  
    volatile uint8_t PC_BUFFER5;  
    volatile uint8_t PC_BUFFER6;  
    volatile uint8_t PC_BUFFER7;  
    volatile uint8_t PC_ADD_H;    
    volatile uint8_t PC_ADD_L;    
    volatile uint8_t PC_OFF_H;    
    volatile uint8_t PC_OFF_L;    
    volatile uint8_t PC_CTRL;     
    volatile uint8_t PIPE_S;      
    volatile uint8_t PIPE_D;      
    volatile uint8_t PC_DATA;     
    volatile uint8_t resvd3;      
    volatile uint8_t resvd4;      
    volatile uint8_t resvd5;      
    volatile uint8_t resvd6;      
    volatile uint8_t resvd7;      
    volatile uint8_t resvd8;      
    volatile uint8_t SAFE_SUM;    
    volatile uint8_t S_PC_DATA;   
    volatile uint8_t ACC_ERR_CNT; 
    volatile uint8_t MAXACC;      
    volatile uint8_t MAXDEV_H;    
    volatile uint8_t MAXDEV_L;    
    volatile uint8_t resvd9;     
    volatile uint8_t EVENT_S;     
    volatile uint8_t resvd10;     
    volatile uint8_t DUMMY;       
    volatile uint8_t SLAVE_REG_CTRL;    
    volatile uint8_t ACC_ERR_CNT_THRES; 
    volatile uint8_t MAXDEV_H_THRES;    
    volatile uint8_t MAXDEV_L_THRES;    
    /*Safe 2 Interface */
    volatile uint8_t version;
    volatile uint8_t ENC2_ID;
    volatile uint8_t STATUS2;
    volatile uint8_t VPOS24;
    volatile uint8_t VPOS23;
    volatile uint8_t VPOS22;
    volatile uint8_t VPOS21;
    volatile uint8_t VPOS20;
    volatile uint8_t VPOSCRC2_H;
    volatile uint8_t VPOSCRC2_L;
    volatile uint8_t DUMMY2;
    /* Online Status*/
    volatile uint16_t ONLINE_STATUS_D;
    volatile uint16_t ONLINE_STATUS_1;
    volatile uint16_t ONLINE_STATUS_2;
} HDSL_Interface;
typedef struct HDSL_Config_s {
    PRUICSS_Handle icssgHandle;
    uint32_t icssCore;
    uint32_t *baseMemAddr; // icssgHandle->hwAttrs->baseAddr + PRUICSS_DATARAM(PRUICSS_PRUx)
    HDSL_Interface *hdslInterface;
    uint32_t multi_turn;
    uint32_t res;
    uint64_t mask;
    // intc_initdata // ** - needs to be common for all channels and fixed (configure for all 3 channels in starting)
 
} HDSL_Config;
/* ========================================================================== */
/*                       Function Declarations                                */
/* ========================================================================== */
void hdsl_enable_load_share_mode(void *gPru_cfg ,uint32_t  PRU_SLICE);
// HDSL_ICSSG0_INST, HDSL_ICSSG1_INST
HDSL_Handle HDSL_open(PRUICSS_Handle icssgHandle, uint32_t icssCore,uint8_t PRU_mode);
 
void HDSL_iep_init(HDSL_Handle hdslHandle);
 
int HDSL_enable_sync_signal(uint8_t ES, uint32_t period);
 
uint64_t HDSL_get_pos(HDSL_Handle hdslHandle, int position_id);
 
uint8_t HDSL_get_qm(HDSL_Handle hdslHandle);
 
uint16_t HDSL_get_events(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_safe_events(HDSL_Handle hdslHandle);
 
 
uint16_t HDSL_get_online_status_d(HDSL_Handle hdslHandle);
 
uint16_t HDSL_get_online_status_1(HDSL_Handle hdslHandle);
 
uint16_t HDSL_get_online_status_2(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_sum(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_acc_err_cnt(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_rssi(HDSL_Handle hdslHandle);
 
int32_t HDSL_write_pc_short_msg(HDSL_Handle hdslHandle,uint8_t addr, uint8_t data, uint64_t timeout);
 
int32_t HDSL_read_pc_short_msg(HDSL_Handle hdslHandle,uint8_t addr, uint8_t *data, uint64_t timeout);
 
void HDSL_set_pc_addr(HDSL_Handle hdslHandle, uint8_t pc_addrh, uint8_t pc_addrl, uint8_t pc_offh, uint8_t pc_offl);
 
void HDSL_set_pc_ctrl(HDSL_Handle hdslHandle, uint8_t value);
 
void HDSL_write_pc_buffer(HDSL_Handle hdslHandle, uint8_t pc_buf0, uint8_t pc_buf1, uint8_t pc_buf2, uint8_t pc_buf3, uint8_t pc_buf4, uint8_t pc_buf5, uint8_t pc_buf6, uint8_t pc_buf7);
 
uint8_t HDSL_read_pc_buffer(HDSL_Handle hdslHandle, uint8_t buff_off);
 
uint8_t HDSL_get_sync_ctrl(HDSL_Handle hdslHandle);
 
void HDSL_set_sync_ctrl(HDSL_Handle hdslHandle, uint8_t val);
 
uint8_t HDSL_get_master_qm(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_edges(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_delay(HDSL_Handle hdslHandle);
 
uint8_t HDSL_get_enc_id(HDSL_Handle hdslHandle, int byte);
 
void HDSL_generate_memory_image(HDSL_Handle hdslHandle);
 
void* HDSL_get_src_loc(HDSL_Handle hdslHandle);
 
uint32_t HDSL_get_length(HDSL_Handle hdslHandle);
 
#ifdef __cplusplus
}
#endif
 
#endif