| OS | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
| FreeRTOS Kernel | R5F, M4F, A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | Only single core A53 FreeRTOS is supported. Second core is NOT used. |
| FreeRTOS SMP Kernel | A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | - |
| FreeRTOS POSIX | R5F, M4F, A53 | NA | pthread, mqueue, semaphore, clock | - |
| NO RTOS | R5F, M4F, A53 | NA | See Driver Porting Layer (DPL) below | Only single core A53 NORTOS is supported. Second core is NOT used. |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Address Translate | M4F | YES | FreeRTOS, NORTOS | Use RAT to allow M4F access to peripheral address space | - |
| Cache | R5F, A53 | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is running | - |
| CycleCounter | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
| MPU | R5F, M4F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| MMU | A53 | YES | NORTOS | Setup MMU and control access to address space | - |
| Semaphore | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F, M4F, A53 | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Event | R5F, M4F | YES | FreeRTOS | Setting, getting, clearing, and waiting of Event bits | - |
| Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | No | Single conversion (one-shot mode), interrupt mode, DMA mode | Continuous conversion not tested |
| CRC | R5F | YES | No | CRC in full CPU mode | - |
| DDR | R5F | YES | No | Tested LPDDR4 at 400MHz frequency. | - |
| ECAP | R5F | YES | No | Frequency, Duty cycle, interrupt mode | PWM mode not tested |
| EPWM | R5F | YES | No | Different Frequency, Duty cycle, interrupt mode, Deadband and chopper module | Tripzone module not tested |
| EQEP | R5F | YES | No | Signal Frequency and Direction, interrupt mode | - |
| FSI (RX/TX) | R5F | YES | No | RX, TX, polling, interrupt mode, single/dual lanes | - |
| GPIO | R5F, M4F, A53 | YES | No | Basic input/output, GPIO as interrupt | GPIO as interrupt is not tested for A53. |
| GTC | R5F, A53 | NA | No | Enable GTC, setting FID (Frequency indicator) | - |
| I2C | R5F, M4F, A53 | YES | No | Controller mode, basic read/write, polling and interrupt mode | Target mode not supported. M4F not tested due to EVM limitation |
| IPC Notify | R5F, M4F, A53 | YES | No | Low latency IPC between RTOS/NORTOS CPUs | - |
| IPC Rpmsg | R5F, M4F, A53 | YES | No | RPMessage protocol based IPC for all R5F, M4F, A53 running NORTOS/FreeRTOS/Linux | - |
| MCAN | R5F | YES | No | RX, TX, interrupt and polling mode | - |
| MCSPI | R5F, M4F | YES | Yes | Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode | - |
| MDIO | R5F | NA | No | Register read/write, link status and link interrupt enable API | - |
| MMCSD | R5F | YES | Yes | Raw read/write and file I/O on MMCSD0 eMMC, and MMCSD1 SD. eMMC tested till HS SDR mode (8-bit data, 52 MHz), SD tested till SD HS mode (4-bit, 25 MHz) | Interrupt mode not tested |
| OSPI | R5F | YES | Yes | Read direct, Write indirect, Read/Write commands, DMA for read, PHY Mode | Interrupt mode not supported |
| PCIe | R5F | YES | No | Buffer Transfer between EP and RC modes. Legacy interrupt | MSI and MSIx capability |
| Pinmux | R5F, M4F, A53 | YES | No | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | No | Tested with Ethercat, EtherNet/IP, IO-Link, ICSS-EMAC, HDSL, EnDat | - |
| SOC | R5F, M4F, A53 | YES | No | lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency, SW Warm/POR Reset, Address Translation | - |
| Sciclient | R5F, M4F, A53 | YES | No | Tested with clock setup, module on/off | - |
| SPINLOCK | R5F, M4F, A53 | NA | No | Lock, unlock HW spinlocks | - |
| UART | R5F, M4F, A53 | YES | Yes | Basic read/write, polling, interrupt mode, | HW flow control not tested. DMA mode not supported |
| UDMA | R5F, A53 | YES | Yes | Basic memory copy, SW trigger, Chaining | - |
| WDT | R5F, A53 | YES | No | Interrupt after watchdog expiry | Reset not supported |
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| LwIP | R5F | YES | FreeRTOS | TCP/UDP IP networking stack with and without checksum offload enabled, DHCP, ping, TCP iperf, TCP/UDP IP | Other LwIP features, performance and memory optimizations pending, more robustness tests pending, checksum offload with VLAN_Tag |
| Ethernet driver (ENET) | R5F | YES | FreeRTOS | Ethernet as port using CPSW and ICSS, Layer 2 MAC, Layer 2 PTP Timestamping, CPSW Switch, Policer, MDIO Manual Mode, independent ICSSG and CPSW drivers execution on different R5 cores | Independent ICSSG and CPSW drivers execution on same R5 cores not supported |
| ICSS-EMAC | R5F | YES | FreeRTOS | Tested switch mode with ethernetip_adapter_demo and hsr_prp_demo examples | EMAC mode, VLAN/Multicast Filtering |
| ICSS TimeSync | R5F | NO | FreeRTOS | Tested E2E mode with ethernetip_adapter_demo examples | P2P mode, Transparent Clock mode |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-1016 | Semaphore does not function as expected when "post" call is present in multiple ISRs at different priorities | DPL | 7.3.0 onwards | AM64x, AM243x | Fixed |
| MCUSDK-2453 | R5 - Init code crashes under certain conditions | DPL | 8.1.0 onwards | AM64x, AM243x | Fixed |
| MCUSDK-3797 | Fix for enabling –rom_model linker optiom | DPL | 08.01.00 onwards | AM64x, AM243x | Fixed |
| MCUSDK-8421 | SYSCONIFG version 1.13 does wrong event assignment to INTC in ICSS_G | ICSSG | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8423 | [enet] MDIO manual mode delay implementation is incorrect | Enet | 08.04.00 onwards | AM64x, AM243x | Fixed |
| MCUSDK-8439 | SBL Null boot flow gel instruction are missing | Docs | 08.04.00 onwards | AM64x, AM243x | Fixed |
| MCUSDK-8440 | Number of mac address available in eeprom is not being properly read on UDMA platforms | Common | 08.04.00 onwards | AM64x, AM243x | Fixed |
| MCUSDK-8494 | load_dmsc_hsfs script is not working as expected | Common | 08.04.00 onwards | AM64x, AM243x | Fixed |
| MCUSDK-8516 | LwIP TCPClient example is not getting IP address on LP | Enet | 08.04.00 onwards | AM243x | Fixed |
| MCUSDK-8528 | OSPI_NOR_PROTOCOL: the arguments "data" and "addr" seem to be reversed | OSPI | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8531 | HDSL: DDR trace is logging 9 frames instead of 8 | HDSL | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8575 | Motor Control: EnDat: PRU Core Clock is fixed to 300 MHz in SysConfig | ENDAT | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8616 | Changing RGMII mode in CPSW lwip example leads to assert | Enet | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8669 | Motor Control: EnDat: Valid Rx bit wait in multi-channel receive is done for all 3 channels instead of active channels | ENDAT | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8679 | SCIClient CCS init application doesn't initialize other R5 cores | SCIClient | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8699 | OSPI driver function OSPI_norFlashReadId() returning wrong ID | OSPI | 08.04.00 onwards | AM243x, AM64x | Fixed |
| MCUSDK-8748 | multiCoreImageGen.js: Generated linux.appimage file size larger than expected | Common | 08.04.00 onwards | AM64x | Fixed |
| MCUSDK-8835 | MMC0 should not be default setup, as for AM243x-ALX package the MMC1 is only available | MMCSD | 08.04.00 onwards | AM243x | Fixed |
| MCUSDK-8838 | Flash open takes long time to finish when invoked from application on AM243x LP | Common | 08.04.00 onwards | AM243x | Fixed |
| MCUSDK-8951 | Load DMSC js scripts point to incorrect default SDK path | Common | 08.04.00 onwards | AM243x, AM64x | Fixed |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Workaround |
| MCUSDK-626 | DMA not working with ADC FIFO 1 | ADC | 7.3.0 onwards | AM64x, AM243x | Use ADC FIFO 0 |
| MCUSDK-1900 | UART Hardware Flow Control is not working | UART | 7.3.0 onwards | AM243x | - |
| MCUSDK-2113 | [Docs] Sysfw RM/PM documentation doesn't specify AM243x | Docs | 8.0.0 onwards | AM243x | - |
| MCUSDK-2319 | 2 PRU(ICSS) driver instances are added while changing Enet ICSSG instance to ICSSG0 in SysConfig | SYSCFG | 8.1.0 onwards | AM64x, AM243x | Please remove the extra one manually |
| MCUSDK-2419 | MCSPI TX Only mode is not functional in DMA mode | MCSPI, UDMA | 8.2.0 onwards | AM64x, AM243x | Use TX/RX mode and ignore RX. |
| MCUSDK-2512 | [UART]Driver always assumes functional clock as 48 MHz | UART | 8.3.0 onwards | AM64x, AM243x | - |
| MCUSDK-2715 | PKA ECDSA sign verify is not working for P-521 and BrainPool P-512R1 curves | SECURITY | 8.2.0 onwards | AM64x, AM243x | - |
| MCUSDK-3626 | Enet: Phy tuning is not done correctly on AM64x/AM243x and AM263x platforms | Enet | 8.1.0 onwards | AM64x, AM243x | PHY delay is not tuned but set to value based on limited testing on a small set of boards.If packet drops are still seen, we can force the phy to set to 100mbps.Make below change in application code: linkCfg->speed = ENET_SPEED_100MBIT; linkCfg->duplexity = ENET_DUPLEX_FULL; |
| MCUSDK-4379 | Low Tx side throughput seen when tested using iperf application | HSR-PRP | 8.3.0 | AM64x, AM243x |
Replace mcu_plus_sdk\source\networking\lwip\lwip-config\am64x\lwipopts.h and mcu_plus_sdk\source\networking\lwip\lwip-config\am64x\lwippools.h from MCU PLUS SDK 8.2.0 release and rebuild lwip_freertos, lwip-contrib and icss_emac_lwip_if libraries.
|
| MCUSDK-4527 | USB recognition error occurs when USB conncect/disconnect executed repeatedly | SBL Linux | 8.2.0 | AM64x, AM243x | - |
| MCUSDK-4575 | ENET LWIP ICSSG Switch mode External Phy management is not functional when 2 ports are enabled | ICSSG, Enet | 8.3.0 | AM64x, AM243x | - |
| MCUSDK-6262 | [AM243X] : MMCSD read io example is not functional on eMMC if the APP_MMCSD_START_BLK is changed for MMCSD_write and MMCSD_read | MMCSD | 8.3.0 owards | AM243x, AM64x | - |
| MCUSDK-6318 | Enet icssg - dhcp functionality unstable | Enet, ICSS | 8.3.0 | AM243x | - |
| MCUSDK-7905 | EtherNet/IP : MDIO access can have race condition due to two parallel PHY drivers | Ethernet/IP Adapter | 8.3.0 | AM64x | - |
| MCUSDK-8106 | 8MHZ endat encoder showing CRC failure | ENDAT | 8.4.0 | AM64x | - |
| MCUSDK-8108 | EtherNet/IP : PTP Device is unable to keep offset under 1000 ns | Ethernet/IP Adapter | 8.4.0 | AM64x, AM243x | Value of OFFSET_THRESHOLD_FOR_RESET is set to 10000 ns by default in SDK. |
| MCUSDK-8234 | HSR/PRP - PTP Device is unable to keep offset under 1000 ns | HSR-PRP | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8236 | HSR/PRP is not functional in rgmii mode | HSR-PRP | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8239 | EtherNet/IP : MDIO Manual Mode is not supported | Ethernet/IP Adapter | 8.4.0 | AM64x, AM243x | MDIO Manual Mode is the work-around for issue "i2329 - MDIO: MDIO interface corruption (CPSW and PRU-ICSS)" (described in AM64x/AM243x Processor Silicon Revision 1.0, 2.0 (Rev. E)) |
| MCUSDK-8242 | EtherCAT : MDIO Manual Mode is not supported in ethercat_slave_demo examples | EtherCAT SubDevice | 8.4.0 | AM64x, AM243x | MDIO Manual Mode is the work-around for issue "i2329 - MDIO: MDIO interface corruption (CPSW and PRU-ICSS)" (described in AM64x/AM243x Processor Silicon Revision 1.0, 2.0 (Rev. E)). Please note that the work-around is available for ethercat_slave_beckhoff_ssc_demo examples. |
| MCUSDK-8243 | EtherNet/IP : Examples do not work on HS-FS devices | Ethernet/IP Adapter | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8376 | LWIP web server application crashes in server stress test | Enet, LWIP | 8.3.0 onwards | AM64x, AM243x | - |
| MCUSDK-8383 | Load from JSON feature fails in SysConfig in Windows PC | Flash | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8403 | 1000000(1MHz) baud rate not working on UART | UART | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8413 | ICSSG: Disabling MDIO manual mode with board phy config cause failure | ICSSG | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8414 | SBL UART Uniflash: OSPI fails to boot application image with size > 1MB | OSPI, Flash | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8490 | HSR/PRP nodeTable semaphore causing a deadlock | HSR_PRP | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8564 | SysConfig Code generation error with basic PRU config on ICSS_G0 and ICSS_G1 | ICSSG | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8721 | Function for setting ICSSG SD/ENDAT alternate pin mux mode not working in all cases | ICSSG | 8.4.0 | AM64x, AM243x | - |
| MCUSDK-8842 | OSPI Writes fail with multi threaded applications | OSPI | 8.4.0 | AM64x, AM243x | - |
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
1.8.20