AM64x MCU+ SDK  08.05.00
SDL DCC Example

Introduction

This example demonstrates how to configure the DCC and use it to monitor clocks in the two supported modes (continuous and single-shot modes). It also demonstrates how to receive errors generated by DCC in the MCU and Main domain.

This example displays:

* Initializing the ESM to detect the DCC error event(s)
* Registration of application callback for notification of ESM error events for the MCU ESM instance
* Configuration of one MCU DCC instance to monitor a single clock in continuous mode
* Forcing of an error to create a DCC error event

The following methods can be used as a trigger for the DCC error event:

* Change ratio criterion for stable clocks
* Use Sciclient API to change clock dividers (with ratio criterion stable) to speed up clock
* Use Sciclient API to change clock dividers (with ratio criterion stable) to slow down clock
* Turn off power for the monitored input clock

Use Cases

Use Case Reference Clock Description
UC-1 RC OSC Configuration of MCU DCC instance in continuous mode and error event is forced
UC-2 RC OSC Configuration of MCU DCC instance in single-shot mode and completion with no errors
UC-3 HFOSC0 Configuration of MCU DCC instance in continuous mode and error event is forced
UC-4 HFOSC0 Configuration of MCU DCC instance in single-shot mode and completion with no errors
UC-5 RC OSC Configuration of DCC instance in continuous mode and error event is forced
UC-6 HFOSC0 Configuration of DCC instance in continuous mode and error event is forced
UC-7 RC OSC Configuration of DCC instance in continuous mode and completion with no errors
UC-8 HFOSC0 Configuration of MCU DCC instance in continuous mode and completion with no errors

Supported Combinations

Parameter Value
CPU + OS m4fss0-0 nortos
Toolchain ti-arm-clang
Board am64x-evm
Example folder examples/sdl/dcc/dcc_app/

Steps to Run the Example

See Also

DCC

Sample Output

Shown below is a sample output when the application is run,