AM64x MCU+ SDK  08.02.00
Linker Command File Migration Guide

This section describes the differences between linker command file syntax of MCU+ SDK and Processor SDK RTOS (PDK). This can be used as a migration aid when moving from Processor SDK RTOS (PDK) to MCU+ SDK. Compiler used in MCU+ SDK is TIARMCLANG.

API changes

To a large extent, linker command files for ARM applications that manage the placement of code and data generated by the armcl compiler will also work with object files that are generated by the tiarmclang compiler. However, below table mentions few adjustments that are needed to make your linker command file tiarmclang supportive. It also lists down the sections which are no longer required in MCU+ SDK.

PDK(ARMCL) MCU+ SDK(TIARMCLANG) Remarks
.bootCode None No longer required in MCU+ SDK.
.startupCode None No longer required in MCU+ SDK.
.startupData None No longer required in MCU+ SDK.
.intvecs None No longer required in MCU+ SDK.
.intc_text None No longer required in MCU+ SDK.
.rstvectors .vectors
–entry_point=_resetvectors e_vectors R5F entry point and vector table
.const .rodata

Important Notes

  • In MCU+ SDK, R5F entry point, vector table, MUST be placed at 0x0 other than SBL
  • User ISR code get called in context of SVC stack, so size of SVC stack MUST be kept large enough to handle worst case ISR requirement.
  • The IRQ stack size itself can be kept small since it only saves few bytes (8 bytes) of state for every nested IRQ invocation.
  • SDK default examples keep IRQ stack as 256 bytes and SVC stack size as 4096 bytes.
  • This stack size is specified in the linker command file, a sample snippet is shown below,
    __IRQ_STACK_SIZE = 256;
    /* This is the size of stack when R5 is in IRQ mode
    * - In both NORTOS and FreeRTOS nesting is disabled for FIQ
    */
    __FIQ_STACK_SIZE = 256;
    __SVC_STACK_SIZE = 4096; /* This is the size of stack when R5 is in SVC mode */
    __ABORT_STACK_SIZE = 256; /* This is the size of stack when R5 is in ABORT mode */
    __UNDEFINED_STACK_SIZE = 256; /* This is the size of stack when R5 is in UNDEF mode */
  • R5F boot code until MPU is enabled, MUST be at a address < 0x80000000 i.e this cannot be placed in DDR
    GROUP {
    .text.hwi: palign(8)
    .text.cache: palign(8)
    .text.mpu: palign(8)
    .text.boot: palign(8)
    .text:abort: palign(8) /* this helps in loading symbols when using XIP mode */
    } > MSRAM
  • Below memory is reserved for DMSC usage. Security handoff is complete when this message is sent to the DMSC, TISCI_MSG_SEC_HANDOVER. This should be sent once all cores are loaded and all application specific firewall calls are setup.
    During Boot till security handoff is complete
    0x701E0000 - 0x701FFFFF (128KB)
    After "Security Handoff" is complete (i.e at run time)
    0x701FC000 - 0x701FFFFF (16KB)
  • Please refer section "Shared memory logging" in Debug on shared memory segments.

See Also