| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Address Translate | M4F | YES | FreeRTOS, NORTOS | Use RAT to allow M4F access to peripheral address space | - |
| Cache | R5F | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F, M4F | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CycleCounter | R5F, M4F | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F, M4F | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F, M4F | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F, M4F | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
| MPU | R5F, M4F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| Semaphore | R5F, M4F | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F, M4F | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F, M4F | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Event | R5F, M4F | YES | FreeRTOS | Setting, getting, clearing, and waiting of Event bits | - |
| Peripheral | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | Single conversion (one-shot mode), interrupt mode, DMA mode | Continuous conversion not tested |
| CRC | R5F | NO | Only compiled | Not tested |
| DDR | R5F | YES | Tested LPDDR4 at 400MHz frequency. | - |
| ECAP | R5F | YES | Frequency, Duty cycle, interrupt mode | PWM mode not tested |
| EPWM | R5F | YES | Different Frequency, Duty cycle, interrupt mode, Deadband and chopper module | Tripzone module not tested |
| EQEP | R5F | YES | Signal Frequency and Direction, interrupt mode | - |
| FSI (RX/TX) | R5F | YES | RX, TX, polling, interrupt mode, single/dual lanes | - |
| GPIO | R5F, M4F | YES | Basic input/output, GPIO as interrupt | - |
| I2C | R5F, M4F | YES | Master mode, basic read/write, polling and interrupt mode | Slave mode not supported. M4F not tested due to EVM limitation |
| IPC Notify | R5F, M4F | YES | Low latency IPC between RTOS/NORTOS CPUs | - |
| IPC Rpmsg | R5F | YES | RPMessage protocol based IPC, All R5F and Linux A53 cores | M4F core not supported |
| MCAN | R5F | YES | RX, TX, interrupt and polling mode | - |
| MCSPI | R5F, M4F | YES | Master/Slave mode, basic read/write, polling, interrupt mode | DMA mode not supported |
| MDIO | R5F | NA | Register read/write, link status and link interrupt enable API | - |
| OSPI | R5F | YES | Read direct, Write indirect, Read/Write commands, DMA for read, PHY Mode | Interrupt mode not supported |
| Pinmux | R5F, M4F | YES | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | Tested with Ethercat FW HAL, HDSL, EnDat | More protocols integration tests pending |
| SOC | R5F, M4F | YES | lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency | - |
| Sciclient | R5F, M4F | YES | Tested with clock setup, module on/off | - |
| SPINLOCK | R5F, M4F | NA | Lock, unlock HW spinlocks | - |
| UART | R5F, M4F | YES | Basic read/write, polling, interrupt mode, | HW flow control not tested. DMA mode not supported |
| UDMA | R5F | YES | Basic memory copy, SW trigger, Chaining | - |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-596 | Zero init of globals and static does not happen with current compiler and linker option | Common | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-627 | Bootloader: R5FSS0_0 ATCM is not enabled after NULL SBL boot | Bootloader | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-675 | XIP: OSPI @ 166Mhz with Phy enable and Phy pipeline enable and XIP does not work | Bootloader, XIP | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-648 | DLFO bit is set unconditionally during CacheP_init() for R5 Core | DPL | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-177 | DMTimer on M4F results in 2 interrupts instead of 1 for every DM timer expiry in release mode | DPL | 7.3.0 | AM64x, AM243x | Fixed |
| MCUSDK-795 | ClockP_usleep sleeps for more than the value passed | DPL | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-316 | ROV does not work with DDR being used in application | ROV | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-354 | EtherCAT State Machine from EtherCAT Conformance Test fails intermittently | EtherCAT | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-686 | Incorrect MAC is compared for processing PTP frames in EIP_processProtocolFrames | EtherNet/IP Adapter FW HAL | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-796 | bsp_pdi_write_indication not called after writing EEPROM Control/Status register write in bsp_init | EtherCAT Slave FW HAL | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-757 | Incorrect pin calculation in SysConfig generated code for I2C IO expander | LED | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| MCUSDK-781 | SysConfig for multiple GPIO LED instances generate same code | LED | 7.3.0, 7.3.1 | AM64x, AM243x | Fixed |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Workaround |
| MCUSDK-317 | OSPI: DMA reads fails after a flash write which was not block aligned | OSPI | 7.3.0 onwards | AM64x, AM243x | Use non-DMA read mode or use DMA mode but always write from start of a erased block |
| MCUSDK-683 | UDMA: DMA from SRAM to M4F IRAM/DRAM fails | UDMA, TIFS | 7.3.0 onwards | AM64x, AM243x | Don't use these memories for DMA transfer or perform manual copy |
| MCUSDK-867 | Rx is not selected in the pins for EtherCAT and Ethernet pinmux from SysConfig | EtherCAT Slave FW HAL, ICSS-EMAC | 7.3.0 onwards | AM64x, AM243x | Rx checkbox should to be selected manually |
| MCUSDK-750 | ICSS PRU GPIO pins are not supported by SYSCFG | SysCfg | 7.3.0 onwards | AM64x, AM243x | Perform manual pinmux |
| MCUSDK-906 | MCAN and ADC not functional in SBL UART bootmode with DDR enabled | Bootloader, DDR | 7.3.2 | AM64x, AM243x | Explicitly enable DDR in the application instead of SBL UART. |
| MCUSDK-892 | USB boot with SBL OSPI fails | USB | 7.3.2 | AM64x, AM243x | Use UART boot or CCS loading |
| MCUSDK-626 | DMA not working with ADC FIFO 1 | ADC | 7.3.0 onwards | AM64x, AM243x | Use ADC FIFO 0 |
| Module | Affected API | Change | Additional Remarks |
| EtherCAT Slave FWHAL | bsp_init | Added new parameter enhancedlink_enable in bsp_params | Provides flexibility to enable/disable enhanced link detection. |
| EtherNet/IP Adapter FW HAL | - | Added new parameter macId in EIP_DLRHandle structure | This field should be filled by the user before calling EIP_drvInit |
| EtherNet/IP Adapter FW HAL | - | cipSyncConfig_t structure inside eip_Config structure is allocated statically | - |
| ICSS-EMAC | - | Added phyToMacInterfaceMod and txInterruptEnable in ICSS_EMAC_Attrs | ICSS configuration is done for MII/RGMII based on the mode selected using phyToMacInterfaceMode. Task and interrupt for TX will be created only if txInterruptEnable is enabled. |
| ICSS-EMAC | ICSS_EMAC_Params_init | Moved macId from ICSS_EMAC_Attrs to ICSS_EMAC_Params | It provides flexibility to provide the mac address during run-time. |
| ICSS TimeSync | - | Added new parameter macId in TimeSync_ParamsHandle structure | This field should be filled by the user. |
| Module | Affected API | Change | Additional Remarks |
| OSPI | - | Removed parameters pageSize and blkSize from OSPI_Attrs structure and added new API OSPI_setDeviceSize to set this. This has to be called in respective flash driver's open to set this. | The parameters can't be assumed at the time of OSPI driver open, so this has to be set with the OSPI_setDeviceSize API. If not using OSPI APIs directly, this change can be ignored. This is already taken care in the provided flash drivers. |
| OSPI | - | Removed fields rdDummyClks and extRdDummyClks from OSPI_Attrs and rdStatusCmd from OSPI_Object as these are not used anymore | - |
| OSPI | - | Added support to set which type of command extension to be used in case of flashes with Octal DDR support. Can use the OSPI_setCmdExtType API in the respective flash driver's open to set this. | If not using OSPI APIs directly, this change can be ignored. This is already taken care in the provided flash drivers. |
| OSPI | Internal APIs in respective flash drivers were changed. | Revamped the OSPI_ReadCmdParams and OSPI_WriteCmdParams structure to separate cmd and address. Also added a new field numAddrBytes. | If not using OSPI APIs directly, this change can be ignored. This is already taken care in the provided flash drivers. |
| OSPI | - | Added new fields rdDataCapDelay, phyRdDataCapDelay, numAddrBytes and cmdExtType to OSPI_Object for book keeping. | These will be filled in the flash driver using APIs OSPI_setRdDataCaptureDelay, OSPI_setNumAddrBytes and OSPI_setCmdExtType. The phyRdDataCapDelay variable will be updated by the PHY tuning algorithm |
| OSPI | OSPI_setXferOpcode | OSPI_setXferOpcode API is changed to OSPI_setXferOpCodes. The parameter readStatusCmd has been removed from this API since it is no longer needed | -
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1.8.20