| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Address Translate | M4F | YES | FreeRTOS, NORTOS | Use RAT to allow M4F access to peripheral address space | - |
| Cache | R5F | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F, M4F | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CycleCounter | R5F, M4F | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F, M4F | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F, M4F | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F, M4F | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
| MPU | R5F, M4F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| Semaphore | R5F, M4F | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F, M4F | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F, M4F | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Peripheral | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | Single conversion (one-shot mode), interrupt mode, DMA mode | Continuous conversions |
| CRC | R5F | NO | Only compiled | Not tested |
| ECAP | R5F | NO | Only compiled | Not tested |
| EPWM | R5F | YES | Different Frequency, Duty cycle, interrupt mode, Deadband and chopper module | Tripzone module not tested |
| EQEP | R5F | NO | Only compiled | Not tested |
| FSI (RX/TX) | R5F | YES | RX, TX, polling, interrupt mode, single/dual lanes | - |
| GPIO | R5F, M4F | YES | Basic input/output, GPIO as interrupt | - |
| I2C | R5F, M4F | YES | Master mode, basic read/write, polling and interrupt mode | Slave mode. M4F not tested due to EVM limitation |
| IPC Notify | R5F, M4F | YES | Low latency IPC between RTOS/NORTOS CPUs | - |
| IPC Rpmsg | R5F | YES | RPMessage protocol based IPC, All R5F and Linux A53 cores | M4F core |
| MCAN | R5F | YES | RX, TX, interrupt and polling mode | - |
| MCSPI | R5F, M4F | YES | Master/Slave mode, basic read/write, polling, interrupt mode | DMA mode |
| MDIO | R5F | NA | Register read/write, link status and link interrupt enable API | - |
| OSPI | R5F | YES | Read direct, Write indirect, Read/Write commands, DMA for read | Interrupt mode |
| Pinmux | R5F, M4F | YES | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | Tested with Ethercat FW HAL, HDSL, EnDat | More protocols integration tests pending |
| SOC | R5F, M4F | YES | lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency | - |
| Sciclient | R5F, M4F | YES | Tested with clock setup, module on/off | - |
| SPINLOCK | R5F, M4F | NA | Lock, unlock HW spinlocks | - |
| UART | R5F, M4F | YES | Basic read/write, polling, interrupt mode, | HW flow control not tested, DMA mode not supported |
| UDMA | R5F | YES | Basic memory copy, SW trigger, Chaining | - |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-635 | HwiP_construct when compiled in release mode would reorder instruction such interrupt can get enabled before ISR is setup | DPL (No-RTOS and FreeRTOS) | 7.3.0 | AM64x | Fixed |
| MCUSDK-180 | Bootloader: Flash_Open and other APIs in SBL fail when the bootmode is OSPI | Bootloader | 7.3.0 | AM64x | Fixed |
| MCUSDK-636 | Incorrect Input FCLK leading to wrong SPI CLK output | McSPI | 7.3.0 | AM64x | Fixed. Input clock fixed to right frequency of 50 MHz from 48 MHz assumed earlier |
| MCUSDK-353 | ENDAT: EnDAT diagnostic does not support multi channel. | ENDAT | 7.3.0 | AM64x | Rejected. Setup issue. |
| MCUSDK-397 | Incorrect values for SYNC_PERMISSION_UPDATE_*_SIZE macros in EtherCAT FW HAL | EtherCAT Slave FW HAL | 7.3.0 | AM64x | Fixed the macro definitions. |
| MCUSDK-398 | HwiP_restore not called after HwiP_disable in bsp_send_command_to_firmware of EtherCAT | EtherCAT Slave FW HAL | 7.3.0 | AM64x | Fixed. This was applicable only if SUPPORT_CMDACK_POLL_MODE macro was enabled and ENABLE_PDI_TASK macro was disabled. |
| MCUSDK-399 | ICSS_EMAC_updatePhyStatus function fails if auto-negotiation is disabled | ICSS-EMAC | 7.3.0 | AM64x | Fixed by use of PHY Status register instead of auto-negotiation specific registers for checking speed and duplex configuration. |
| MCUSDK-633 | Statistics structure is needed for all ports in ICSS-EMAC | ICSS-EMAC | 7.3.0 | AM64x | Fixed by allocating the structure per port inside the ICSS-EMAC driver object. |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Workaround |
| MCUSDK-177 | DMTimer on M4F results in 2 interrupts instead of 1 for every DM timer expiry in release mode | DPL | 7.3.0 | AM64x, AM243x | Use ClockP module which uses SysTick M4 timer and this does not have any issues. |
| MCUSDK-316 | ROV does not work with DDR being used in application | FreeRTOS | 7.3.0 | AM64x, AM243x | ROV cannot be used when operating from DDR |
| MCUSDK-596 | Zero init of globals and static does not happen with current compiler and linker option | Common | 7.3.0, 7.3.1 | AM64x, AM243x | Explicitly initialize the required variables |
| MCUSDK-317 | OSPI: DMA reads fails after a flash write which was not block aligned | OSPI | 7.3.0 | AM64x, AM243x | Use non-DMA read mode or use DMA mode but always write from start of a erased block |
| MCUSDK-627 | R5FSS0_0 ATCM is not enabled after NULL SBL boot | Bootloader | 7.3.0, 7.3.1 | AM64x, AM243x | Enable ATCM in application |
| MCUSDK-626 | DMA not working with ADC FIFO 1 | ADC | 7.3.0, 7.3.1 | AM64x, AM243x | Use ADC FIFO 0 |
| MCUSDK-354 | EtherCAT State Machine from EtherCAT Conformance Test fails intermittently | EtherCAT | 7.3.0 | AM64x, AM243x | Use debug mode library for FreeRTOS. The makefile and projectspec for this example use debug mode library by default for all configurations |
1.8.20