|
AM62x MCU+ SDK
10.00.00
|
|
Go to the documentation of this file.
54 #ifndef RM_TISCI_UDMAP_H
55 #define RM_TISCI_UDMAP_H
70 #define TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERR_VALID ((uint32_t) 1u << 0u)
75 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VALID ((uint32_t) 1u << 1u)
80 #define TISCI_MSG_VALUE_RM_UDMAP_CH_CHAN_TYPE_VALID ((uint32_t) 1u << 2u)
85 #define TISCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_VALID ((uint32_t) 1u << 3u)
90 #define TISCI_MSG_VALUE_RM_UDMAP_CH_CQ_QNUM_VALID ((uint32_t) 1u << 4u)
95 #define TISCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_VALID ((uint32_t) 1u << 5u)
100 #define TISCI_MSG_VALUE_RM_UDMAP_CH_QOS_VALID ((uint32_t) 1u << 6u)
105 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_VALID ((uint32_t) 1u << 7u)
110 #define TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIORITY_VALID ((uint32_t) 1u << 8u)
115 #define TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_VALID ((uint32_t) 1u << 14U)
119 #define TISCI_MSG_VALUE_RM_UDMAP_EXTENDED_CH_TYPE_VALID ((uint32_t) 1u << 16U)
124 #define TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERROR_DISABLED (0u)
129 #define TISCI_MSG_VALUE_RM_UDMAP_CH_PAUSE_ON_ERROR_ENABLED (1u)
136 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_PHYS (0u)
143 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_INTERMEDIATE (1u)
150 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_VIRTUAL (2u)
157 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ATYPE_NON_COHERENT (3U)
165 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_PACKET (2u)
175 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_PACKET_SINGLE_BUF (3u)
182 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_DMA_REF (10u)
189 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_DMA_VAL (11u)
196 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_BLOCK_REF (12u)
203 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TYPE_3P_BLOCK_VAL (13u)
210 #define TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_HIGH (0u)
216 #define TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_MEDHIGH (1u)
222 #define TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_MEDLOW (2u)
228 #define TISCI_MSG_VALUE_RM_UDMAP_CH_SCHED_PRIOR_LOW (3u)
234 #define TISCI_MSG_VALUE_RM_UDMAP_CH_FETCH_SIZE_MAX (127u)
238 #define TISCI_MSG_VALUE_RM_UDMAP_QNUM_SUPPRESS (0xFFFFu)
243 #define TISCI_MSG_VALUE_RM_UDMAP_CH_PRIORITY_MAX (7u)
248 #define TISCI_MSG_VALUE_RM_UDMAP_CH_QOS_MAX (7u)
253 #define TISCI_MSG_VALUE_RM_UDMAP_CH_ORDER_ID_MAX (15u)
260 #define TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_64_BYTES (1U)
266 #define TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_128_BYTES (2U)
272 #define TISCI_MSG_VALUE_RM_UDMAP_CH_BURST_SIZE_256_BYTES (3U)
280 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_EINFO_VALID ((uint32_t) 1U << 9U)
285 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TX_FILT_PSWORDS_VALID ((uint32_t) 1U << 10U)
290 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TX_SUPR_TDPKT_VALID ((uint32_t) 1U << 11U)
295 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TX_CREDIT_COUNT_VALID ((uint32_t) 1U << 12U)
300 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TX_FDEPTH_VALID ((uint32_t) 1U << 13U)
305 #define TISCI_MSG_VALUE_RM_UDMAP_CH_TX_TDTYPE_VALID ((uint32_t) 1U << 15U)
311 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_EINFO_DISABLED (0u)
316 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_EINFO_ENABLED (1u)
321 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_PSWORDS_DISABLED (0u)
326 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_FILT_PSWORDS_ENABLED (1u)
330 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_SUPPRESS_TD_DISABLED (0u)
334 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_SUPPRESS_TD_ENABLED (1u)
339 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_CREDIT_CNT_MAX (7u)
344 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_TDTYPE_IMMEDIATE (0U)
349 #define TISCI_MSG_VALUE_RM_UDMAP_TX_CH_TDTYPE_WAIT (1U)
357 #define TISCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_START_VALID ((uint32_t) 1u << 9u)
362 #define TISCI_MSG_VALUE_RM_UDMAP_CH_RX_FLOWID_CNT_VALID ((uint32_t) 1u << 10u)
367 #define TISCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_SHORT_VALID ((uint32_t) 1u << 11u)
372 #define TISCI_MSG_VALUE_RM_UDMAP_CH_RX_IGNORE_LONG_VALID ((uint32_t) 1u << 12u)
380 #define TISCI_MSG_VALUE_RM_UDMAP_RX_CH_PACKET_EXCEPTION (0u)
387 #define TISCI_MSG_VALUE_RM_UDMAP_RX_CH_PACKET_IGNORED (1u)
393 #define TISCI_MSG_VALUE_RM_UDMAP_RX_CH_FLOW_CNT_NONE (0u)
401 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_EINFO_PRESENT_VALID ((uint32_t) 1u << 0u)
406 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_PSINFO_PRESENT_VALID ((uint32_t) 1u << 1u)
411 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_ERROR_HANDLING_VALID ((uint32_t) 1u << 2u)
416 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DESC_TYPE_VALID ((uint32_t) 1u << 3u)
421 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SOP_OFFSET_VALID ((uint32_t) 1u << 4u)
426 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_QNUM_VALID ((uint32_t) 1u << 5u)
431 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_VALID ((uint32_t) 1u << 6u)
436 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_VALID ((uint32_t) 1u << 7u)
441 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_VALID ((uint32_t) 1u << 8u)
446 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_VALID ((uint32_t) 1u << 9u)
451 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_HI_SEL_VALID ((uint32_t) 1u << 10u)
456 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SRC_TAG_LO_SEL_VALID ((uint32_t) 1u << 11u)
461 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_HI_SEL_VALID ((uint32_t) 1u << 12u)
466 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DEST_TAG_LO_SEL_VALID ((uint32_t) 1u << 13u)
471 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ0_QNUM_VALID ((uint32_t) 1u << 14u)
476 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ1_QNUM_VALID ((uint32_t) 1u << 15u)
481 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ2_QNUM_VALID ((uint32_t) 1u << 16u)
486 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ3_QNUM_VALID ((uint32_t) 1u << 17u)
491 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_PS_LOCATION_VALID ((uint32_t) 1u << 18u)
497 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SIZE_THRESH0_VALID ((uint32_t) 1u << 0u)
502 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SIZE_THRESH1_VALID ((uint32_t) 1u << 1u)
507 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SIZE_THRESH2_VALID ((uint32_t) 1u << 2u)
512 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ1_QNUM_VALID ((uint32_t) 1u << 3u)
517 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ2_QNUM_VALID ((uint32_t) 1u << 4u)
522 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_FDQ0_SZ3_QNUM_VALID ((uint32_t) 1u << 5u)
527 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_SIZE_THRESH_EN_VALID ((uint32_t) 1u << 6u)
534 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_EINFO_NOT_PRESENT (0u)
540 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_EINFO_PRESENT (1u)
546 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PSINFO_NOT_PRESENT (0u)
552 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PSINFO_PRESENT (1u)
557 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_ERR_DROP (0u)
562 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_ERR_RETRY (1u)
568 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PS_END_PD (0u)
574 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_PS_BEGIN_DB (1u)
580 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DESC_HOST (0u)
585 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DESC_MONO (2u)
592 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SRC_SELECT_NONE (0u)
601 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SRC_SELECT_CFG_TAG (1u)
608 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SRC_SELECT_FLOW_ID (2u)
615 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SRC_SELECT_SRC_TAG (4u)
622 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DEST_SELECT_NONE (0u)
630 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DEST_SELECT_CFG_TAG (1u)
637 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DEST_SELECT_FLOW_ID (2u)
644 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DEST_SELECT_DEST_TAG_LO (4u)
651 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_DEST_SELECT_DEST_TAG_HI (5u)
656 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SOP_MAX (255u)
661 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SIZE_THRESH_0_ENABLE (1U)
666 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SIZE_THRESH_1_ENABLE (2U)
671 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SIZE_THRESH_2_ENABLE (4U)
676 #define TISCI_MSG_VALUE_RM_UDMAP_RX_FLOW_SIZE_THRESH_MAX (7u)
684 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DELEGATE_HOST_VALID ((uint32_t) 1U << 0U)
688 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DELEGATE_CLEAR_VALID ((uint32_t) 1U << 1U)
694 #define TISCI_MSG_VALUE_RM_UDMAP_FLOW_DELEGATE_CLEAR (1U)
702 #define TISCI_MSG_VALUE_RM_UDMAP_GCFG_PERF_CTRL_VALID ((uint32_t) 1U << 0U)
707 #define TISCI_MSG_VALUE_RM_UDMAP_GCFG_EMU_CTRL_VALID ((uint32_t) 1U << 1U)
712 #define TISCI_MSG_VALUE_RM_UDMAP_GCFG_PSIL_TO_VALID ((uint32_t) 1U << 2U)
717 #define TISCI_MSG_VALUE_RM_UDMAP_GCFG_RFLOWFWSTAT_VALID ((uint32_t) 1U << 3U)
Configures a Navigator Subsystem UDMAP transmit channel.
Definition: tisci_rm_udmap.h:1012
uint16_t nav_id
Definition: tisci_rm_udmap.h:1562
uint16_t rx_fdq0_sz1_qnum
Definition: tisci_rm_udmap.h:1728
uint16_t flowid_cnt
Definition: tisci_rm_udmap.h:1256
uint8_t rx_qos
Definition: tisci_rm_udmap.h:1252
uint8_t rx_ignore_short
Definition: tisci_rm_udmap.h:1260
uint16_t nav_id
Definition: tisci_rm_udmap.h:771
Response to configuring a UDMAP transmit channel.
Definition: tisci_rm_udmap.h:1042
uint16_t rx_size_thresh1
Definition: tisci_rm_udmap.h:1726
struct tisci_header hdr
Definition: tisci_rm_udmap.h:785
uint16_t rx_size_thresh2
Definition: tisci_rm_udmap.h:1727
uint16_t rx_size_thresh0
Definition: tisci_rm_udmap.h:1725
uint8_t rx_psinfo_present
Definition: tisci_rm_udmap.h:1565
uint8_t tx_filt_einfo
Definition: tisci_rm_udmap.h:1018
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1043
uint8_t rx_ps_location
Definition: tisci_rm_udmap.h:1582
uint8_t rx_pause_on_err
Definition: tisci_rm_udmap.h:1257
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1245
uint16_t flowid_start
Definition: tisci_rm_udmap.h:1255
uint32_t psil_to
Definition: tisci_rm_udmap.h:774
uint32_t valid_params
Definition: tisci_rm_udmap.h:1246
uint8_t tx_orderid
Definition: tisci_rm_udmap.h:1028
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1592
uint32_t valid_params
Definition: tisci_rm_udmap.h:1014
uint16_t index
Definition: tisci_rm_udmap.h:1016
Response to configuring a UDMAP receive channel.
Definition: tisci_rm_udmap.h:1271
uint16_t dev_id
Definition: tisci_rm_udmap.h:1783
uint8_t tx_atype
Definition: tisci_rm_udmap.h:1020
uint16_t tx_fetch_size
Definition: tisci_rm_udmap.h:1023
uint32_t valid_params
Definition: tisci_rm_udmap.h:770
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1721
Response to delegating a flow to another host for configuration.
Definition: tisci_rm_udmap.h:1795
uint16_t rx_fdq0_sz3_qnum
Definition: tisci_rm_udmap.h:1730
uint16_t nav_id
Definition: tisci_rm_udmap.h:1015
Delegates the specified flow to another host for configuration. Only the original owner of the flow,...
Definition: tisci_rm_udmap.h:1780
struct tisci_header hdr
Definition: tisci_rm_udmap.h:769
uint8_t tx_tdtype
Definition: tisci_rm_udmap.h:1032
uint16_t nav_id
Definition: tisci_rm_udmap.h:1723
uint8_t rx_burst_size
Definition: tisci_rm_udmap.h:1262
uint32_t rflowfwstat
Definition: tisci_rm_udmap.h:775
uint16_t rxcq_qnum
Definition: tisci_rm_udmap.h:1250
uint8_t rx_chan_type
Definition: tisci_rm_udmap.h:1259
uint8_t rx_src_tag_hi
Definition: tisci_rm_udmap.h:1570
uint8_t rx_dest_tag_lo
Definition: tisci_rm_udmap.h:1573
uint16_t flow_index
Definition: tisci_rm_udmap.h:1563
uint8_t rx_priority
Definition: tisci_rm_udmap.h:1251
uint8_t rx_src_tag_lo
Definition: tisci_rm_udmap.h:1571
uint8_t tx_priority
Definition: tisci_rm_udmap.h:1026
uint8_t tx_supr_tdpkt
Definition: tisci_rm_udmap.h:1022
uint16_t rx_fdq0_sz2_qnum
Definition: tisci_rm_udmap.h:1729
uint8_t rx_dest_tag_lo_sel
Definition: tisci_rm_udmap.h:1577
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1560
uint16_t txcq_qnum
Definition: tisci_rm_udmap.h:1025
Configures a Navigator Subsystem UDMAP receive flow.
Definition: tisci_rm_udmap.h:1559
uint8_t rx_src_tag_hi_sel
Definition: tisci_rm_udmap.h:1574
uint8_t tx_chan_type
Definition: tisci_rm_udmap.h:1021
uint8_t tx_sched_priority
Definition: tisci_rm_udmap.h:1030
uint32_t perf_ctrl
Definition: tisci_rm_udmap.h:772
uint16_t rx_sop_offset
Definition: tisci_rm_udmap.h:1568
uint8_t delegated_host
Definition: tisci_rm_udmap.h:1785
uint16_t rx_fetch_size
Definition: tisci_rm_udmap.h:1249
uint8_t tx_pause_on_err
Definition: tisci_rm_udmap.h:1017
uint8_t rx_dest_tag_hi_sel
Definition: tisci_rm_udmap.h:1576
uint8_t tx_filt_pswords
Definition: tisci_rm_udmap.h:1019
Response to configuring a Navigator Subsystem UDMAP receive flow's size threshold fields.
Definition: tisci_rm_udmap.h:1741
uint8_t rx_dest_tag_hi
Definition: tisci_rm_udmap.h:1572
Configures a Navigator Subsystem UDMAP receive flow's size threshold fields.
Definition: tisci_rm_udmap.h:1720
uint32_t valid_params
Definition: tisci_rm_udmap.h:1561
uint8_t rx_einfo_present
Definition: tisci_rm_udmap.h:1564
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1796
uint32_t valid_params
Definition: tisci_rm_udmap.h:1722
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1742
uint8_t rx_sched_priority
Definition: tisci_rm_udmap.h:1254
uint8_t tx_burst_size
Definition: tisci_rm_udmap.h:1031
struct tisci_msg_rm_udmap_gcfg_cfg_req __attribute__((__packed__))
uint16_t fdepth
Definition: tisci_rm_udmap.h:1029
uint8_t rx_orderid
Definition: tisci_rm_udmap.h:1253
uint16_t rx_fdq1_qnum
Definition: tisci_rm_udmap.h:1579
uint16_t index
Definition: tisci_rm_udmap.h:1248
uint8_t rx_size_thresh_en
Definition: tisci_rm_udmap.h:1731
uint16_t flow_index
Definition: tisci_rm_udmap.h:1784
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1272
uint8_t clear
Definition: tisci_rm_udmap.h:1786
uint16_t rx_fdq0_sz0_qnum
Definition: tisci_rm_udmap.h:1578
uint8_t extended_ch_type
Definition: tisci_rm_udmap.h:1033
uint8_t rx_atype
Definition: tisci_rm_udmap.h:1258
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1781
uint16_t rx_fdq3_qnum
Definition: tisci_rm_udmap.h:1581
Response to configuring a Navigator Subsystem UDMAP receive flow.
Definition: tisci_rm_udmap.h:1591
uint32_t emu_ctrl
Definition: tisci_rm_udmap.h:773
Configures a Navigator Subsystem UDMAP global configuration region. Configures the non-real-time regi...
Definition: tisci_rm_udmap.h:768
uint8_t rx_desc_type
Definition: tisci_rm_udmap.h:1567
uint16_t rx_dest_qnum
Definition: tisci_rm_udmap.h:1569
uint8_t tx_qos
Definition: tisci_rm_udmap.h:1027
uint8_t rx_ignore_long
Definition: tisci_rm_udmap.h:1261
uint16_t flow_index
Definition: tisci_rm_udmap.h:1724
uint8_t rx_error_handling
Definition: tisci_rm_udmap.h:1566
struct tisci_header hdr
Definition: tisci_rm_udmap.h:1013
uint16_t rx_fdq2_qnum
Definition: tisci_rm_udmap.h:1580
Configures a Navigator Subsystem UDMAP receive channel.
Definition: tisci_rm_udmap.h:1244
uint8_t rx_src_tag_lo_sel
Definition: tisci_rm_udmap.h:1575
uint32_t valid_params
Definition: tisci_rm_udmap.h:1782
uint16_t nav_id
Definition: tisci_rm_udmap.h:1247
uint8_t tx_credit_count
Definition: tisci_rm_udmap.h:1024
Response to configuring UDMAP global configuration.
Definition: tisci_rm_udmap.h:784