AM62x MCU+ SDK  10.00.00
SAFETY_CHECKERS_PM SOC specific structure declaration

Introduction

Variable Documentation

◆ gSafetyCheckers_PmPllData

◆ gSafetyCheckers_PmPscData

◆ gSafetyCheckers_RmRegData

SafetyCheckers_RmRegData gSafetyCheckers_RmRegData[]
static
Initial value:
=
{
{SAFETY_CHECKERS_RM_BA0_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG0_NUM,SAFETY_CHECKERS_RM_REG_HEX4, {0X0U, 0x4U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA1_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG1_NUM,SAFETY_CHECKERS_RM_REG_HEX4, {0X0U, 0x4U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA2_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG2_NUM,SAFETY_CHECKERS_RM_REG_HEX4, {0X0U, 0x4U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA3_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG3_NUM,SAFETY_CHECKERS_RM_REG_HEX4, {0X0U, 0x4U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA0_IA_IMAP, SAFETY_CHECKERS_RM_SUBMOD0_IA_IMAP, SAFETY_CHECKERS_RM_REG0_IA_IMAP, SAFETY_CHECKERS_RM_REG_HEX8, {0X0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA0_RA, SAFETY_CHECKERS_RM_SUBMOD0_RA, SAFETY_CHECKERS_RM_RA_REG0_NUM, SAFETY_CHECKERS_RM_REG_HEX100, {0x40U, 0x44U, 0x48U,0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA1_RA, SAFETY_CHECKERS_RM_SUBMOD0_RA, SAFETY_CHECKERS_RM_RA_REG1_NUM, SAFETY_CHECKERS_RM_REG_HEX100, {0x40U, 0x44U, 0x48U,0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA2_RA, SAFETY_CHECKERS_RM_RA_SUBMOD1, SAFETY_CHECKERS_RM_RA_REG2_NUM, SAFETY_CHECKERS_RM_REG_HEX100, {0x40U, 0x44U, 0x48U, 0x4CU, 0x50U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA0_UDMA_TX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX, SAFETY_CHECKERS_RM_REG0_UDMA_TX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x70U, 0x80U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA1_UDMA_TX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX, SAFETY_CHECKERS_RM_REG1_UDMA_TX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x70U, 0x80U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA0_UDMA_RX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX, SAFETY_CHECKERS_RM_REG0_UDMA_RX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x80U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA1_UDMA_RX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX, SAFETY_CHECKERS_RM_REG1_UDMA_RX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x80U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA0_UDMA_FLW, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_FLW, SAFETY_CHECKERS_RM_REG0_UDMA_FLW, SAFETY_CHECKERS_RM_REG_HEX40, {0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA0_UDMA_GCFG, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_GCFG, SAFETY_CHECKERS_RM_REG0_UDMA_GCFG, SAFETY_CHECKERS_RM_REG_HEX0, {0x0U, 0x04U, 0X08U, 0x10U, 0x20U, 0x24U, 0x28U, 0x2CU, 0x30U, 0x60U, 0x64U, 0x78U, 0x7CU, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
{SAFETY_CHECKERS_RM_BA1_UDMA_GCFG, SAFETY_CHECKERS_RM_SUBMOD1_UDMA_GCFG, SAFETY_CHECKERS_RM_REG1_UDMA_GCFG, SAFETY_CHECKERS_RM_REG_HEX0, {0x0U, 0x04U, 0X08U, 0x10U, 0x20U, 0x24U, 0x28U, 0x2CU, 0x30U, 0x60U, 0x64U, 0x78U, 0x7CU, 0x88U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U, 0x0U}},
}

Structure defines RM module register base address and the total length of registers.

gSafetyCheckers_PmPllRegOffset16
static uint32_t gSafetyCheckers_PmPllRegOffset16[]
Definition: safety_checkers_soc.h:250
SAFETY_CHECKERS_RM_BA0_UDMA_TX
#define SAFETY_CHECKERS_RM_BA0_UDMA_TX
RM UDMA TX module base addresses.
Definition: safety_checkers_soc.h:161
SAFETY_CHECKERS_RM_IR_REG0_NUM
#define SAFETY_CHECKERS_RM_IR_REG0_NUM
Formula input of IR module to read relevant registers from register group.
Definition: safety_checkers_soc.h:129
gSafetyCheckers_PmPllRegOffset12
static uint32_t gSafetyCheckers_PmPllRegOffset12[]
Definition: safety_checkers_soc.h:242
SAFETY_CHECKERS_RM_IR_REG3_NUM
#define SAFETY_CHECKERS_RM_IR_REG3_NUM
Definition: safety_checkers_soc.h:132
SAFETY_CHECKERS_RM_SUBMOD0_UDMA_GCFG
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_GCFG
Number of registers in UDMA GCFG register group.
Definition: safety_checkers_soc.h:200
SAFETY_CHECKERS_PM_PD_STAT_NUM
#define SAFETY_CHECKERS_PM_PD_STAT_NUM
Definition: safety_checkers_soc.h:79
SAFETY_CHECKERS_RM_BA1_UDMA_TX
#define SAFETY_CHECKERS_RM_BA1_UDMA_TX
Definition: safety_checkers_soc.h:162
SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX
Number of registers in UDMA RX register group.
Definition: safety_checkers_soc.h:180
SAFETY_CHECKERS_RM_SUBMOD0_IA_IMAP
#define SAFETY_CHECKERS_RM_SUBMOD0_IA_IMAP
Number of registers in IAIMAP register group.
Definition: safety_checkers_soc.h:144
SAFETY_CHECKERS_RM_REG0_UDMA_RX
#define SAFETY_CHECKERS_RM_REG0_UDMA_RX
Formula input of UDMA RX to read relevant registers from register group.
Definition: safety_checkers_soc.h:176
gSafetyCheckers_PmPllRegOffset0
static uint32_t gSafetyCheckers_PmPllRegOffset0[]
This defines the array holding register offset values for the each PLL's.
Definition: safety_checkers_soc.h:221
SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS
#define SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(i)
Each PLL base addresses.
Definition: safety_checkers_pm_soc.h:88
gSafetyCheckers_PmPllRegOffset2
static uint32_t gSafetyCheckers_PmPllRegOffset2[]
Definition: safety_checkers_soc.h:232
SAFETY_CHECKERS_RM_BA0_IA_IMAP
#define SAFETY_CHECKERS_RM_BA0_IA_IMAP
RM IAIMAP module base addresses.
Definition: safety_checkers_soc.h:138
SAFETY_CHECKERS_RM_REG0_UDMA_GCFG
#define SAFETY_CHECKERS_RM_REG0_UDMA_GCFG
Formula input of UDMA GCFG to read relevant registers from register group.
Definition: safety_checkers_soc.h:196
SAFETY_CHECKERS_PM_PLL2_LENGTH
#define SAFETY_CHECKERS_PM_PLL2_LENGTH
Definition: safety_checkers_soc.h:85
SAFETY_CHECKERS_RM_REG1_UDMA_GCFG
#define SAFETY_CHECKERS_RM_REG1_UDMA_GCFG
Definition: safety_checkers_soc.h:197
SAFETY_CHECKERS_RM_SUBMOD1_UDMA_GCFG
#define SAFETY_CHECKERS_RM_SUBMOD1_UDMA_GCFG
Definition: safety_checkers_soc.h:201
SAFETY_CHECKERS_RM_SUBMOD0_RA
#define SAFETY_CHECKERS_RM_SUBMOD0_RA
Number of registers in RA register group.
Definition: safety_checkers_soc.h:157
SAFETY_CHECKERS_RM_BA1_RA
#define SAFETY_CHECKERS_RM_BA1_RA
Definition: safety_checkers_soc.h:148
SAFETY_CHECKERS_RM_IR_REG2_NUM
#define SAFETY_CHECKERS_RM_IR_REG2_NUM
Definition: safety_checkers_soc.h:131
SAFETY_CHECKERS_PM_PLL1_LENGTH
#define SAFETY_CHECKERS_PM_PLL1_LENGTH
Definition: safety_checkers_soc.h:84
SAFETY_CHECKERS_RM_RA_REG1_NUM
#define SAFETY_CHECKERS_RM_RA_REG1_NUM
Definition: safety_checkers_soc.h:153
SAFETY_CHECKERS_RM_BA1_IR
#define SAFETY_CHECKERS_RM_BA1_IR
Definition: safety_checkers_soc.h:124
SAFETY_CHECKERS_PM_PLL17_LENGTH
#define SAFETY_CHECKERS_PM_PLL17_LENGTH
Definition: safety_checkers_soc.h:90
SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX
Number of registers in UDMA TX register group.
Definition: safety_checkers_soc.h:169
SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM
#define SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM
Number of registers in IR register group.
Definition: safety_checkers_soc.h:135
SAFETY_CHECKERS_PM_WKUP_MD_STAT_NUM
#define SAFETY_CHECKERS_PM_WKUP_MD_STAT_NUM
Definition: safety_checkers_soc.h:78
SAFETY_CHECKERS_PM_PLL15_LENGTH
#define SAFETY_CHECKERS_PM_PLL15_LENGTH
Definition: safety_checkers_soc.h:88
SAFETY_CHECKERS_PM_PLL12_LENGTH
#define SAFETY_CHECKERS_PM_PLL12_LENGTH
Definition: safety_checkers_soc.h:87
gSafetyCheckers_PmMcuPllRegOffset0
static uint32_t gSafetyCheckers_PmMcuPllRegOffset0[]
Definition: safety_checkers_soc.h:258
SAFETY_CHECKERS_RM_BA2_RA
#define SAFETY_CHECKERS_RM_BA2_RA
Definition: safety_checkers_soc.h:149
SAFETY_CHECKERS_PM_WKUP_PSC_BASE_ADDRESS
#define SAFETY_CHECKERS_PM_WKUP_PSC_BASE_ADDRESS
WKUP PSC base address.
Definition: safety_checkers_pm_soc.h:80
SAFETY_CHECKERS_RM_REG0_UDMA_TX
#define SAFETY_CHECKERS_RM_REG0_UDMA_TX
Formula input of UDMA TX to read relevant registers from register group.
Definition: safety_checkers_soc.h:165
SAFETY_CHECKERS_RM_REG1_UDMA_TX
#define SAFETY_CHECKERS_RM_REG1_UDMA_TX
Definition: safety_checkers_soc.h:166
SAFETY_CHECKERS_RM_BA1_UDMA_GCFG
#define SAFETY_CHECKERS_RM_BA1_UDMA_GCFG
Definition: safety_checkers_soc.h:193
SAFETY_CHECKERS_RM_RA_REG2_NUM
#define SAFETY_CHECKERS_RM_RA_REG2_NUM
Definition: safety_checkers_soc.h:154
SAFETY_CHECKERS_PM_WKUP_PD_STAT_NUM
#define SAFETY_CHECKERS_PM_WKUP_PD_STAT_NUM
PD STAT and MD STAT registers details for PSC.
Definition: safety_checkers_soc.h:77
SAFETY_CHECKERS_PM_PSC_BASE_ADDRESS
#define SAFETY_CHECKERS_PM_PSC_BASE_ADDRESS
PLL and PSC base addresses.
Definition: safety_checkers_soc.h:72
SAFETY_CHECKERS_PM_MD_STAT_NUM
#define SAFETY_CHECKERS_PM_MD_STAT_NUM
Definition: safety_checkers_soc.h:80
SAFETY_CHECKERS_RM_BA0_UDMA_RX
#define SAFETY_CHECKERS_RM_BA0_UDMA_RX
RM UDMA RX module base addresses.
Definition: safety_checkers_soc.h:172
SAFETY_CHECKERS_RM_BA1_UDMA_RX
#define SAFETY_CHECKERS_RM_BA1_UDMA_RX
Definition: safety_checkers_soc.h:173
SAFETY_CHECKERS_RM_BA2_IR
#define SAFETY_CHECKERS_RM_BA2_IR
Definition: safety_checkers_soc.h:125
SAFETY_CHECKERS_PM_MCU_PLL_BASE_ADDRESS
#define SAFETY_CHECKERS_PM_MCU_PLL_BASE_ADDRESS(i)
Definition: safety_checkers_pm_soc.h:89
SAFETY_CHECKERS_RM_REG0_UDMA_FLW
#define SAFETY_CHECKERS_RM_REG0_UDMA_FLW
Formula input of UDMA FLOW to read relevant registers from register group.
Definition: safety_checkers_soc.h:186
SAFETY_CHECKERS_PM_PLL0_LENGTH
#define SAFETY_CHECKERS_PM_PLL0_LENGTH
PLL register details.
Definition: safety_checkers_soc.h:83
SAFETY_CHECKERS_RM_BA0_RA
#define SAFETY_CHECKERS_RM_BA0_RA
RM RA module base addresses.
Definition: safety_checkers_soc.h:147
SAFETY_CHECKERS_RM_REG_HEX8
#define SAFETY_CHECKERS_RM_REG_HEX8
Definition: safety_checkers_rm_soc.h:78
SAFETY_CHECKERS_PM_MCU_PLL0_LENGTH
#define SAFETY_CHECKERS_PM_MCU_PLL0_LENGTH
Definition: safety_checkers_soc.h:91
SAFETY_CHECKERS_RM_REG_HEX100
#define SAFETY_CHECKERS_RM_REG_HEX100
Definition: safety_checkers_rm_soc.h:80
SAFETY_CHECKERS_RM_REG0_IA_IMAP
#define SAFETY_CHECKERS_RM_REG0_IA_IMAP
Formula input of IAIMAP module to read relevant registers from register group.
Definition: safety_checkers_soc.h:141
SAFETY_CHECKERS_PM_PLL8_LENGTH
#define SAFETY_CHECKERS_PM_PLL8_LENGTH
Definition: safety_checkers_soc.h:86
SAFETY_CHECKERS_RM_REG_HEX40
#define SAFETY_CHECKERS_RM_REG_HEX40
Definition: safety_checkers_rm_soc.h:79
gSafetyCheckers_PmPllRegOffset8
static uint32_t gSafetyCheckers_PmPllRegOffset8[]
Definition: safety_checkers_soc.h:238
SAFETY_CHECKERS_RM_RA_SUBMOD1
#define SAFETY_CHECKERS_RM_RA_SUBMOD1
Definition: safety_checkers_soc.h:158
SAFETY_CHECKERS_RM_SUBMOD0_UDMA_FLW
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_FLW
Number of registers in UDMA FLOW register group.
Definition: safety_checkers_soc.h:189
gSafetyCheckers_PmPllRegOffset15
static uint32_t gSafetyCheckers_PmPllRegOffset15[]
Definition: safety_checkers_soc.h:246
SAFETY_CHECKERS_RM_RA_REG0_NUM
#define SAFETY_CHECKERS_RM_RA_REG0_NUM
Formula input of RA module to read relevant registers from register group.
Definition: safety_checkers_soc.h:152
SAFETY_CHECKERS_RM_REG_HEX4
#define SAFETY_CHECKERS_RM_REG_HEX4
Definition: safety_checkers_rm_soc.h:77
SAFETY_CHECKERS_RM_REG1_UDMA_RX
#define SAFETY_CHECKERS_RM_REG1_UDMA_RX
Definition: safety_checkers_soc.h:177
SAFETY_CHECKERS_RM_BA0_UDMA_GCFG
#define SAFETY_CHECKERS_RM_BA0_UDMA_GCFG
RM UDMA GCFG module base addresses.
Definition: safety_checkers_soc.h:192
SAFETY_CHECKERS_RM_REG_HEX0
#define SAFETY_CHECKERS_RM_REG_HEX0
Offsets for RM register blobs.
Definition: safety_checkers_rm_soc.h:76
SAFETY_CHECKERS_PM_PLL16_LENGTH
#define SAFETY_CHECKERS_PM_PLL16_LENGTH
Definition: safety_checkers_soc.h:89
gSafetyCheckers_PmPllRegOffset17
static uint32_t gSafetyCheckers_PmPllRegOffset17[]
Definition: safety_checkers_soc.h:254
SAFETY_CHECKERS_RM_BA0_UDMA_FLW
#define SAFETY_CHECKERS_RM_BA0_UDMA_FLW
RM UDMA FLOW module base addresses.
Definition: safety_checkers_soc.h:183
SAFETY_CHECKERS_RM_BA0_IR
#define SAFETY_CHECKERS_RM_BA0_IR
RM IR module base addresses.
Definition: safety_checkers_soc.h:123
SAFETY_CHECKERS_RM_BA3_IR
#define SAFETY_CHECKERS_RM_BA3_IR
Definition: safety_checkers_soc.h:126
gSafetyCheckers_PmPllRegOffset1
static uint32_t gSafetyCheckers_PmPllRegOffset1[]
Definition: safety_checkers_soc.h:227
SAFETY_CHECKERS_RM_IR_REG1_NUM
#define SAFETY_CHECKERS_RM_IR_REG1_NUM
Definition: safety_checkers_soc.h:130