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AM62x MCU+ SDK
08.06.00
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47 #ifndef INCLUDE_SDL_ECC_H_
48 #define INCLUDE_SDL_ECC_H_
53 #include "sdl_common.h"
54 #include <sdl/ecc/sdl_ip_ecc.h>
55 #if defined(SOC_AM263X)
59 #if defined(SOC_AM273X) || defined(SOC_AWR294X)
60 #include <sdl/esm/v1/sdl_esm.h>
63 #if defined(SOC_AM64X) || defined(SOC_AM243X)
65 #include <sdl/include/am64x_am243x/sdlr_soc_baseaddress.h>
66 #include <sdl/include/am64x_am243x/sdlr_soc_ecc_aggr.h>
69 #if defined(SOC_AM62X)
71 #include <sdl/include/am62x/soc_config.h>
72 #include <sdl/include/am62x/sdlr_soc_baseaddress.h>
73 #include <sdl/include/am62x/sdlr_soc_ecc_aggr.h>
137 #if defined(SOC_AM62X)
138 #define SDL_COMPUTE_CLUSTER0_SAM62_A53_512KB_WRAP_A53_DUAL_WRAP_CBA_WRAP_A53_DUAL_WRAP_CBA_COREPAC_ECC_AGGR_CORE0 (0U)
139 #define SDL_COMPUTE_CLUSTER0_SAM62_A53_512KB_WRAP_A53_DUAL_WRAP_CBA_WRAP_A53_DUAL_WRAP_CBA_COREPAC_ECC_AGGR_CORE1 (1U)
140 #define SDL_COMPUTE_CLUSTER0_SAM62_A53_512KB_WRAP_A53_DUAL_WRAP_CBA_WRAP_A53_DUAL_WRAP_CBA_COREPAC_ECC_AGGR_CORE2 (2U)
141 #define SDL_COMPUTE_CLUSTER0_SAM62_A53_512KB_WRAP_A53_DUAL_WRAP_CBA_WRAP_A53_DUAL_WRAP_CBA_COREPAC_ECC_AGGR_CORE3 (3U)
142 #define SDL_COMPUTE_CLUSTER0_SAM62_A53_512KB_WRAP_A53_DUAL_WRAP_CBA_WRAP_A53_DUAL_WRAP_CBA_COREPAC_ECC_AGGR_COREPAC (4U)
143 #define SDL_CSI_RX_IF0_CSI_RX_IF_ECC_AGGR (5U)
144 #define SDL_DMASS0_DMSS_AM62_ECCAGGR (6U)
145 #define SDL_ECC_AGGR0_SAM62_SEC_ECC_AGGR (7U)
146 #define SDL_FSS0_FSS_UL_OSPI0_OSPI_WRAP_ECC_AGGR (8U)
147 #define SDL_GICSS0_GIC500SS_1_4_ECC_AGGR (9U)
148 #define SDL_ICSSM0_ICSS_M_CORE_BORG_ECC_AGGR (10U)
149 #define SDL_MCAN0_MCANSS_MSGMEM_WRAP_ECC_AGGR (11U)
150 #define SDL_MCU_ECC_AGGR0_SAM62_MCU_ECC_AGGR (12U)
151 #define SDL_MCU_M4FSS0_BLAZAR_ECC (13U)
152 #define SDL_MCU_MCAN0_MCANSS_MSGMEM_WRAP_ECC_AGGR (14U)
153 #define SDL_MCU_MCAN1_MCANSS_MSGMEM_WRAP_ECC_AGGR (15U)
154 #define SDL_MMCSD0_EMMCSD8SS_ECC_AGGR_RXMEM (16U)
155 #define SDL_MMCSD0_EMMCSD8SS_ECC_AGGR_TXMEM (17U)
156 #define SDL_MMCSD1_EMMCSD4SS_ECC_AGGR_RXMEM (18U)
157 #define SDL_MMCSD1_EMMCSD4SS_ECC_AGGR_TXMEM (19U)
158 #define SDL_MMCSD2_EMMCSD4SS_ECC_AGGR_RXMEM (20U)
159 #define SDL_MMCSD2_EMMCSD4SS_ECC_AGGR_TXMEM (21U)
160 #define SDL_PDMA0_SAM62_PDMA_SPI_ECCAGGR (22U)
161 #define SDL_PDMA1_SAM62_PDMA_UART_ECCAGGR (23U)
162 #define SDL_PSRAMECC_16K0_PSRAM16KX32E_ECC_AGGR (24U)
163 #define SDL_PSRAMECC0_PSRAM256X32E_ECC_AGGR (25U)
164 #define SDL_SA3_SS0_SA3SS_AM62_DMSS_ECCAGGR (26U)
165 #define SDL_SA3_SS0_SA3SS_AM62_SA_UL_ECC_AGGR (27U)
166 #define SDL_SMS0_SMS_HSM_ECC (28U)
167 #define SDL_SMS0_SMS_TIFS_ECC (29U)
168 #define SDL_USB0_USB2SS_16FFC_USB2SS_CORE_ECC_AGGR (30U)
169 #define SDL_USB1_USB2SS_16FFC_USB2SS_CORE_ECC_AGGR (31U)
170 #define SDL_WKUP_ECC_AGGR0_SAM62_DM_ECC_AGGR (32U)
171 #define SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR (33U)
172 #define SDL_WKUP_SAFE_ECC_AGGR0_SAM62_WKUP_SAFE_ECC_AGGR (34U)
173 #define SDL_WKUP_VTM0_K3VTM_N16FFC_ECCAGGR (35U)
174 #define SDL_CPSW0_CPSW_3GUSS_CORE_ECC_CPSW_ECC_AGGR (36u)
175 #define SDL_ECC_MEMTYPE_MAX (SDL_CPSW0_CPSW_3GUSS_CORE_ECC_CPSW_ECC_AGGR + 1U)
178 #if defined(SOC_AM62X)
180 #define SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_ATCM0_BANK0_RAM_ID)
182 #define SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK1_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_ATCM0_BANK1_RAM_ID)
184 #define SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK0_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_B0TCM0_BANK0_RAM_ID)
186 #define SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK1_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_B0TCM0_BANK1_RAM_ID)
188 #define SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK0_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_B1TCM0_BANK0_RAM_ID)
190 #define SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK1_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_B1TCM0_BANK1_RAM_ID)
192 #define SDL_ECC_R5F_MEM_SUBTYPE_KS_VIM_RAM_VECTOR_ID (SDL_WKUP_R5FSS0_PULSAR_UL_CPU0_ECC_AGGR_PULSAR_UL_PULSAR_KS_VIM_COMMON_CORE0_RAM_RAM_ID)
213 typedef struct SDL_ECC_InitConfig_s
226 typedef struct SDL_ECC_InjectErrorConfig_s
240 typedef struct SDL_ECC_ErrorInfo_s
310 uint32_t selfTestTimeOut);
421 uint64_t bitErrorOffset,
422 uint32_t bitErrorGroup);
int32_t SDL_ECC_getErrorInfo(SDL_ECC_MemType eccMemType, SDL_Ecc_AggrIntrSrc intrSrc, SDL_ECC_ErrorInfo_t *pErrorInfo)
Retrieves the ECC error information for the specified memtype and interrupt source.
void(* SDL_ECC_ErrorCallback_t)(uint32_t errorSrc, uint32_t address)
Definition: sdl_ecc.h:203
SDL_ESM_Inst
Definition: sdl_esm_soc.h:59
SDL_ECC_AggregatorType
Definition: sdl_ecc.h:84
Definition: sdl_ecc.h:214
SDL_ECC_MemSubType memSubType
Definition: sdl_ecc.h:244
uint32_t numRams
Definition: sdl_ecc.h:215
uint32_t SDL_ECC_MemType
This enumerator indicate ECC memory type.
Definition: sdl_ecc.h:135
int32_t SDL_ECC_initMemory(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType)
Initializes Memory to be ready for ECC error detection. Assumes ECC is already enabled.
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_N_ROW_REPEAT
Definition: sdl_ecc.h:113
int32_t SDL_ECC_injectError(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType, SDL_ECC_InjectErrorType errorType, const SDL_ECC_InjectErrorConfig_t *pECCErrorConfig)
Injects ECC error at specified location Assumes ECC is already enabled.
uint32_t SDL_Ecc_AggrEDCErrorSubType
This enumerator defines the types of possible EDC errors.
Definition: sdl_ip_ecc.h:189
uint32_t SDL_ECC_MemSubType
This enumerator indicate ECC memory Sub Type.
Definition: sdl_ecc.h:200
int32_t SDL_ECC_getESMErrorInfo(SDL_ESM_Inst instance, uint32_t intSrc, SDL_ECC_MemType *eccMemType, SDL_Ecc_AggrIntrSrc *intrSrcType)
Retrieves the ECC error information for the specified ESM error. If it isn't an ECC error or the ECC ...
SDL_ECC_RamIdType
Definition: sdl_ecc.h:123
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_REPEAT
Definition: sdl_ecc.h:109
uint16_t chkGrp
Definition: sdl_ecc.h:232
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_N_ROW_REPEAT
Definition: sdl_ecc.h:115
@ SDL_ECC_RAM_ID_TYPE_INTERCONNECT
Definition: sdl_ecc.h:126
@ SDL_INJECT_ECC_NO_ERROR
Definition: sdl_ecc.h:99
uint32_t bitErrorGroup
Definition: sdl_ecc.h:252
SDL_Ecc_AggrIntrSrc intrSrc
Definition: sdl_ecc.h:246
Header file contains enumerations, structure definitions and function declarations for SDL Error Sign...
int32_t SDL_ECC_getStaticRegisters(SDL_ECC_MemType eccMemType, SDL_ECC_staticRegs *pStaticRegs)
Gets the static registers for the specified ECC instance.
Definition: sdl_ecc.h:227
uint32_t * pErrMem
Definition: sdl_ecc.h:228
This structure contains the static register group for Ecc aggregator used by the SDL_ecc_aggrReadStat...
Definition: sdl_ip_ecc.h:350
void(* SDL_ECC_VIMDEDVector_t)(void)
Definition: sdl_ecc.h:206
uint64_t bitErrorOffset
Definition: sdl_ecc.h:254
uint32_t flipBitMask
Definition: sdl_ecc.h:230
SDL_ECC_InjectErrorType
ECC Inject error types.
Definition: sdl_ecc.h:97
int32_t SDL_ECC_initEsm(const SDL_ESM_Inst esmInstType)
Initializes an module for usage with ECC module.
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_ONCE
Definition: sdl_ecc.h:103
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_N_ROW_ONCE
Definition: sdl_ecc.h:107
uint32_t SDL_Ecc_AggrIntrSrc
This enumerator defines the types of possible ECC errors.
Definition: sdl_ip_ecc.h:108
Definition: sdl_ecc.h:241
@ SDL_ECC_AGGR_TYPE_FULL_FUNCTION
Definition: sdl_ecc.h:87
SDL_ECC_MemSubType * pMemSubTypeList
Definition: sdl_ecc.h:218
@ SDL_ECC_AGGR_TYPE_INJECT_ONLY
Definition: sdl_ecc.h:85
int32_t SDL_ECC_init(SDL_ECC_MemType eccMemType, const SDL_ECC_InitConfig_t *pECCInitConfig)
Initializes ECC module for ECC detection.
@ SDL_ECC_RAM_ID_TYPE_WRAPPER
Definition: sdl_ecc.h:124
uint32_t injectBitErrCnt
Definition: sdl_ecc.h:250
void SDL_ECC_applicationCallbackFunction(SDL_ECC_MemType eccMemType, uint32_t errorSrc, uint32_t address, uint32_t ramId, uint64_t bitErrorOffset, uint32_t bitErrorGroup)
Application provided external callback function for ECC handling Called inside the reference function...
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_ONCE
Definition: sdl_ecc.h:101
int32_t SDL_ECC_clearNIntrPending(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType, SDL_Ecc_AggrIntrSrc intrSrc, SDL_Ecc_AggrEDCErrorSubType subType, uint32_t numEvents)
Clears N pending interrupts for the specified memtype, subtype and interrupt source.
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_REPEAT
Definition: sdl_ecc.h:111
uint32_t bitErrCnt
Definition: sdl_ecc.h:248
SDL_ECC_MemType eccMemType
Definition: sdl_ecc.h:242
int32_t SDL_ECC_selfTest(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType, SDL_ECC_InjectErrorType errorType, const SDL_ECC_InjectErrorConfig_t *pECCErrorConfig, uint32_t selfTestTimeOut)
Runs self test by injecting and error and monitor response Assumes ECC is already enabled.
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_N_ROW_ONCE
Definition: sdl_ecc.h:105
int32_t SDL_ECC_ackIntr(SDL_ECC_MemType eccMemType, SDL_Ecc_AggrIntrSrc intrSrc)
Acknowledge the ECC interrupt.