tisci_sec_proxy.h

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/*
 *  Copyright (C) 2017-2022 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
#ifndef AM62X_TISCI_SEC_PROXY_H
#define AM62X_TISCI_SEC_PROXY_H
 
#ifdef __cplusplus
extern "C"
{
#endif
 
 
/*
 * Secure Proxy configurations for MAIN_0_R5_0 host
 */
 
#define TISCI_SEC_PROXY_MAIN_0_R5_0_READ_RESPONSE_THREAD_ID (0U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_0_READ_RESPONSE_NUM_MESSAGES (11U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_LOW_PRIORITY_THREAD_ID (1U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_0_WRITE_LOW_PRIORITY_NUM_MESSAGES (10U)
 
/*
 * Secure Proxy configurations for MAIN_0_R5_1 host
 */
 
#define TISCI_SEC_PROXY_MAIN_0_R5_1_READ_RESPONSE_THREAD_ID (2U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_1_READ_RESPONSE_NUM_MESSAGES (11U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_LOW_PRIORITY_THREAD_ID (3U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_1_WRITE_LOW_PRIORITY_NUM_MESSAGES (10U)
 
/*
 * Secure Proxy configurations for MAIN_0_R5_2 host
 */
 
#define TISCI_SEC_PROXY_MAIN_0_R5_2_READ_RESPONSE_THREAD_ID (4U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_2_READ_RESPONSE_NUM_MESSAGES (2U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_LOW_PRIORITY_THREAD_ID (5U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_2_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
 
/*
 * Secure Proxy configurations for MAIN_0_R5_3 host
 */
 
#define TISCI_SEC_PROXY_MAIN_0_R5_3_READ_RESPONSE_THREAD_ID (6U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_3_READ_RESPONSE_NUM_MESSAGES (2U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_LOW_PRIORITY_THREAD_ID (7U)
 
#define TISCI_SEC_PROXY_MAIN_0_R5_3_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
 
/*
 * Secure Proxy configurations for A53_0 host
 */
 
#define TISCI_SEC_PROXY_A53_0_READ_RESPONSE_THREAD_ID (8U)
 
#define TISCI_SEC_PROXY_A53_0_READ_RESPONSE_NUM_MESSAGES (11U)
 
#define TISCI_SEC_PROXY_A53_0_WRITE_LOW_PRIORITY_THREAD_ID (9U)
 
#define TISCI_SEC_PROXY_A53_0_WRITE_LOW_PRIORITY_NUM_MESSAGES (10U)
 
/*
 * Secure Proxy configurations for A53_1 host
 */
 
#define TISCI_SEC_PROXY_A53_1_READ_RESPONSE_THREAD_ID (10U)
 
#define TISCI_SEC_PROXY_A53_1_READ_RESPONSE_NUM_MESSAGES (11U)
 
#define TISCI_SEC_PROXY_A53_1_WRITE_LOW_PRIORITY_THREAD_ID (11U)
 
#define TISCI_SEC_PROXY_A53_1_WRITE_LOW_PRIORITY_NUM_MESSAGES (10U)
 
/*
 * Secure Proxy configurations for A53_2 host
 */
 
#define TISCI_SEC_PROXY_A53_2_READ_RESPONSE_THREAD_ID (12U)
 
#define TISCI_SEC_PROXY_A53_2_READ_RESPONSE_NUM_MESSAGES (6U)
 
#define TISCI_SEC_PROXY_A53_2_WRITE_LOW_PRIORITY_THREAD_ID (13U)
 
#define TISCI_SEC_PROXY_A53_2_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
 
/*
 * Secure Proxy configurations for A53_3 host
 */
 
#define TISCI_SEC_PROXY_A53_3_READ_RESPONSE_THREAD_ID (14U)
 
#define TISCI_SEC_PROXY_A53_3_READ_RESPONSE_NUM_MESSAGES (6U)
 
#define TISCI_SEC_PROXY_A53_3_WRITE_LOW_PRIORITY_THREAD_ID (15U)
 
#define TISCI_SEC_PROXY_A53_3_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
 
/*
 * Secure Proxy configurations for M4_0 host
 */
 
#define TISCI_SEC_PROXY_M4_0_READ_RESPONSE_THREAD_ID (16U)
 
#define TISCI_SEC_PROXY_M4_0_READ_RESPONSE_NUM_MESSAGES (6U)
 
#define TISCI_SEC_PROXY_M4_0_WRITE_LOW_PRIORITY_THREAD_ID (17U)
 
#define TISCI_SEC_PROXY_M4_0_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
 
/*
 * Secure Proxy configurations for GPU host
 */
 
#define TISCI_SEC_PROXY_GPU_READ_RESPONSE_THREAD_ID (18U)
 
#define TISCI_SEC_PROXY_GPU_READ_RESPONSE_NUM_MESSAGES (2U)
 
#define TISCI_SEC_PROXY_GPU_WRITE_LOW_PRIORITY_THREAD_ID (19U)
 
#define TISCI_SEC_PROXY_GPU_WRITE_LOW_PRIORITY_NUM_MESSAGES (1U)
 
/*
 * Secure Proxy configurations for A53_4 host
 */
 
#define TISCI_SEC_PROXY_A53_4_READ_RESPONSE_THREAD_ID (20U)
 
#define TISCI_SEC_PROXY_A53_4_READ_RESPONSE_NUM_MESSAGES (6U)
 
#define TISCI_SEC_PROXY_A53_4_WRITE_LOW_PRIORITY_THREAD_ID (21U)
 
#define TISCI_SEC_PROXY_A53_4_WRITE_LOW_PRIORITY_NUM_MESSAGES (5U)
 
/*
 * Secure Proxy configurations for DM2TIFS host
 */
 
#define TISCI_SEC_PROXY_DM2TIFS_READ_RESPONSE_THREAD_ID (22U)
 
#define TISCI_SEC_PROXY_DM2TIFS_READ_RESPONSE_NUM_MESSAGES (4U)
 
#define TISCI_SEC_PROXY_DM2TIFS_WRITE_LOW_PRIORITY_THREAD_ID (23U)
 
#define TISCI_SEC_PROXY_DM2TIFS_WRITE_LOW_PRIORITY_NUM_MESSAGES (2U)
 
/*
 * Secure Proxy configurations for TIFS2DM host
 */
 
#define TISCI_SEC_PROXY_TIFS2DM_READ_RESPONSE_THREAD_ID (24U)
 
#define TISCI_SEC_PROXY_TIFS2DM_READ_RESPONSE_NUM_MESSAGES (4U)
 
#define TISCI_SEC_PROXY_TIFS2DM_WRITE_LOW_PRIORITY_THREAD_ID (25U)
 
#define TISCI_SEC_PROXY_TIFS2DM_WRITE_LOW_PRIORITY_NUM_MESSAGES (2U)
 
 
 
#ifdef __cplusplus
}
#endif
 
#endif /* AM62X_TISCI_SEC_PROXY_H */