IPC RP Message QNX Echo
Introduction
This example shows usage of RP Message APIs to exchange messages between RTOS/NORTOS CPUs as well as exchange message with QNX on Cortex-A CPU.
One “main” CPU, sends multi-byte messages to other “remote” CPUs using the RP Message APIs
The “remote” CPUs, then echo back the same message to the main CPUs
Once all messages are echoed the main CPU exits. The remote CPUs remain waiting to receive new messages.
The example integrates bootloading funtionality with SBL on OSPI bootmedia. It also integrates Device manager functionality. The SBL stage 2 thread boots all the cores along with HLOS like Linux. Refer SBL Booting Linux From OSPI for boot flow sequence.
Supported Combinations
Parameter |
Value |
|---|---|
CPU + OS |
mcu-r5fss0-0 freertos |
CPU + OS |
wkup-r5fss0-0 freertos |
Toolchain |
ti-arm-clang |
Board |
am62px-sk |
Example folder |
examples/drivers/ipc/ipc_rpmsg_echo_qnx |
Steps to Run the Example
This example integrates SBL on OSPI bootmedia which needs to be flashed on the EVM flash, along with sample application images for MCU R5 CPUs, HSM M4F and Linux Appimage.
For HS-FS device, use default_sbl_ospi_qnx_hs_fs.cfg as the cfg file.
To flash to the EVM, refer to Flash a Hello World example .
Example, assuming SDK is installed at
C:/ti/mcu_plus_sdkand this example and IPC application is built using makefiles, and Linux Appimage is already created, in Windows,cd C:/ti/mcu_plus_sdk/tools/boot python uart_uniflash.py -p COM13 --cfg=C:/ti/mcu_plus_sdk/tools/boot/sbl_prebuilt/{{ VAR_BOARD_NAME_LOWER }}/default_sbl_ospi_qnx_hs_fs.cfgIf Linux PC is used, assuming SDK is installed at
~/ti/mcu_plus_sdkcd ~/ti/mcu_plus_sdk python uart_uniflash.py -p /dev/ttyUSB0 --cfg=~/ti/mcu_plus_sdk/tools/boot/sbl_prebuilt/{{ VAR_BOARD_NAME_LOWER }}/default_sbl_ospi_qnx_hs_fs.cfgSwitch to OSPI NOR BOOT MODE and power on the EVM.
Attention
As the wake-up R5 is the device manager, it needs to be started by the SBL. So it can not be loaded through CCS. It should be flashed and booted through SBL.
See Also
Sample Output
There is no direct output from the RTOS/NORTOS CPUs on the UART or CCS console. The output is seen on the QNX console on Cortex-A CPU.