EPWM Duty Cycle Sync

Introduction

This example configures EPWM0/1/2 to generate symmetrical, Active-High Complementary (AHC) outputs using EPWM channels A and B:

  • EPWM0/1/2 are synchronized using the daisy-chain connectivity between the EPWM modules. A Software Forced Synchronized Pulse is used at example initialization to simulate a hardware synchronization signal.

  • The Duty Cycle for each EPWM output signal is updated every EPWM period via writes to the CMPA shadow registers in the EPWM ISR, where the Duty Cycle values are proportional to sinusoidal values computed in the ISR.

  • The EPWMs are configured in Up-Down count mode to generate symmetrical outputs. The Deadband submodule is used to generate AHC outputs, where the channel A input is the source for both the rising-edge and falling-edge delays.

The following parameters are configurable at compile-time:

  • EPWM output frequency: 4,8, or 16 kHz

  • Initial Duty Cycle: 0.0 to 100.0 percent of EPWM period

  • Time Base Phase on Sync In event: 0.0 to 100.0 percent of 1/2 EPWM period

  • Deadband Rising Edge and Falling Edge delay

  • Amplitude & frequency of sinusoids

  • Duration of example execution

The following EPWM features are unused in this example:

  • Chopper submodule

  • Trip Zone submodule

  • Event-Trigger submodule interrupt prescaling (every EPWM0 TBCNT=0 event triggers an interrupt)

The table below shows the jumper pins where the EPWM outputs can be observed.

A debug GPIO is driven in the EPWM ISR to show the EPWM period timing. The GPIO output can be observed on the pins (below mentioned) of User Expansion Connector (J4) in the board.

EPWM

EPWM Signal

Pin Details

0

EPWM0_A

D20/GPIO1_15 (Pin_24)

0

EPWM0_B

E20/GPIO1_16 (pin_26)

1

EPWM1_A

E24/GPIO1_9 (Pin_36)

1

EPWM1_B

F23/GPIO1_10 (pin_33)

Supported Combinations

Parameter

Value

CPU + OS

mcu-r5fss0-0 freertos

CPU + OS

wkup-r5fss0-0 freertos

Toolchain

ti-arm-clang

Boards

am62px-sk

Example folder

examples/drivers/epwm/epwm_duty_cycle_sync/

Steps to Run the Example

  • When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects).

  • When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles)

  • To probe the ePWM output please refer setup details as mentioned above in Introduction section

See Also

EPWM

Sample Output

Shown below is a sample output when the application is run.

EPWM Duty Cycle Sync Test Started ...
Please refer to the EXAMPLES_DRIVERS_EPWM_DUTY_CYCLE_SYNC example user guide for the test setup to probe the EPWM signals.
App will wait for 60 seconds (using PWM period ISR) ...
EPWM Duty Cycle Sync Test Passed!!
All tests have passed!!