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AM62Px MCU+ SDK
10.01.00
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49 #ifndef CSL_DSSCOMMON_H_
50 #define CSL_DSSCOMMON_H_
80 #define CSL_DSS_DISPC_INTR_VIDL1_MASK ((uint32_t) 0x20U)
82 #define CSL_DSS_DISPC_INTR_VID1_MASK ((uint32_t) 0x10U)
84 #define CSL_DSS_DISPC_INTR_VP2_MASK ((uint32_t) 0x02U)
86 #define CSL_DSS_DISPC_INTR_VP1_MASK ((uint32_t) 0x01U)
96 #define CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK \
97 ((uint32_t) CSL_DSS_COMMON_VID_IRQENABLE_0_SAFETYREGION_EN_MASK)
99 #define CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK \
100 ((uint32_t) CSL_DSS_COMMON_VID_IRQENABLE_0_VIDENDWINDOW_EN_MASK)
102 #define CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK \
103 ((uint32_t) CSL_DSS_COMMON_VID_IRQENABLE_0_VIDBUFFERUNDERFLOW_EN_MASK)
105 #define CSL_DSS_VID_PIPE_INTR_ALL_MASK \
106 (CSL_DSS_VID_PIPE_INTR_SAFETYVIOLATION_MASK | \
107 CSL_DSS_VID_PIPE_INTR_WINDOWEND_MASK | \
108 CSL_DSS_VID_PIPE_INTR_BUFUNDERFLOW_MASK)
118 #define CSL_DSS_VP_INTR_FRAMEDONE_MASK \
119 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_VPFRAMEDONE_EN_MASK)
121 #define CSL_DSS_VP_INTR_VSYNC_MASK \
122 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_EN_MASK)
124 #define CSL_DSS_VP_INTR_ODDVSYNC_MASK \
125 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_VPVSYNC_ODD_EN_MASK)
127 #define CSL_DSS_VP_INTR_PROGLINENUM_MASK \
128 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_VPPROGRAMMEDLINENUMBER_EN_MASK)
130 #define CSL_DSS_VP_INTR_SYNCLOST_MASK \
131 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNCLOST_EN_MASK)
133 #define CSL_DSS_VP_INTR_ACBIASCOUNT_MASK \
134 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_ACBIASCOUNTSTATUS_EN_MASK)
136 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK \
139 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK \
142 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK \
145 #define CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK \
148 #define CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK \
149 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_SECURITYVIOLATION_EN_MASK)
151 #define CSL_DSS_VP_INTR_GOBITCLEAR_MASK \
152 ((uint32_t) CSL_DSS_COMMON_VP_IRQENABLE_0_VPSYNC_EN_MASK)
154 #define CSL_DSS_VP_INTR_ALL_MASK \
155 (CSL_DSS_VP_INTR_FRAMEDONE_MASK | \
156 CSL_DSS_VP_INTR_VSYNC_MASK | \
157 CSL_DSS_VP_INTR_ODDVSYNC_MASK | \
158 CSL_DSS_VP_INTR_PROGLINENUM_MASK | \
159 CSL_DSS_VP_INTR_SYNCLOST_MASK | \
160 CSL_DSS_VP_INTR_ACBIASCOUNT_MASK | \
161 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION0_MASK | \
162 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION1_MASK | \
163 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION2_MASK | \
164 CSL_DSS_VP_INTR_SAFETYVIOLATION_REGION3_MASK | \
165 CSL_DSS_VP_INTR_SECURITYVIOLATION_MASK | \
166 CSL_DSS_VP_INTR_GOBITCLEAR_MASK)
176 #define CSL_DSS_MFLAG_START_NORMAL \
177 ((uint32_t) CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGNORMALSTARTMODE)
179 #define CSL_DSS_MFLAG_START_FORCED \
180 ((uint32_t) CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_START_VAL_MFLAGFORCESTARTMODE)
190 #define CSL_DSS_MFLAG_CTRL_DISABLED \
191 ((uint32_t) CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGDIS)
193 #define CSL_DSS_MFLAG_CTRL_FORCE_ENABLE \
194 ((uint32_t) CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGFORCE)
196 #define CSL_DSS_MFLAG_CTRL_DYNAMIC \
197 ((uint32_t) CSL_DSS_COMMON_DISPC_GLOBAL_MFLAG_ATTRIBUTE_MFLAG_CTRL_VAL_MFLAGEN)
269 uint32_t intrEnable);
289 uint32_t intrEnable);
309 uint32_t intrEnable);
433 uint32_t portIdMask);
void CSL_dssSetCbaConfig(CSL_dss_commRegs *commRegs, const CSL_DssCbaCfg *cbaCfg)
Set the CBA configuration.
void CSL_dssGlobalVpGoBitEnable(CSL_dss_commRegs *commRegs, uint32_t portIdMask)
Enable the global VP go bit. This allows setting multiple outputs synchronously. The 'OR' result of d...
static void CSL_dssCbaCfgInit(CSL_DssCbaCfg *cbaCfg)
CSL_DssCbaCfg structure init function.
Definition: csl_dssCommon.h:483
void CSL_dssModuleReset(CSL_dss_commRegs *commRegs)
Reset the DSS Module. Application should make sure Video Ports are disabled before calling this API.
#define CSL_DSS_MFLAG_CTRL_DISABLED
Mflag is disabled.
Definition: csl_dssCommon.h:190
uint32_t priLow
Definition: csl_dssCommon.h:226
void CSL_dssClearPipeIntr(CSL_dss_commRegs *commRegs, uint32_t vidPipeId, uint32_t intrMask)
Clear the interrupts for Video Pipe.
#define NULL
Define NULL if not defined.
Definition: csl_types.h:100
CSL_dss_commonRegs CSL_dss_commRegs
DSS Common Registers.
Definition: csl_dssCommon.h:71
uint32_t priHigh
Definition: csl_dssCommon.h:223
uint32_t CSL_dssGetPipeIntrStatus(const CSL_dss_commRegs *commRegs, uint32_t vidPipeId)
Get the interrupt status of Video Pipe.
uint32_t CSL_dssIsOldiResetDone(const CSL_dss_commRegs *commRegs)
Get OLDI reset status.
Definition: cslr_dss.h:53
void CSL_dssEnablePipeIntr(CSL_dss_commRegs *commRegs, uint32_t vidPipeId, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts for Video Pipe.
static void CSL_dssGlobalMFlagCfgInit(CSL_DssGlobalMFlagCfg *mflagCfg)
CSL_DssGlobalMFlagCfg structure init function.
Definition: csl_dssCommon.h:473
uint32_t CSL_dssGetVpIntrStatus(const CSL_dss_commRegs *commRegs, uint32_t portId)
Get the interrupt status of Video Port.
#define CSL_DSS_MFLAG_START_NORMAL
Mflag of each pipe is kept at 0 until preload is reached.
Definition: csl_dssCommon.h:176
void CSL_dssEnableVpIntr(CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts for Video Port.
DSS Global MFLAG Config parameters.
Definition: csl_dssCommon.h:208
void CSL_dssEnableDispcIntr(CSL_dss_commRegs *commRegs, uint32_t intrMask, uint32_t intrEnable)
Enable/disable the interrupts at DSS top level.
void CSL_dssClearDispcIntr(CSL_dss_commRegs *commRegs, uint32_t intrMask)
Clear the interrupts at DSS top level.
uint32_t globalMflagCtrl
Definition: csl_dssCommon.h:213
uint32_t globalMflagStart
Definition: csl_dssCommon.h:209
void CSL_dssGlobalVpEnable(CSL_dss_commRegs *commRegs, uint32_t portIdMask, uint32_t enable)
Enable the global VP enable bit. This allows setting multiple outputs synchronously....
DSS CBA Config parameters.
Definition: csl_dssCommon.h:222
void CSL_dssClearVpIntr(CSL_dss_commRegs *commRegs, uint32_t portId, uint32_t intrMask)
Clear the interrupts for Video Port.
uint32_t CSL_dssGetDispcIntrStatus(const CSL_dss_commRegs *commRegs)
Get the top level interrupt status of DSS.
void CSL_dssSetGlobalMflagConfig(CSL_dss_commRegs *commRegs, const CSL_DssGlobalMFlagCfg *mflagCfg)
Set the global MFLAG configuration.