NO RTOS
Note
A53 will not be available on all SOCs. All references to A53 should be ignored on such SOCs.
Introduction
NORTOS is a SW module that implements APIs which allow the upper layers of SW to run in no-RTOS mode. i.e without any RTOS. The NO RTOS APIs are implemented underneath the Driver Porting Layer (DPL) APIs. This allows the device drivers to run either in no-RTOS mode or with a RTOS.
Features Supported
Common across all CPUs,
Clock APIs to initialize a system tick ISR and allow SW to create multiple SW timers using a single underlying HW timer.
Heap APIs to create arbitrary heaps at user defined memory locations
Semaphore APIs to model a semaphore in no-RTOS environment
HW Timer APIs to setup user defined HW timers beyond the system tick timer.
Logging APIs to log to different consoles like UART, CCS, shared memory, CPU local memory, including logging zones to enable/disable logging.
SysConfig Features
Note
It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.
SysConfig can be used to configure below modules with NORTOS
Clock module to setup system tick timer including the tick duration
Debug Log module to select the console to use for logging as well as enable/disable logging zones
Timer to setup HW timer available on the SOC, including enabling timer interrupt and ISR registration
Features Not Supported
Task APIs are not supported in NORTOS mode. Task APIs necessarily need a RTOS and cannot be used in no-RTOS mode
R5F ISRs,
FIQ mode,
nested interrupts not supported
FPU save/restore not supported.
M4F ISRs,
FPU save/restore not supported.
A53 ISRs,
FIQ mode ISRs not supported.
A53 multi-core SMP mode is not supported.
Important files and directory structure
| Folder/Files | Description |
|---|---|
| ${SDK_INSTALL_PATH}/source/kernel/ | |
| dpl/ | APIs to access NORTOS features |
| ${SDK_INSTALL_PATH}/source/kernel/nortos | |
| lib/ | NORTOS library to link against. Linking to the library in this path enables the application to operate in no-RTOS mode |
| dpl/common/ | NORTOS APIs that are common across all CPUs |
| dpl/m4/ | NORTOS APIs that are specific to M4F CPUs |
| dpl/r5/ | NORTOS APIs that are specific to R5F CPUs |
Additional References
Note
Precise web links are not provided since these can change, search for the document title in google to download the documents
Please also refer to below documents from ARM Ltd. to understand more about R5F, M4F, A53 CPUs including features like MPU, MMU, cache and interrupts.
| Document Title | Description |
|---|---|
| ARM v7R Architecture Reference Manual | Information about ARM architecture that is implemented by R5F. Should be used in conjunction with R5F TRM to understand R5F architecture details. |
| ARM v7M Architecture Reference Manual | Information about ARM architecture that is implemented by M4F. Should be used in conjunction with M4F TRM to understand M4F architecture details. |
| ARM v8A Architecture Reference Manual | Information about ARM architecture that is implemented by A53. Should be used in conjunction with A53 TRM to understand A53 architecture details. |
| ARM Cortex R5F Technical Reference Manual | Information about R5F CPU architecture. |
| ARM Cortex M4F Technical Reference Manual | Information about M4F CPU architecture. |
| ARM Cortex A53 Technical Reference Manual | Information about A53 CPU architecture. |