AM62Px MCU+ SDK  10.01.00
HW Interrupts

Attention
See also FreeRTOS, NO RTOS for list of CPU specific supported and unsupported features.

Features Supported

  • Register a interrupt callback to a specific CPU number
  • Ability to pass user specific argument to the interrupt callback
  • Enable, disable, restore and clear specific CPU interrupts
  • Enable, disable, restore global CPU interrupt
  • For ARM R5,
    • Ability to specify interrupt as FIQ or IRQ, level or pulse
    • Ability to specify interrupt priority
  • For ARM M4,
    • Ability to specify interrupt priority
    • Ability to specify systick ISR and NVIC external interrupt ISR

Features NOT Supported

See also FreeRTOS, NO RTOS for list of unsupported features.

Important Usage Guidelines

  • For ARM R5,
    • TI VIM is the interrupt controller that is supported.
    • HwiP_disable, HwiP_restore, HwiP_enable only affect state of IRQ. FIQ state is not changed
    • Refer ARMv7-R Architecture reference manual and SOC TRM for more details.
  • For ARM M4,
    • ARM NVIC is the interrupt controller that is supported.
    • Interrupt numbers 0 to 15 are for internal interrupts, like reset (1), NMI (2), fault handlers (3-6), SVC (11), PendSV (14), SysTick (15)
    • Interrupt numbers 16 to 80 are used as external NVIC interrupts. The TRM will document M4F interrupt numbers as xxx_M4FSSx_COREx_NVIC_IN_n. This corresponds to interrupt number (16 + n) at NVIC and (16 + n) is used as input to the HwiP APIs
    • Refer ARMv7-M Architecture reference manual and SOC TRM for more details.

Example Usage

Include the below file to access the APIs,

#include <stdio.h>

Example ISR,

void myISR(void *args)
{
/* my ISR */
}

Example to register a ISR for CPU interrupt 10,

HwiP_Params hwiParams;
HwiP_Object hwiObj;
HwiP_Params_init(&hwiParams);
/* for R5F, interrupt #10 at VIM */
hwiParams.intNum = 10;
/* for M4F, external interrupt #10 at NVIC is
16 internal interrupts + external interrupt number at NVIC
i.e hwiParams.intNum = 16 + 10;
*/
/* for C75, CLEC event ID can be mapped to any of the internal interrupt number
set both event ID and interrupt number
to configure harware clec event #10
hwiParams.eventId = 10;
hwiParams.intNum = 31;
to configure software interrupt #31
hwiParams.eventId = HWIP_INVALID_EVENT_ID;
hwiParams.intNum = 31;
*/
hwiParams.callback = myISR;
hwiParams.args = NULL;
HwiP_construct(&hwiObj, &hwiParams);

Example to disable and restore interrupts across a crtical section

uintptr_t oldIntState;
oldIntState = HwiP_disable();
/* critical section */
HwiP_restore(oldIntState);

API

APIs for HW Interrupts

HwiP_Params
Parameters passed during HwiP_construct.
Definition: HwiP.h:74
NULL
#define NULL
Define NULL if not defined.
Definition: csl_types.h:100
HwiP_construct
int32_t HwiP_construct(HwiP_Object *obj, HwiP_Params *params)
Create a Hwi object.
HwiP_Params_init
void HwiP_Params_init(HwiP_Params *params)
Set default values to HwiP_Params.
HwiP.h
HwiP_Params::callback
HwiP_FxnCallback callback
Definition: HwiP.h:77
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:93
HwiP_Params::args
void * args
Definition: HwiP.h:78
HwiP_disable
uintptr_t HwiP_disable(void)
Disable all interrupts.
HwiP_restore
void HwiP_restore(uintptr_t oldIntState)
Restores all interrupts to a given state.
HwiP_Params::intNum
uint32_t intNum
Definition: HwiP.h:76