safety_checkers_soc.h

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/*
 *  Copyright (C) 2024 Texas Instruments Incorporated
 *
 *  Redistribution and use in source and binary forms, with or without
 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
 *    Neither the name of Texas Instruments Incorporated nor the names of
 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
 *  LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
 *  A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
 *  OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
 *  SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
 *  LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
 *  DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
 *  THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
 *  (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 *
 */
 
#ifndef SAFETY_CHECKERS_SOC_H_
#define SAFETY_CHECKERS_SOC_H_
 
/* ========================================================================== */
/*                             Include Files                                  */
/* ========================================================================== */
 
#include "safety_checkers_pm_soc.h"
#include "safety_checkers_rm_soc.h"
 
#ifdef __cplusplus
extern "C" {
#endif
 
/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */
 
#define SAFETY_CHECKERS_PM_PSC_BASE_ADDRESS                       (0x400000UL)
#define SAFETY_CHECKERS_PM_PLL_CFG_BASE_ADDRESS                   (0x680000UL)
#define SAFETY_CHECKERS_PM_MCU_PLL_CFG_BASE_ADDRESS               (0x4040000UL)
 
#define SAFETY_CHECKERS_PM_WKUP_PD_STAT_NUM                       (0x02U)
#define SAFETY_CHECKERS_PM_WKUP_MD_STAT_NUM                       (0x0BU)
#define SAFETY_CHECKERS_PM_PD_STAT_NUM                            (0x16U)
#define SAFETY_CHECKERS_PM_MD_STAT_NUM                            (0x60U)
 
#define SAFETY_CHECKERS_PM_PLL0_LENGTH                            (0xA8U)
#define SAFETY_CHECKERS_PM_PLL1_LENGTH                            (0x9CU)
#define SAFETY_CHECKERS_PM_PLL2_LENGTH                            (0xA8U)
#define SAFETY_CHECKERS_PM_PLL5_LENGTH                            (0x8CU)
#define SAFETY_CHECKERS_PM_PLL6_LENGTH                            (0x84U)
#define SAFETY_CHECKERS_PM_PLL7_LENGTH                            (0x88U)
#define SAFETY_CHECKERS_PM_PLL8_LENGTH                            (0x84U)
#define SAFETY_CHECKERS_PM_PLL12_LENGTH                           (0x84U)
#define SAFETY_CHECKERS_PM_PLL15_LENGTH                           (0x90U)
#define SAFETY_CHECKERS_PM_PLL16_LENGTH                           (0x84U)
#define SAFETY_CHECKERS_PM_PLL17_LENGTH                           (0x84U)
#define SAFETY_CHECKERS_PM_PLL18_LENGTH                           (0x84U)
#define SAFETY_CHECKERS_PM_MCU_PLL0_LENGTH                        (0x9CU)
 
#define TIFS_CHECKER_FWL_MAX_NUM                                  (0x16U)
 
#define SAFETY_CHECKERS_PM_PSC_REGDUMP_SIZE                       (SAFETY_CHECKERS_PM_WKUP_PD_STAT_NUM + \
                                                                   SAFETY_CHECKERS_PM_WKUP_MD_STAT_NUM + \
                                                                   SAFETY_CHECKERS_PM_PD_STAT_NUM + \
                                                                   SAFETY_CHECKERS_PM_MD_STAT_NUM)
 
#define SAFETY_CHECKERS_PM_PLL_REGDUMP_SIZE                       (192U)
 
#define SAFETY_CHECKERS_RM_REGDUMP_SIZE                           (3360U)
 
#define SAFETY_CHECKERS_RM_BA0_IR                                 (CSL_TIMESYNC_EVENT_INTROUTER0_INTR_ROUTER_CFG_BASE)
#define SAFETY_CHECKERS_RM_BA1_IR                                 (CSL_WKUP_MCU_GPIOMUX_INTROUTER0_INTR_ROUTER_CFG_BASE)
#define SAFETY_CHECKERS_RM_BA2_IR                                 (CSL_MAIN_GPIOMUX_INTROUTER0_INTR_ROUTER_CFG_BASE)
 
#define SAFETY_CHECKERS_RM_IR_REG0_NUM                            (64U)
#define SAFETY_CHECKERS_RM_IR_REG1_NUM                            (48U)
#define SAFETY_CHECKERS_RM_IR_REG2_NUM                            (48U)
#define SAFETY_CHECKERS_RM_IR_REG3_NUM                            (32U)
 
#define SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM                         (1U)
 
#define SAFETY_CHECKERS_RM_BA0_IA_IMAP                            (CSL_DMASS0_INTAGGR_IMAP_BASE)
 
#define SAFETY_CHECKERS_RM_REG0_IA_IMAP                           (1536U)
 
#define SAFETY_CHECKERS_RM_SUBMOD0_IA_IMAP                        (1U)
 
#define SAFETY_CHECKERS_RM_BA0_RA                                 (CSL_DMASS0_BCDMA_RING_BASE)
#define SAFETY_CHECKERS_RM_BA1_RA                                 (CSL_DMASS0_PKTDMA_RING_BASE)
#define SAFETY_CHECKERS_RM_BA2_RA                                 (CSL_DMASS0_RINGACC_CFG_BASE)
 
#define SAFETY_CHECKERS_RM_RA_REG0_NUM                            (82U)
#define SAFETY_CHECKERS_RM_RA_REG1_NUM                            (20U)
#define SAFETY_CHECKERS_RM_RA_REG2_NUM                            (150U)
 
#define SAFETY_CHECKERS_RM_SUBMOD0_RA                             (3U)
#define SAFETY_CHECKERS_RM_RA_SUBMOD1                             (5U)
 
#define SAFETY_CHECKERS_RM_BA0_UDMA_TX                            (CSL_DMASS0_BCDMA_TCHAN_BASE)
#define SAFETY_CHECKERS_RM_BA1_UDMA_TX                            (CSL_DMASS0_PKTDMA_TCHAN_BASE)
 
#define SAFETY_CHECKERS_RM_REG0_UDMA_TX                           (22U)
#define SAFETY_CHECKERS_RM_REG1_UDMA_TX                           (29U)
 
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX                        (5U)
 
#define SAFETY_CHECKERS_RM_BA0_UDMA_RX                            (CSL_DMASS0_BCDMA_RCHAN_BASE)
#define SAFETY_CHECKERS_RM_BA1_UDMA_RX                            (CSL_DMASS0_PKTDMA_RCHAN_BASE)
 
#define SAFETY_CHECKERS_RM_REG0_UDMA_RX                           (32U)
#define SAFETY_CHECKERS_RM_REG1_UDMA_RX                           (28U)
 
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX                        (4U)
 
#define SAFETY_CHECKERS_RM_BA0_UDMA_FLW                           (CSL_DMASS0_PKTDMA_RFLOW_BASE)
 
#define SAFETY_CHECKERS_RM_REG0_UDMA_FLW                          (51U)
 
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_FLW                       (1U)
 
#define SAFETY_CHECKERS_RM_BA0_UDMA_GCFG                          (CSL_DMASS0_BCDMA_GCFG_BASE)
#define SAFETY_CHECKERS_RM_BA1_UDMA_GCFG                          (CSL_DMASS0_PKTDMA_GCFG_BASE)
 
#define SAFETY_CHECKERS_RM_REG0_UDMA_GCFG                         (1U)
#define SAFETY_CHECKERS_RM_REG1_UDMA_GCFG                         (1U)
 
#define SAFETY_CHECKERS_RM_SUBMOD0_UDMA_GCFG                      (13U)
#define SAFETY_CHECKERS_RM_SUBMOD1_UDMA_GCFG                      (14U)
 
/* ========================================================================== */
/*                            Global Variables                                */
/* ========================================================================== */
 
/* None */
 
/* ========================================================================== */
/*                         Structure Declarations                             */
/* ========================================================================== */
 
static SafetyCheckers_PmPllData gSafetyCheckers_PmPllData[] =
{
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(0),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL0_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(1),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL1_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(2),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL2_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(5),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL5_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(6),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL6_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(7),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL7_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(8),  gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL8_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(12), gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL12_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(15), gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL15_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(16), gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL17_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(17), gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL17_LENGTH},
    {SAFETY_CHECKERS_PM_PLL_BASE_ADDRESS(18), gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_PLL17_LENGTH},
 
    {SAFETY_CHECKERS_PM_MCU_PLL_BASE_ADDRESS(0), gSafetyCheckers_PmPllRegOffset3, SAFETY_CHECKERS_PM_MCU_PLL0_LENGTH},
};
 
static SafetyCheckers_PmPscData gSafetyCheckers_PmPscData[] =
{
       {SAFETY_CHECKERS_PM_WKUP_PSC_BASE_ADDRESS,   SAFETY_CHECKERS_PM_WKUP_PD_STAT_NUM, SAFETY_CHECKERS_PM_WKUP_MD_STAT_NUM},
       {SAFETY_CHECKERS_PM_PSC_BASE_ADDRESS,        SAFETY_CHECKERS_PM_PD_STAT_NUM,      SAFETY_CHECKERS_PM_MD_STAT_NUM},
};
 
static SafetyCheckers_RmRegData gSafetyCheckers_RmRegData[] =
{
    {SAFETY_CHECKERS_RM_BA0_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG0_NUM,SAFETY_CHECKERS_RM_REG_HEX0, {0X0U}},
    {SAFETY_CHECKERS_RM_BA1_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG1_NUM,SAFETY_CHECKERS_RM_REG_HEX0, {0X0U}},
    {SAFETY_CHECKERS_RM_BA2_IR, SAFETY_CHECKERS_RM_IR_SUBMOD0_NUM, SAFETY_CHECKERS_RM_IR_REG2_NUM,SAFETY_CHECKERS_RM_REG_HEX0, {0X0U}},
    
    {SAFETY_CHECKERS_RM_BA0_IA_IMAP, SAFETY_CHECKERS_RM_SUBMOD0_IA_IMAP, SAFETY_CHECKERS_RM_REG0_IA_IMAP, SAFETY_CHECKERS_RM_REG_HEX0, {0X0U}},
    
    {SAFETY_CHECKERS_RM_BA0_RA, SAFETY_CHECKERS_RM_SUBMOD0_RA, SAFETY_CHECKERS_RM_RA_REG0_NUM, SAFETY_CHECKERS_RM_REG_HEX100, {0x40U, 0x44U, 0x48U}},
    {SAFETY_CHECKERS_RM_BA1_RA, SAFETY_CHECKERS_RM_SUBMOD0_RA, SAFETY_CHECKERS_RM_RA_REG1_NUM, SAFETY_CHECKERS_RM_REG_HEX100, {0x40U, 0x44U, 0x48U}},
    {SAFETY_CHECKERS_RM_BA2_RA, SAFETY_CHECKERS_RM_RA_SUBMOD1, SAFETY_CHECKERS_RM_RA_REG2_NUM, SAFETY_CHECKERS_RM_REG_HEX100, {0x40U, 0x44U, 0x48U, 0x4CU, 0x50U}},
    
    {SAFETY_CHECKERS_RM_BA0_UDMA_TX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX, SAFETY_CHECKERS_RM_REG0_UDMA_TX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x70U, 0x80U}}, 
    {SAFETY_CHECKERS_RM_BA1_UDMA_TX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_TX, SAFETY_CHECKERS_RM_REG1_UDMA_TX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x70U, 0x80U}},
    
    {SAFETY_CHECKERS_RM_BA0_UDMA_RX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX, SAFETY_CHECKERS_RM_REG0_UDMA_RX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x80U}},
    {SAFETY_CHECKERS_RM_BA1_UDMA_RX, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_RX, SAFETY_CHECKERS_RM_REG1_UDMA_RX, SAFETY_CHECKERS_RM_REG_HEX100, {0x0U, 0x64U, 0x68U, 0x80U}},
    
    {SAFETY_CHECKERS_RM_BA0_UDMA_FLW, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_FLW, SAFETY_CHECKERS_RM_REG0_UDMA_FLW, SAFETY_CHECKERS_RM_REG_HEX40, {0x0U}},  
    
    {SAFETY_CHECKERS_RM_BA0_UDMA_GCFG, SAFETY_CHECKERS_RM_SUBMOD0_UDMA_GCFG, SAFETY_CHECKERS_RM_REG0_UDMA_GCFG, SAFETY_CHECKERS_RM_REG_HEX0, {0x0U, 0x04U, 0X08U, 0x10U, 0x20U, 0x24U, 0x28U, 0x2CU, 0x30U, 0x60U, 0x64U, 0x78U, 0x7CU}},
    {SAFETY_CHECKERS_RM_BA1_UDMA_GCFG, SAFETY_CHECKERS_RM_SUBMOD1_UDMA_GCFG, SAFETY_CHECKERS_RM_REG1_UDMA_GCFG, SAFETY_CHECKERS_RM_REG_HEX0, {0x0U, 0x04U, 0X08U, 0x10U, 0x20U, 0x24U, 0x28U, 0x2CU, 0x30U, 0x60U, 0x64U, 0x78U, 0x7CU, 0x88U}},
};
 
/* ========================================================================== */
/*                          Function Declarations                             */
/* ========================================================================== */
 
/* None */
 
/* ========================================================================== */
/*                       Static Function Definitions                          */
/* ========================================================================== */
 
/* None */
 
#ifdef __cplusplus
}
#endif
 
#endif  /* #ifndef SAFETY_CHECKERS_SOC_H_ */