Driver Porting Layer (DPL) demo

Table of Contents

• Introduction
• Supported Combinations
• Steps to Run the Example
• See Also
• Sample Output

Introduction

This example shows a simple application, which setups the CPU and the underlying RTOS or no-RTOS environment on the supported SOC.

The example does the below

• Setup a timer with system tick of 1ms, setup MPU and cache (if available)
• Create a RTOS task (in RTOS example)
• Trigger a ISR and signal a semaphore from ISR to main task
• Show usage of clock delay
• Show usage of cache APIs
• Show usage of heap APIs

Supported Combinations

Parameter	Value
CPU + OS	a53ss0-0 nortos
	a53ss0-0 freertos
	a53ss0-1 nortos
	a53ss0-1 freertos
Toolchain	arm.gnu.aarch64-none
Board	am62lx-evm
Example folder	examples/kernel/dpl/dpl_demo/

Steps to Run the Example

• When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects).
• When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles)
• To Load and Run an example (see Application Run and debugging using CCS)

See Also

Driver Porting Layer (DPL)

Sample Output

Shown below is a sample output when the application is run,

[DPL] Hwi post ...
[DPL] Hwi post ... DONE !!!
[DPL] Sleep for 100 msecs ...
[DPL] Sleep ... DONE (Measured time = 100000 usecs, CPU cycles = 80000055 ) !!!
[DPL] Running cache operations ...
[DPL] Running cache operations ... DONE !!!
[DPL] Heap free size = 1984 bytes
[DPL] Allocated 1023 bytes @ 0x80010440, heap free size = 896 bytes
[DPL] Free'ed 1023 bytes @ 0x80010440, heap free size = 1984 bytes
All tests have passed!

FreeRTOS-AMP Sample Output

Shown below is a sample output on UART0 console (logs for a53ss0-0) when the application is run,

DPL Demo Example started on a53_core0
[DPL] Hwi post ...
[DPL] Hwi post ... DONE !!!
[DPL] Hwi(sgi) post ...
[DPL] Hwi(sgi) post ... DONE !!!
[DPL] Sleep for 100 msecs ...
[DPL] Sleep ... DONE (Measured time = 99052 usecs, CPU cycles = 107978 ) !!!
Note: In case of FREERTOS CPU Cycles will not match with the measured time
    As the "WFI" instruction is called from idle task, which suspends the PMU counter used to measure CPU cycles.
[DPL] Running cache operations ...
[DPL] Running cache operations ... DONE !!!
[DPL] Heap free size = 1984 bytes
[DPL] Allocated 1023 bytes @ 0x82020440, heap free size = 896 bytes
[DPL] Free'ed 1023 bytes @ 0x82020440, heap free size = 1984 bytes
All tests have passed on a53_core0 !!

Shown below is a sample output on UART1 console (logs for a53ss0-1) when the application is run,

DPL Demo Example started on a53_core1
[DPL] Hwi post ...
[DPL] Hwi post ... DONE !!!
[DPL] Hwi(sgi) post ...
[DPL] Hwi(sgi) post ... DONE !!!
[DPL] Sleep for 100 msecs ...
[DPL] Sleep ... DONE (Measured time = 99181 usecs, CPU cycles = 107091 ) !!!
Note: In case of FREERTOS CPU Cycles will not match with the measured time
    As the "WFI" instruction is called from idle task, which suspends the PMU counter used to measure CPU cycles.
[DPL] Running cache operations ...
[DPL] Running cache operations ... DONE !!!
[DPL] Heap free size = 1984 bytes
[DPL] Allocated 1023 bytes @ 0x88020440, heap free size = 896 bytes
[DPL] Free'ed 1023 bytes @ 0x88020440, heap free size = 1984 bytes
All tests have passed on a53_core1 !!