- Attention
- Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines.
- Note
- The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination.
Unless explicitly noted otherwise, the SW modules would work in both FreeRTOS and no-RTOS environment.
Device and Validation Information
SOC | Supported CPUs | EVM | Host PC |
AM62Ax | MCU R5F, DM R5F, C75 | SK-AM62A-LP EVM (referred to as am62ax-sk in code) | Windows 10 64b or Ubuntu 22.04 64b |
Features Added in This Release
Feature | Module |
ECC Functional Test example for single bit errors is added | SDL |
Updated DDR configuration from DDR configuration tool v10.30 | DDR |
Unsupported Features
- Attention
- TI would not support these feature on public e2e.
Feature | Module |
A53 FreeRTOS SMP support and A53 FreeRTOS SMP examples | DPL, FreeRTOS |
Dependent Tools and Compiler Information
- Attention
- It is recommended to use the TIFS version provided with the release for ensuring compatibility between TIFS and device manager. Using the TIFS from different MCU+SDK release is not recomended and may cause TIFS/ DM functionality to break.
Tools | Supported CPUs | Version |
Code Composer Studio | MCU-R5F, C75 | 20.2.0 |
SysConfig | MCU-R5F, DM-R5F, C75 | 1.24.0, build 4150 |
TI ARM CLANG | MCU-R5F, DM-R5F | 4.0.1.LTS |
GCC AARCH64 | A53 | 9.2-2019.12 |
C7000-CGT | C75 | 4.1.0.LTS |
FreeRTOS Kernel | MCU-R5F, DM-R5F, C75 | 11.1.0 |
SDK Components
SYSFW / TIFS
Version | 11.01.05 |
Release Notes | LINK |
User Guide | LINK |
Key Features
OS Kernel
OS | Supported CPUs | SysConfig Support |
FreeRTOS Kernel | MCU-R5F, DM-R5F, C75 | NA |
FreeRTOS POSIX | MCU-R5F | NA |
No RTOS | MCU-R5F, DM-R5F | NA |
Driver Porting Layer (DPL)
Module | Supported CPUs | SysConfig Support | OS support |
Address Translate | MCU-R5F, DM-R5F | Yes | FreeRTOS, NORTOS |
Cache | MCU-R5F, DM-R5F, C75 | Yes | FreeRTOS, NORTOS |
Clock | MCU-R5F, DM-R5F, C75 | Yes | FreeRTOS, NORTOS |
CycleCounter | MCU-R5F, DM-R5F, C75 | NA | FreeRTOS, NORTOS |
Debug | MCU-R5F, DM-R5F, C75 | Yes | FreeRTOS, NORTOS |
Heap | MCU-R5F, DM-R5F, C75 | NA | FreeRTOS, NORTOS |
Hwi | MCU-R5F, DM-R5F, C75 | Yes | FreeRTOS, NORTOS |
MPU | MCU-R5F, DM-R5F, C75 | Yes | FreeRTOS, NORTOS |
Semaphore | MCU-R5F, DM-R5F, C75 | NA | FreeRTOS, NORTOS |
Task | MCU-R5F, DM-R5F, C75 | NA | FreeRTOS |
Timer | MCU-R5F, DM-R5F | Yes | FreeRTOS, NORTOS |
Secondary Bootloader (SBL)
SBL Mode | Supported CPUs | SysConfig Support | PHY Support | DMA Support | OS support |
OSPI NAND | DM-R5F | Yes | No | Yes | NORTOS |
EMMC | DM-R5F | Yes | NA | NA | NORTOS |
UART | DM-R5F | Yes | NA | No | NORTOS |
SOC Device Drivers
- Note
- See the updated MCASP usage guidelines in MCASP for changes in MCASP driver
Peripheral | Domain | Supported CPUs | SysConfig Support |
DDR | Main | DM-R5F | Yes |
ECAP | Main | DM-R5F , C75 | Yes |
EPWM | Main | MCU-R5F, DM-R5F , C75 | Yes |
EQEP | Main | DM-R5F , C75 | Yes |
GPIO | MCU | MCU-R5F, DM-R5F , C75 | Yes |
Main | MCU-R5F, DM-R5F , C75 | Yes |
I2C | Main | MCU-R5F, DM-R5F , C75 | Yes |
MCU | MCU-R5F, DM-R5F | Yes |
Wakeup | MCU-R5F, DM-R5F | Yes |
IPC | Main | MCU-R5F, DM-R5F , C75 | Yes |
MCAN | MCU | MCU-R5F | Yes |
MCASP | Main | DM-R5F , C75 | Yes |
MCSPI | Main | MCU-R5F, DM-R5F | Yes |
MCU | MCU-R5F, DM-R5F | Yes |
MMCSD | Main | DM-R5F | Yes |
OSPI | Main | DM-R5F | Yes |
Pinmux | Main | MCU-R5F, DM-R5F , C75 | Yes |
MCU | MCU-R5F, DM-R5F , C75 | Yes |
Wakeup | MCU-R5F, DM-R5F , C75 | Yes |
RTC | Main | MCU-R5F, DM-R5F | Yes |
SOC | NA | MCU-R5F, DM-R5F , C75 | Yes |
SCIClient | NA | MCU-R5F, DM-R5F , C75 | Yes |
UART | Main | MCU-R5F, DM-R5F , C75 | Yes |
MCU | MCU-R5F, DM-R5F | Yes |
Wakeup | DM-R5F | Yes |
UDMA | Main | MCU-R5F, DM-R5F , C75 | Yes |
- Note
- Refer Accessing main and wakeup domain peripherals from MCU domain for accessing main/wakeup peripherals from MCU Domain.
Board Device Drivers
Peripheral | Supported CPUs | SysConfig Support |
EEPROM | MCU-R5F | Yes |
Flash | DM-R5F | Yes |
LED | MCU-R5F | Yes |
SDL
SDL Module | Supported CPUs | SysConfig Support |
MCRC | MCU-R5F | No |
ESM | MCU-R5F | No |
VTM | MCU-R5F | No |
DCC | MCU-R5F | No |
RTI | MCU-R5F | No |
POK | MCU-R5F | No |
STOG | MCU-R5F | No |
MTOG | MCU-R5F | No |
ECC | MCU-R5F | No |
PBIST | MCU-R5F | No |
LBIST | MCU-R5F | No |
ROM Checksum | MCU-R5F | No |
Fixed Issues
ID | Head Line | Module | Applicable Releases |
EXT_EP-12721 | ECC TCM example cannot be built for AM62A | SDL | 11.01.00 |
EXT_SITMPUSW-105 | MMCSD driver uses snprintf function from libc | MMCSD | 11.01.00 |
EXT_SITMPUSW-77 | Modify Read capture delay logic for Tap Mode | OSPI | 11.00.00 |
EXT_SITMPUSW-106 | OSPI Phy Tuning Data is not written correctly in Flash_norOspiOpen() | OSPI | 10.01.00 |
Known Issues
ID | Head Line | Module | Reported in release | Workaround |
EXT_SITMPUSW-1085 | Flash_eraseSector and Flash_norOspiEraseSector does not erases the mentioned sector. | Flash | 11.00.00 | No known workaround |
EXT_SITMPUSW-28 | Outstanding mailbox messages prevent suspend | IPC | 08.03.00 | No known workaround |
EXT_SITMPUSW-107 | AM62A : Reset Isolation sequence is wrong | Reset | 11.00.00 | No known workaround |
EXT_SITMPUSW-109 | Wrong comments on HwiP_inISR() API | DPL | 11.00.00 | No known workaround |
EXT_SITMPUSW-78 | MMCSD Sysconfig provides options to configure PHY type | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-84 | MMCSD error recovery sequence isn't implemented correctly | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-110 | eMMC Init Code Missing DLL Register Settings needed for Initial Legacy SDR Mode Phase | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-113 | eMMC PHY I/O Calibration not getting executed during eMMC boot | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-114 | MMCSD_enableBootPartition implements two mutually exclusive concepts as one function | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-123 | MMCSD driver does not follow the SWITCH command sequence correctly | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-124 | EXTCSD HS_TIMING register is set incorrectly at certain places in the driver | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-125 | MMCSD driver uses infinite loop instead of timeout for checking fields of PRESENTSTATE register | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-126 | Timing issues with MMCSD host controller driver | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-128 | EMMC timiing parameters to be changed based on SOC and MMC instance | MMCSD | 11.00.00 | No known workaround |
EXT_SITMPUSW-117 | Linux Kernel IPC Examples are broken | IPC | 11.00.00 | Change ti.ipc4.ping-pong to rpmsg-client-sample in the example |
EXT_SITMPUSW-120 | C7x task size/alignment should be 8KB (not 16KB) | FreeRTOS | 11.00.00 | Change the stack alignment |
EXT_SITMPUSW-121 | FORCE bit not book keeped properly for MCSPI DMA mode of operation | MCSPI | 11.00.00 | No known workaround |
EXT_SITMPUSW-122 | HSM core does not boot | SBL | 11.00.00 | No known workaround |
EXT_SITMPUSW-133 | Falcon Boot through SBL is not supported | SBL | 09.02.00 | No known workaround |
EXT_SITMPUSW-136 | dmautils_autoincrement example fails on AM62A | SBL | 09.02.00 | No known workaround |
EXT_EP-12281 | AM62A: ECC: ECC is failing for 2 Bit VTM selftest - ECC Unit test fails at the API call ECC_Test_runECC2BitVTM0selfTest() | SDL | 10.01.00 | No known workaround |
EXT_EP-12276 | ECC: Firewall related aggregators failures - ECC Aggregators SDL_SMS0_SMS_TIFS_ECC, SDL_SMS0_SMS_HSM_ECC and SDL_SA3_SS0_SA3SS_AM62A_DMSS_ECCAGGR fail because of firewall access issues faced by SDL | SDL | 10.01.00 | No known workaround |
EXT_EP-12280 | Running MCU LBIST on SBL causes JTAG connection issues to MCU R5F - Running MCU LBIST on SBL causes JTAG connection issues to MCU R5F on AM62ax | SDL | 09.00.00 | No known workaround |
EXT_EP-12283 | ECC aggregators CPSW0, CSI RX are failing on AM62A and CPSW0 on AM62D. | SDL | 09.00.00 | No known workaround |
Limitations
S.No | Head Line | Module |
1 | The ROM startup model for runtime initializations in TI ARM CLANG is not supported/tested in the SDK | NA |
2 | PHY mode not supported for OSPI NAND SBL on DDR mode. It is supported for SDR mode only | Bootloader |
Upgrade and Compatibility Information
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
The below table captures the list of migration document sections when migrating from one version to another. The migration for a partcluar module will be applicable, if you are migrating from older version listed to newer version listed on the table below.
Networking
Module | Affected API | Change |
TSN | notify_linkchange | notify_linkchange function is renamed to cb_lld_notify_linkchange , include path <tsn_combase/tilld/cb_lld_ethernet.h> in the file that uses cb_lld_notify_linkchange . |