aasrc_dma.h

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/*
 *  Copyright (C) 2025 Texas Instruments Incorporated
 *
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 *  modification, are permitted provided that the following conditions
 *  are met:
 *
 *    Redistributions of source code must retain the above copyright
 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
 *
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
 *  "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
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 *  OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
 */
 
 #ifndef AASRC_DMA_H_
 #define AASRC_DMA_H_
 
 /* ========================================================================== */
 /*                             Include Files                                  */
 /* ========================================================================== */
 
 /* None */
 
 #ifdef __cplusplus
 extern "C" {
 #endif
 
 /* ========================================================================== */
 /*                           Macros & Typedefs                                */
 /* ========================================================================== */
 
 /* Element count in Tx Ring */
#define  AASRC_TX_DMA_RING_ELEM_CNT         (1U)
 
/* TR count in TX TRPD */
#define  AASRC_TX_DMA_TR_COUNT              (64U)
 
/* Element count in Rx Ring */
#define  AASRC_RX_DMA_RING_ELEM_CNT         (1U)
 
/* TR count in RX TRPD */
#define  AASRC_RX_DMA_TR_COUNT              (64U)
 
#define AASRC_DMA_L0_MAX_XFER_SIZE          (65535U)
#define AASRC_DMA_UDMA_XFER_SIZE            (64512U)
#define AASRC_DMA_TX_CH_FIFO_DEPTH          (128U)
#define AASRC_DMA_RX_CH_FIFO_DEPTH          (128U)
 
#define AASRC_UDMA_TRPD_MEM_SIZE_TX         (UDMA_GET_TRPD_TR3_SIZE(AASRC_TX_DMA_TR_COUNT))
#define AASRC_UDMA_TRPD_MEM_SIZE_RX         (UDMA_GET_TRPD_TR3_SIZE(AASRC_RX_DMA_TR_COUNT))
 
#define AASRC_UDMA_RING_ENTRY_SIZE          (sizeof(uint64_t))
#define AASRC_UDMA_RING_MEM_SIZE_TX         (AASRC_TX_DMA_RING_ELEM_CNT * AASRC_UDMA_RING_ENTRY_SIZE)
#define AASRC_UDMA_RING_MEM_SIZE_RX         (AASRC_RX_DMA_RING_ELEM_CNT * AASRC_UDMA_RING_ENTRY_SIZE)
 
/* DMA perpertual reload count */
#define AASRC_DMA_PERPETUAL_RELOAD_CNT      (0x1FFU)
 
#define WORD_BYTE_COUNT                     (4U)
 
#define AASRC_INVALID_TXN_IDX               (0xDEADBEEFU)
 
#define AASRC_ICNT2_MAX                     (65535U)
 
 /* ========================================================================== */
 /*                         Structure Declarations                             */
 /* ========================================================================== */
 
typedef struct AASRC_DMAChConfig_s
{
    void            *txChHandle;
    void            *rxChHandle;
    void            *cqTxEvtHandle;
    void            *cqRxEvtHandle;
    void            *txTrpdMem;
    void            *rxTrpdMem;
    uint32_t        trpdMemSize;
    void            *txRingMem;
    void            *rxRingMem;
    void            *txCbParams;
    void            *rxCbParams;
    uint32_t        rxEvtNum;
    uint32_t        txEvtNum;
    uint32_t        isOpen;
}AASRC_DmaChCfg;
 
 typedef struct
{
    uint8_t initDone;
    uint32_t txnByteCnt;
    uint16_t icnt0;
    uint16_t icnt1;
    uint16_t icnt2;
    uint16_t icnt3;
} AASRC_DmaIcnt;
 
 
/* ========================================================================== */
/*                         API Function Declarations                          */
/* ========================================================================== */
 
/* None */
 
/* ========================================================================== */
/*                       Local Function Definitions                           */
/* ========================================================================== */
 
int32_t AASRC_dmaChOpen(AASRC_ChHandle chHandle);
 
int32_t AASRC_dmaChEnable(AASRC_ChHandle chHandle);
 
int32_t AASRC_dmaChDisable(AASRC_ChHandle chHandle);
 
int32_t AASRC_dmaChClose(AASRC_ChHandle chHandle);
 
int32_t AASRC_disableDmaRx(AASRC_ChHandle chHandle);
 
int32_t AASRC_disableDmaTx(AASRC_ChHandle chHandle);
 
 
#ifdef __cplusplus
}
#endif
 
#endif /* #ifndef AASRC_DMA_H_ */