bootloader_soc.h

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/*
 *  Copyright (C) 2021-2023 Texas Instruments Incorporated
 *
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 *    notice, this list of conditions and the following disclaimer.
 *
 *    Redistributions in binary form must reproduce the above copyright
 *    notice, this list of conditions and the following disclaimer in the
 *    documentation and/or other materials provided with the
 *    distribution.
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 *    its contributors may be used to endorse or promote products derived
 *    from this software without specific prior written permission.
 *
 *  THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
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 */
 
#ifndef BOOTLOADER_SOC_AM273X_H_
#define BOOTLOADER_SOC_AM273X_H_
 
#ifdef __cplusplus
extern "C"
{
#endif
 
 
#include <drivers/hw_include/cslr_soc.h>
#include <drivers/hsmclient.h>
/* ========================================================================== */
/*                           Macros & Typedefs                                */
/* ========================================================================== */
 
#define BOOTLOADER_DEVTYPE_HSSE         (0x0AU)
 
#define BOOTLOADER_DEVTYPE_HSFS         (0xAAU)
 
#define BOOTLOADER_DEVTYPE_GP           (0x03U)
 
#define BOOTLOADER_CLIENT_ID            (0x02)
 
#define BOOTLOADER_SOC_EFUSE_REG_ROW11 (0x030E0424)
 
#define BOOTLOADER_SOC_DSP_PART_MASK   (0x70U)
#define BOOTLOADER_SOC_DSP_PART_450MHZ (0x00)
#define BOOTLOADER_SOC_DSP_PART_480MHZ (0x10)
#define BOOTLOADER_SOC_DSP_PART_500MHZ (0x20)
#define BOOTLOADER_SOC_DSP_PART_550MHZ (0x30)
#define BOOTLOADER_SOC_DSP_PART_600MHZ (0x40)
#define BOOTLOADER_SOC_DSP_PART_DITHER (0x50)
#define BOOTLOADER_SOC_DSP_PART_300MHZ (0x60)
 
#define BOOTLOADER_SOC_R5_FREQ_MASK    (uint32_t)(1U << 21U)
#define BOOTLOADER_SOC_R5_PART_400MHZ  (0x00000000)
#define BOOTLOADER_SOC_R5_PART_200MHZ  (uint32_t)(1U << 21U)
 
#define BOOTLOADER_SOC_EFUSE_DUAL_CORE_DIS_MASK    (uint32_t)(1U << 14U)
#define BOOTLOADER_SOC_VARIANT_DUAL_R5F            (0x00000000)
#define BOOTLOADER_SOC_VARIANT_SINGLE_R5F          (uint32_t)(1U << 14U)
 
typedef struct
{
    uint32_t defaultClockHz;
    char coreName[8];
 
} Bootloader_CoreBootInfo;
 
typedef struct Bootloader_socCoreOpModeConfig_s
{
    uint32_t r5fss0_opMode;
} Bootloader_socCoreOpModeConfig;
 
int32_t  Bootloader_socCpuRequest(uint32_t cpuId);
 
int32_t  Bootloader_socCpuRelease(uint32_t cpuId);
 
int32_t  Bootloader_socCpuSetClock(uint32_t cpuId, uint32_t cpuHz);
 
uint64_t Bootloader_socCpuGetClock(uint32_t cpuId);
 
uint32_t Bootloader_socCpuGetClkDefault(uint32_t cpuId);
 
int32_t  Bootloader_socCpuPowerOnReset(uint32_t cpuId,void *socCoreOpMode);
 
int32_t  Bootloader_socCpuResetRelease(uint32_t cpuId, uintptr_t entryPoint);
 
int32_t  Bootloader_socCpuResetReleaseSelf(void);
 
int32_t  Bootloader_socCpuSetEntryPoint(uint32_t cpuId, uintptr_t entryPoint);
 
uint32_t Bootloader_socTranslateSectionAddr(uint32_t cslCoreId, uint32_t addr);
 
uint32_t Bootloader_socRprcToCslCoreId(uint32_t rprcCoreId);
 
uint32_t* Bootloader_socGetSelfCpuList(void);
 
char* Bootloader_socGetCoreName(uint32_t cpuId);
 
int32_t Bootloader_socMemInitCpu(uint32_t cpuId);
 
int32_t Bootloader_socSecHandover(void);
 
void Bootloader_socConfigurePll(void);
 
int32_t Bootloader_socAuthImage(uint32_t certLoadAddr);
 
uint32_t Bootloader_socIsAuthRequired(void);
 
void Bootloader_socLoadHsmRtFw(HsmClient_t *gHSMClient, const uint8_t *HsmRtFw, uint32_t hsmRTSize);
 
void Bootloader_socGetBootSeqOid(uint8_t* boot_seq_oid);
 
uint32_t Bootloader_socGetCoreVariant(void);
 
#ifdef __cplusplus
}
#endif
 
#endif /* BOOTLOADER_SOC_AM64X_H_ */