QSPI Low Level Driver

Table of Contents

• Features Supported
• SysConfig Features
• Features NOT Supported
• Usage Overview
  • API Sequence
• Example Usage
• API

Features Supported

• Support for Single, Dual or Quad read operation.
• Support for Interrupt mode.
• Support for DMA read.
• Programmable Signal Polarities
• Programmable Active Clock Edge
• Programmable Delay between chip select activation and output data from 0 to 3 QSPI clock cycles

SysConfig Features

Note

It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.

• QSPI instance name
• Input clock frequency to be used for QSPI module
• Input clock divider which decides the baud-rate at which the flash will be read
• Chip Select
• Enabling DMA mode
• In advanced config, you can choose various parameters like frame format, decoder chip select polarity, read dummy cycles, SDK Infra and QSPI Interrupt.

Features NOT Supported

• Dual and Quad writes are not supported.

Usage Overview

API Sequence

To use the QSPI driver to send data over the SPI bus, the application calls the following APIs:

• QSPI_lld_init(): Initialize the QSPI driver.
• QSPI_lld_read() / QSPI_lld_readCmdIntr() / QSPI_lld_readDma(): Read data in Polling, Interrupt, and DMA mode respectively.
• QSPI_lld_writeCmd / QSPI_lld_writeCmdIntr(): Write data in Config mode and Interrupt mode.
• QSPI_lld_deInit(): De-initialize the QSPI instance.

Example Usage

Include the below file to access the APIs

#include <stdio.h>
#include <string.h>
#include <drivers/qspi/v0/lld/qspi_lld.h>
#include <kernel/dpl/MutexArmP.h>
#include <kernel/dpl/DebugP.h>
#include <kernel/nortos/dpl/r5/HwiP_armv7r_vim.h>

Instance Open Example

    int32_t status = QSPI_SYSTEM_SUCCESS;
    gQspiHandle = &gQspiObject[CONFIG_QSPI0];
 
    status = QSPI_lld_init(gQspiHandle);
    DebugP_assert(status == QSPI_SYSTEM_SUCCESS);

Instance Close Example

    int32_t status = QSPI_SYSTEM_SUCCESS;
 
    status = QSPI_lld_deInit(gQspiHandle);
    DebugP_assert(status == QSPI_SYSTEM_SUCCESS);

Blocking Read Example

void writeRead_blocking(void)
{
    int32_t status = SystemP_SUCCESS;
    QSPILLD_WriteCmdParams msg = {0};
 
    msg.cmd = QSPI_NOR_PAGE_PROG;
    msg.cmdAddr = APP_QSPI_FLASH_OFFSET;
    msg.dataLen = APP_QSPI_DATA_SIZE;
    msg.numAddrBytes = QSPI_ADDR_BYTES;
    msg.dataBuf = (void *)gQspiTxBuf;
    status = QSPI_lld_writeCmd(gQspiHandle, &msg);
 
    status = QSPI_lld_read(gQspiHandle,APP_QSPI_DATA_SIZE,gQspiRxBuf,APP_QSPI_FLASH_OFFSET,SystemP_WAIT_FOREVER);
    if(status == SystemP_SUCCESS)
    {
        DebugP_log("QSPI Read Success");
    }
    else
    {
        DebugP_log("QSPI Read Fail");
    }
}

Non-Blocking Example ISR Register

static __attribute__((__section__(".text.hwi"), noinline, naked, target("arm"), aligned(4))) void App_QSPI_ISR(void)
{
    ISR_CALL_LEVEL_NONFLOAT_REENTRANT(QSPI_lld_isr, \
                                      gQspiHandle, \
                                      intrNum, \
                                      gQSPIVimStsAddr, \
                                      gQSPIVimStsClrMask,
                                      intcBaseAddr);
}

Non-Blocking Transfer Example

void transfer_nonblocking(void)
{
    int32_t status = SystemP_SUCCESS;
    uint32_t itr = 0U;
    QSPILLD_WriteCmdParams msg = {0};
 
    /*  Interrupt configuration and registration*/
    gQspiHandle->interruptCallback = isrCallback;
    intrNum = gQspiHandle->hQspiInit->intrNum;
    intcBaseAddr = gHwiConfig.intcBaseAddr;
    gQSPIVimStsAddr = intcBaseAddr + (0x404u + (((intrNum)>> 5) & 0xFu) * 0x20u);
    gQSPIVimStsClrMask = 0x1u << ((intrNum) & 0x1Fu);
 
    /* Register Interrupt */
    HwiP_setPri(intrNum, 4U);
    HwiP_setVecAddr(intrNum, (uintptr_t)&App_QSPI_ISR);
    HwiP_enableInt(intrNum);
 
    /* Populating the command and Tx buffer*/
    msg.dataLen = APP_QSPI_DATA_SIZE;
    msg.dataBuf = gQspiTxBuf;
    msg.cmdAddr = APP_QSPI_FLASH_OFFSET;
    msg.cmd = QSPI_NOR_PAGE_PROG;
    msg.numAddrBytes = QSPI_ADDR_BYTES;
    status = QSPI_lld_writeCmdIntr(gQspiHandle,&msg);
    if (status == SystemP_SUCCESS )
    {
        while(try_lock_mutex(&transferMutex) == MUTEX_ARM_LOCKED);
    }
    else
    {
        DebugP_log("QSPI Write Fail");
    }
    /* Mutex Lock */
    transferMutex = MUTEX_ARM_LOCKED;
 
    msg.dataBuf = gQspiRxBuf;
    msg.cmd = QSPI_NOR_CMD_SINGLE_READ;
    msg.numAddrBytes = QSPI_ADDR_BYTES;
 
    QSPI_lld_readCmdIntr(gQspiHandle,&msg);
    if (status == SystemP_SUCCESS )
    {
        while(try_lock_mutex(&transferMutex) == MUTEX_ARM_LOCKED);
    }
    else
    {
        DebugP_log("QSPI Write Fail");
    }
 
    for(itr = 0U; itr < APP_QSPI_DATA_SIZE; itr++)
    {
        if(gQspiTxBuf[itr] != gQspiRxBuf[itr])
        {
            status = SystemP_FAILURE;
            DebugP_logError("QSPI read data mismatch %d !!!\r\n",itr);
            break;
        }
    }
 
    if (status == SystemP_SUCCESS)
    {
        DebugP_log("QSPI Write and Read PASS");
    }
 
    /* De-Register Interrupt */
    HwiP_setVecAddr(intrNum, 0);
    HwiP_disableInt(intrNum);
}

Non-Blocking Example ISR callback

void isrCallback(void *args)
{
    unlock_mutex(&transferMutex);
}

API

APIs for QSPI LLD