DSP LIB package is modified to fix the build in Linux environment from the base version dsplib_c66x_3_4_0_0
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Cache | R5F, C66x | YES | FreeRTOS, safeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F, C66x | YES | FreeRTOS, safeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is running | - |
| CycleCounter | R5F, C66x | NA | FreeRTOS, safeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F, C66x | YES | FreeRTOS, safeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F, C66x | NA | FreeRTOS, safeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F, C66x | YES | FreeRTOS, safeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
| MPU | R5F | YES | FreeRTOS, safeRTOS, NORTOS | Setup MPU and control access to address space | - |
| Semaphore | R5F, C66x | NA | FreeRTOS, safeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexes with timeout | - |
| Task | R5F, C66x | NA | FreeRTOS, safeRTOS | Create, delete tasks | - |
| Timer | R5F, C66x | YES | FreeRTOS, safeRTOS, NORTOS | Configure arbitrary timers | - |
| Event | R5F, C66x | YES | FreeRTOS, safeRTOS | Setting, getting, clearing, and waiting of Event bits | - |
| Queue | R5F, C66x | NA | FreeRTOS, safeRTOS, NORTOS | Enqueue, dequeue, status | - |
| Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
| ADCBUF | R5F, C66x | YES | No | Source selection, Set chirp thresholds, continuous mode, configure modes | - |
| CBUFF | R5F, C66x | YES | YES | stream data over LVDS interface | - |
| CRC | R5F, C66x | YES | NA | Two channels, 8, 16, 32 and 64 bit data size, CPU mode | - |
| CSI-RX | R5F, C66x | YES | NA | Setup complexio, dphy, common and context settings, event callbacks | - |
| ECAP | R5F, C66x | YES | NA | Frequency, Duty cycle, interrupt mode | PWM mode not tested |
| EDMA | R5F, C66x | YES | NA | Basic memory copy, DMA/QDMA channels, Interrupt/Polled, Manual/Event trigger, Chaining | - |
| EPWM | R5F | YES | NA | Frequency, Duty cycle, interrupt mode | Tripzone, Deadband and Chopper module not tested |
| ESM | R5F, C66x | YES | NA | Group and Error number selection, Tested ESM notifier with watchdog module | - |
| GPADC | R5F, C66x | YES | NA | 10-bit ADC, Tested single/multiple buffer and on board temperature sensor read | - |
| GPIO | R5F, C66x | YES | NA | Basic input/output, GPIO as interrupt | - |
| HWA | R5F, C66x | YES | YES | FFT, CFAR, compression/decompression and local maxima modules, Interrupt/Polled, Manual/DMA trigger | - |
| I2C | R5F, C66x | YES | No | Controller mode, basic read/write, polling and interrupt mode | Peripheral mode not supported. Driver not tested from C66x due to EVM limitations |
| IPC Notify | R5F, C66x | YES | NA | Low latency IPC between RTOS/NORTOS CPUs | - |
| IPC Rpmsg | R5F, C66x | YES | NA | RPMessage protocol based IPC for all R5F, C66x running NORTOS/FreeRTOS | - |
| MCAN | R5F | YES | NA | RX, TX, interrupt and polling mode | - |
| MIBSPI | R5F, C66x | YES | YES | Controller/Peripheral mode, basic read/write, Interrupt/Polled, icount enable/disable, CPU/DMA mode | - |
| MCASP | R5F, C66x | YES | YES | Controller mode, transmit/receive, Interrupt/DMA, serializer config | - |
| Pinmux | R5F, C66x | YES | NA | Tested with multiple peripheral pinmuxes | - |
| PMU | R5F | NO | NA | Tested various PMU events | Counter overflow detection is not enabled |
| QSPI | R5F | YES | YES | Read direct, Write indirect, Read/Write commands | Interrupt mode not supported, Dual and Quad writes are not supported |
| SOC | R5F, C66x | YES | NA | Lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency, SW Warm Reset, Address Translation | - |
| UART | R5F, C66x | YES | YES | Basic read/write, polling, interrupt mode, CPU/DMA mode | - |
| WATCHDOG | R5F, C66x | YES | NA | Window size and Expiry time selections, Reset mode, Digital windowed | - |
| Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
| LwIP | R5F | NO | FreeRTOS | TCP/UDP IP networking stack, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, | Other LwIP features |
| Ethernet driver (ENET) | R5F | NO | FreeRTOS | Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, interrupt pacing, Policer and Classifier, MDIO Manual Mode, CBS (IEEE 802.1Qav) | Ethernet as switch, MII and RMII modes |
| Mbed-TLS | R5F | NO | FreeRTOS | Tested software cryptography after porting, used mbedTLS with LwIP to implement HTTPS server | Hardware offloaded cryptography |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| MCRC | R5F, C66 | NA | NORTOS | Full CPU Mode, Auto CPU Mode and Semi CPU Mode. | - |
| DCC | R5F, C66 | NA | NORTOS | Single Shot Mode, Continuous Mode | - |
| PBIST | R5F | NA | NORTOS | Memories supported by MSS and DSS PBIST controller. | - |
| ESM | R5F, C66 | NA | NORTOS | Tested in combination with RTI, DCC, ECC | - |
| RTI | R5F, C66 | NA | NORTOS | WINDOWSIZE_100_PERCENT, WINDOWSIZE_50_PERCENT ,Latency/Propagation timing error(early)(50% window),Latency/Propagation timing error(late)(50% window) | - |
| ECC | R5F, C66 | NA | NORTOS | ECC of MSS_L2, Mailbox, TPTC, R5SS TCM, MCAN, VIM, DSP L1/L2/L3, HWA | R5F Cache |
| ECC Bus Safety | R5F, C66 | NA | NORTOS | Bus Safety of Mailbox, DSS L3, HWA, ADCBUF, DSS_PCR, MSS_TPTC, CORE A and B AHB, MCRC, MSS_CR5 ,MSS_QSPI, MSS_PCR, MSS_SWBUF, MSS_GPADC, DSS_DSP_SDMA,MSS_TO_MDO | MSS_CPSW, MSS_L2, DAP_R232, DSS_DSP_MDMA |
| HWA | C66 | NA | NORTOS | Parity on Data Memories, Window Memory and FSM Lockstep | - |
| CCM | R5F | NA | NORTOS | CCM Self Test Mode, Error Forcing Mode and Self Test Error Forcing Mode | - |
| R5F STC(LBIST) | R5F | NA | NORTOS | STC of R5F and DSP. | - |
| ID | Head Line | Module | Applicable Releases | Resolution/Comments |
| MCUSDK-9811 | IPC Notify unregister client always returns success | IPC | 8.05.00 onwards | Added status variable check |
| MCUSDK-9835 | SBL should support HS-SE device build via CCS | SBL | 8.05.00 onwards | Added devconfig for CCS build |
| MCUSDK-10144 | RTI driver Up Counter calculation in driver is incorrect | Timer | 8.06.00 onwards | Updated calculation to subtract reload value by one |
| MCUSDK-10690 | EPWM Driver configures wrong register in "SOC_setEpwmTbClk" API | EPWM | 8.05.00 onwards | - |
| MCUSDK-10841 | SBL needs to copy the vector table for self core right before the self-core reset release | SBL | 8.06.00 onwards | Move the image load for self core just before the release reset instead of doing it early |
| MCUSDK-11207 | Incorrect IOCTL params for CPSW ENET_TIMESYNC_IOCTL_SET_TIMESTAMP | Networking | 8.5.0 | - |
| MCUSDK-10775 | Example build failing on enabling External Phy Management | Networking | 8.6.0 | - |
| ID | Head Line | Module | Applicable Releases | Workaround
|
| MCUSDK-3897 | MCASP Audio playback demo does not work in interrupt mode | MCASP | 8.03.00 onwards | Use the McASP in DMA mode |
| MCUSDK-5873 | FIQ handler data missing in HwIP_armv7r_handlers_nortos_asm.S file | DPL | 8.03.00 onwards | None |
| MCUSDK-10978 | CCS build doesn't support for HS appimages generation | CCS | 09.00.00 | Use make/gmake based build for HS-SE |
mbedTLS-advisory
MCUSDK-9082 | MbedTLS - RSA exploit by kernel-privileged cache side-channel attackers | Mbed-TLS | 8.6.0 onwards | -
|
| MCUSDK-3899 | MIBSPI non-DMA mode transfer doesn't complete when used in mmWaveSDK | MIBSPI | 8.00.01 | None. Issue is not seen in driver unit test |
| PROC_SDL-4749 | AXI DED Bus Safety fail. | SDL | 8.5.0 onwards | None. |
| PROC_SDL-5159 | SEC ECC Bus Safety for MSS_AXI_RD not supported. | SDL | 8.5.0 onwards | None. |
| PROC_SDL-5616 | For ECC Bus Safety, SEC and DED are not supported for CPSW. | SDL | 8.6.0 onwards | None. |
| PROC_SDL-5617 | ECC Bus safety for SEC and DED not supported for MSS_L2. | SDL | 8.6.0 onwards | None. |
| PROC_SDL-5650 | ECC Bus safety for SEC and DED not supported for DSS_DSP_MDMA. | SDL | 8.6.0 onwards | None. |
| MCUSDK-11506 | ENET: CPDMA Goes To Lockup State. | CPSW | 8.5.0 onwards | Disable THOST checksum Offload. |
| MCUSDK-11507 | ENET: CPSW MAC port is stuck forever and dropping all the Rx/Tx packets with reception of corrupts preamble. | CPSW | 8.2.0 onwards | Disable hostRxTimestampEn flag in CPSW CPST configuration. This does not impact the CPTS Rx or Tx Timestamp Events for PTP packets and is orthogonal feature. |
| MCUSDK-9309 | IPC: Issue when Combination of Notify and RPMsg is enabled in SysCfg. | IPC | 8.01.00 onwards | Use Only Notify or Only Notify+RPMsg on all cores.
|
| ID | Head Line | Module | SDK Status |
| i2338 | Spurious RX DMA REQ From a Peripheral Mode MibSPI | MibSPI | Open |
| i2345 | CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks | CPSW | Implemented |
| i2387 | PLL: Boot fails sometimes because of possible glitch in R5F GCM | SBL | Implemented |
| i2389 | Recommended PLL Configuration if locked below 1GHz | SBL | Implemented |
| i2394 | Race condition in interrupt and error aggregator capture registers resulting in events miss | Interrupt | Open |
| i2392 | Race condition in capture registers resulting in events miss | Interrupt | Open |
| i2339 | MibSPI RX RAM RXEMPTY Bit Does Not Get Cleared After Reading | MibSPI | Open |
| i2390 | Recommended HWA memInit Sequence | HWA | Open |
| i2342 | 2D Stats sample value RAM processor write back issue during FFT execution on HWA | HWA | Open |
| i2341 | Unallocated space access to DSP L2 - DSP IP is not blocking access to reserved space causing aliasing and L2 parity error | DSP-L2 | Open |
| i2337 | A Data Length Error is Generated Repeatedly in Peripheral Mode When IO Loopback is Enabled | MibSPI | Open |
| i2336 | MibSPI in Peipheral Mode in 3- or 4-Pin Communication Transmits Data Incorrectly for Slow SPICLK Frequencies and for Clock Phase = 1 | MibSPI | Open |
| i2297 | CSI Careabouts | CSI | Open |
| i2294 | Subsequent memory initialisation configuration of L3 Bank D will not trigger a memory initialisation | Common | Open |
| i2289 | Unaligned access from DSS CM4 could cause data integrity failure and hang | HWA | Open |
| i2288 | EDMA transfer that spans M1+M2 memories of HWA could result in data corruption | HWA | Open |
This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.
1.8.20