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AM273x MCU+ SDK
08.06.00
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47 #ifndef INCLUDE_SDL_ECC_H_
48 #define INCLUDE_SDL_ECC_H_
55 #if defined(SOC_AM263X)
56 #include <sdl/esm/v0/sdl_esm.h>
58 #if defined(SOC_AM273X) || defined(SOC_AWR294X)
123 #if defined(SOC_AM263X)
125 #define SDL_SOC_ECC_AGGR (0U)
126 #define SDL_R5FSS0_CORE0_ECC_AGGR (1U)
127 #define SDL_R5FSS0_CORE1_ECC_AGGR (2U)
128 #define SDL_R5FSS1_CORE0_ECC_AGGR (3U)
129 #define SDL_R5FSS1_CORE1_ECC_AGGR (4U)
130 #define SDL_HSM_ECC_AGGR (5U)
131 #define SDL_ICSSM_ICSS_G_CORE_BORG_ECC_AGGR (6U)
132 #define SDL_MCAN0_MCANSS_MSGMEM_WRAP_ECC_AGGR (7U)
133 #define SDL_MCAN1_MCANSS_MSGMEM_WRAP_ECC_AGGR (8U)
134 #define SDL_MCAN2_MCANSS_MSGMEM_WRAP_ECC_AGGR (9U)
135 #define SDL_MCAN3_MCANSS_MSGMEM_WRAP_ECC_AGGR (10U)
136 #define SDL_CPSW3GCSS_ECC_AGGR (11U)
137 #define SDL_ECC_MEMTYPE_MAX (SDL_CPSW3GCSS_ECC_AGGR + 1U)
140 #define SDL_R5SS0_CPU0_TCM (0U)
141 #define SDL_R5SS1_CPU0_TCM (1U)
143 #define SDL_R5FSS0_CORE0_ATCM0 (1U)
144 #define SDL_R5FSS0_CORE0_B0TCM0 (3U)
145 #define SDL_R5FSS0_CORE0_B1TCM0 (5U)
147 #define SDL_R5FSS0_CORE1_ATCM1 (2U)
148 #define SDL_R5FSS0_CORE1_B0TCM1 (4U)
149 #define SDL_R5FSS0_CORE1_B1TCM1 (6U)
151 #define SDL_R5FSS1_CORE0_ATCM0 (7U)
152 #define SDL_R5FSS1_CORE0_B0TCM0 (9U)
153 #define SDL_R5FSS1_CORE0_B1TCM0 (11U)
155 #define SDL_R5FSS1_CORE1_ATCM1 (8U)
156 #define SDL_R5FSS1_CORE1_B0TCM1 (10U)
157 #define SDL_R5FSS1_CORE1_B1TCM1 (12U)
159 #define SDL_TPCC0 (2)
162 #if defined(SOC_AM273X) || defined(SOC_AWR294X)
163 #define SDL_R5FSS0_CORE0_ECC_AGGR (0U)
164 #define SDL_R5FSS0_CORE1_ECC_AGGR (1U)
165 #define SDL_MSS_ECC_AGG_MSS (2U)
166 #define SDL_DSS_ECC_AGG (3U)
167 #define SDL_MSS_MCANA_ECC (4U)
168 #define SDL_MSS_MCANB_ECC (5U)
169 #define SDL_CPSW3GCSS_ECC_AGGR (6U)
170 #define SDL_ECC_MEMTYPE_MAX (SDL_CPSW3GCSS_ECC_AGGR + 1U)
172 #define SDL_TCM_PARITY_ATCM0 (1U)
173 #define SDL_TCM_PARITY_ATCM1 (2U)
174 #define SDL_TCM_PARITY_B0TCM0 (3U)
175 #define SDL_TCM_PARITY_B0TCM1 (4U)
176 #define SDL_TCM_PARITY_B1TCM0 (5U)
177 #define SDL_TCM_PARITY_B1TCM1 (6U)
180 #define SDL_TPCC0A (2U)
181 #define SDL_TPCC0B (3U)
182 #define SDL_DSS_TPCCA (4U)
183 #define SDL_DSS_TPCCB (5U)
184 #define SDL_DSS_TPCCC (6U)
191 #define SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK0_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_PULSAR_SL_ATCM0_BANK0_RAM_ID)
193 #define SDL_ECC_R5F_MEM_SUBTYPE_ATCM0_BANK1_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_PULSAR_SL_ATCM0_BANK1_RAM_ID)
195 #define SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK0_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_PULSAR_SL_B0TCM0_BANK0_RAM_ID)
197 #define SDL_ECC_R5F_MEM_SUBTYPE_B0TCM0_BANK1_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_PULSAR_SL_B0TCM0_BANK1_RAM_ID)
199 #define SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK0_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_PULSAR_SL_B1TCM0_BANK0_RAM_ID)
201 #define SDL_ECC_R5F_MEM_SUBTYPE_B1TCM0_BANK1_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_PULSAR_SL_B1TCM0_BANK1_RAM_ID)
203 #define SDL_ECC_R5F_MEM_SUBTYPE_KS_VIM_RAM_VECTOR_ID (SDL_R5FSS0_CORE0_ECC_AGGR_CPU0_KS_VIM_RAMECC_RAM_ID)
224 typedef struct SDL_ECC_InitConfig_s
237 typedef struct SDL_ECC_InjectErrorConfig_s
251 typedef struct SDL_ECC_ErrorInfo_s
321 uint32_t selfTestTimeOut);
432 uint64_t bitErrorOffset,
433 uint32_t bitErrorGroup);
434 #if defined(SOC_AM263X)
455 int32_t SDL_cleartcmStatusRegs(uint32_t clearVal);
457 #if defined(SOC_AM273X)|| defined(SOC_AWR294X)
484 uint32_t paramregvalue,
int32_t SDL_ECC_getErrorInfo(SDL_ECC_MemType eccMemType, SDL_Ecc_AggrIntrSrc intrSrc, SDL_ECC_ErrorInfo_t *pErrorInfo)
Retrieves the ECC error information for the specified memtype and interrupt source.
void(* SDL_ECC_ErrorCallback_t)(uint32_t errorSrc, uint32_t address)
Definition: sdl_ecc.h:214
SDL_ECC_AggregatorType
Definition: sdl_ecc.h:70
Definition: sdl_ecc.h:225
SDL_ECC_MemSubType memSubType
Definition: sdl_ecc.h:255
uint32_t numRams
Definition: sdl_ecc.h:226
uint32_t chkGrp
Definition: sdl_ecc.h:243
Header file contains enumerations, structure definitions and function declarations for SDL Error Sign...
uint32_t SDL_ECC_MemType
This enumerator indicate ECC memory type.
Definition: sdl_ecc.h:121
int32_t SDL_ECC_initMemory(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType)
Initializes Memory to be ready for ECC error detection. Assumes ECC is already enabled.
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_N_ROW_REPEAT
Definition: sdl_ecc.h:99
int32_t SDL_ECC_injectError(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType, SDL_ECC_InjectErrorType errorType, const SDL_ECC_InjectErrorConfig_t *pECCErrorConfig)
Injects ECC error at specified location Assumes ECC is already enabled.
uint32_t SDL_Ecc_AggrEDCErrorSubType
This enumerator defines the types of possible EDC errors.
Definition: V1/sdl_ip_ecc.h:187
uint32_t SDL_ECC_MemSubType
This enumerator indicate ECC memory Sub Type.
Definition: sdl_ecc.h:211
int32_t SDL_ECC_getESMErrorInfo(SDL_ESM_Inst instance, uint32_t intSrc, SDL_ECC_MemType *eccMemType, SDL_Ecc_AggrIntrSrc *intrSrcType)
Retrieves the ECC error information for the specified ESM error. If it isn't an ECC error or the ECC ...
SDL_ECC_RamIdType
Definition: sdl_ecc.h:109
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_REPEAT
Definition: sdl_ecc.h:95
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_N_ROW_REPEAT
Definition: sdl_ecc.h:101
@ SDL_ECC_RAM_ID_TYPE_INTERCONNECT
Definition: sdl_ecc.h:112
@ SDL_INJECT_ECC_NO_ERROR
Definition: sdl_ecc.h:85
uint32_t bitErrorGroup
Definition: sdl_ecc.h:263
SDL_Ecc_AggrIntrSrc intrSrc
Definition: sdl_ecc.h:257
Header file contains enumerations, structure definitions and function declarations for SDL COMMON int...
int32_t SDL_ECC_getStaticRegisters(SDL_ECC_MemType eccMemType, SDL_ECC_staticRegs *pStaticRegs)
Gets the static registers for the specified ECC instance.
Definition: sdl_ecc.h:238
uint32_t * pErrMem
Definition: sdl_ecc.h:239
This structure contains the static register group for Ecc aggregator used by the SDL_ecc_aggrReadStat...
Definition: V1/sdl_ip_ecc.h:296
int32_t SDL_ECC_tpccParity(SDL_ECC_MemType eccMemType, uint32_t bitValue, uint32_t paramregvalue, uint32_t regval)
Injects TPCC Parity error.
void(* SDL_ECC_VIMDEDVector_t)(void)
Definition: sdl_ecc.h:217
uint64_t bitErrorOffset
Definition: sdl_ecc.h:265
uint32_t flipBitMask
Definition: sdl_ecc.h:241
SDL_ECC_InjectErrorType
ECC Inject error types.
Definition: sdl_ecc.h:83
int32_t SDL_ECC_initEsm(const SDL_ESM_Inst esmInstType)
Initializes an module for usage with ECC module.
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_ONCE
Definition: sdl_ecc.h:89
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_N_ROW_ONCE
Definition: sdl_ecc.h:93
uint32_t SDL_Ecc_AggrIntrSrc
This enumerator defines the types of possible ECC errors.
Definition: V1/sdl_ip_ecc.h:106
Definition: sdl_ecc.h:252
@ SDL_ECC_AGGR_TYPE_FULL_FUNCTION
Definition: sdl_ecc.h:73
SDL_ECC_MemSubType * pMemSubTypeList
Definition: sdl_ecc.h:229
@ SDL_ECC_AGGR_TYPE_INJECT_ONLY
Definition: sdl_ecc.h:71
int32_t SDL_ECC_init(SDL_ECC_MemType eccMemType, const SDL_ECC_InitConfig_t *pECCInitConfig)
Initializes ECC module for ECC detection.
@ SDL_ECC_RAM_ID_TYPE_WRAPPER
Definition: sdl_ecc.h:110
uint32_t injectBitErrCnt
Definition: sdl_ecc.h:261
void SDL_ECC_applicationCallbackFunction(SDL_ECC_MemType eccMemType, uint32_t errorSrc, uint32_t address, uint32_t ramId, uint64_t bitErrorOffset, uint32_t bitErrorGroup)
Application provided external callback function for ECC handling Called inside the reference function...
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_ONCE
Definition: sdl_ecc.h:87
int32_t SDL_ECC_clearNIntrPending(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType, SDL_Ecc_AggrIntrSrc intrSrc, SDL_Ecc_AggrEDCErrorSubType subType, uint32_t numEvents)
Clears N pending interrupts for the specified memtype, subtype and interrupt source.
@ SDL_INJECT_ECC_ERROR_FORCING_2BIT_REPEAT
Definition: sdl_ecc.h:97
uint32_t bitErrCnt
Definition: sdl_ecc.h:259
SDL_ECC_MemType eccMemType
Definition: sdl_ecc.h:253
int32_t SDL_ECC_selfTest(SDL_ECC_MemType eccMemType, SDL_ECC_MemSubType memSubType, SDL_ECC_InjectErrorType errorType, const SDL_ECC_InjectErrorConfig_t *pECCErrorConfig, uint32_t selfTestTimeOut)
Runs self test by injecting and error and monitor response Assumes ECC is already enabled.
@ SDL_INJECT_ECC_ERROR_FORCING_1BIT_N_ROW_ONCE
Definition: sdl_ecc.h:91
int32_t SDL_ECC_ackIntr(SDL_ECC_MemType eccMemType, SDL_Ecc_AggrIntrSrc intrSrc)
Acknowledge the ECC interrupt.