SDL ECC MSS TPTC

Table of Contents

• Introduction
  • Use Cases
• Supported Combinations
• Steps to Run the Example
• See Also
• Sample Output

Introduction

This example demonstrates SEC and DED on MSS TPTC FIFO memories.

Use Cases

Use Case	Description
UC-1	Single bit error injection.
UC-2	Double bit error injection.

Supported Combinations

Parameter	Value
CPU + OS	r5fss0-0 nortos
Toolchain	ti-arm-clang
Board	am273x-evm
Example folder	examples/sdl/ecc/sdl_ecc_mss_tptc/

Steps to Run the Example

• When using CCS projects to build, import the CCS project for the required combination and build it using the CCS project menu (see Using SDK with CCS Projects).
• When using makefiles to build, note the required combination and build using make command (see Using SDK with Makefiles)
• Launch a CCS debug session and run the executable, see CCS Launch, Load and Run

See Also

ECC : Error Correcting Code

Sample Output

Shown below is a sample output when the application is run,

ECC Example Application
 
ECC UC-1 and UC-2 Test 
 
[EDMA] Interrupt Transfer Test Started...
 
ESM_Test_init: Init MSS ESM single bit complete
 
ESM_Test_init: Init MSS ESM double bit complete
 
ECC_Test_init: MSS ECC AGGR initialization is completed 
 
MSS TPTC_A0 Single bit error inject: test starting
 
ESM Call back function called : instType 0x1, grpChannel 0x1, intSrc 0x12 
 
Take action 
 
ECC Error Call back function called : eccMemType 2, errorSrc 0x1, ramId 5, bitErrorOffset 0x00000001, bitErrorGroup 0
 
MSS TPTC_A0 Single bit error inject at pErrMem 0x00000000
 
[EDMA] Interrupt Transfer Test Completed!!
 
All tests have passed!!
 
All tests have passed.