Introduction
This example demonstrates SEC and DED on DSS TPTC FIFO memories.
Use Cases
Use Case | Description |
UC-1 | Single bit error injection on DSS TPTC. |
UC-2 | Double bit error injection on DSS TPTC. |
Supported Combinations
Parameter | Value |
CPU + OS | c66ss0 nortos |
Toolchain | ti-c6000 |
Board | am273x-evm |
Example folder | examples/sdl/ecc/sdl_ecc_dss_tptc/ |
Steps to Run the Example
See Also
ECC : Error Correcting Code
Sample Output
Shown below is a sample output when the application is run,
ECC Example Application
ECC UC-1 and UC-2 Test
[EDMA] Interrupt Transfer Test Started...
ESM_Test_init: Init DSS ESM single bit complete
ESM_Test_init: Init DSS ESM double bit complete
ECC_Test_init: DSS ECC AGGR initialization is completed
DSS TPTC_A0 Single bit error inject: test starting
ESM Call back function called : instType 0x2, grpChannel 0x1, intSrc 0x5c
Take action
ECC Error Call back function called : eccMemType 3, errorSrc 0x1, ramId 9, bitErrorOffset 0x00000001, bitErrorGroup 0
DSS TPTC_A0 Single bit error inject at pErrMem 0x00000000
[EDMA] Interrupt Transfer Test Completed!!
All tests have passed!!
All Use_Cases have passed.