AM273x MCU+ SDK  08.05.00
sdlr_esm.h
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31  *
32  * Name : cslr_esm.h
33 */
34 #ifndef SDLR_ESM_H_
35 #define SDLR_ESM_H_
36 
37 #ifdef __cplusplus
38 extern "C"
39 {
40 #endif
41 
42 
43 /**************************************************************************
44 * Hardware Region :
45 **************************************************************************/
46 
47 
48 /**************************************************************************
49 * Register Overlay Structure
50 **************************************************************************/
51 typedef struct {
52  volatile uint32_t ESMIEPSR1;
53  volatile uint32_t ESMIEPCR1;
54  volatile uint32_t ESMIESR1;
55  volatile uint32_t ESMIECR1;
56  volatile uint32_t ESMILSR1;
57  volatile uint32_t ESMILCR1;
58  volatile uint32_t ESMSR1;
59  volatile uint32_t ESMSR2;
60  volatile uint32_t ESMSR3;
61  volatile uint32_t ESMEPSR;
62  volatile uint32_t ESMIOFFHR;
63  volatile uint32_t ESMIOFFLR;
64  volatile uint32_t ESMLTCR;
65  volatile uint32_t ESMLTCPR;
66  volatile uint32_t ESMEKR;
67  volatile uint32_t ESMSSR2;
68  volatile uint32_t ESMIEPSR4;
69  volatile uint32_t ESMIEPCR4;
70  volatile uint32_t ESMIESR4;
71  volatile uint32_t ESMIECR4;
72  volatile uint32_t ESMILSR4;
73  volatile uint32_t ESMILCR4;
74  volatile uint32_t ESMSR4;
75  volatile uint8_t Resv_128[36u];
76  volatile uint32_t ESMIEPSR7;
77  volatile uint32_t ESMIEPCR7;
78  volatile uint32_t ESMIESR7;
79  volatile uint32_t ESMIECR7;
80  volatile uint32_t ESMILSR7;
81  volatile uint32_t ESMILCR7;
82  volatile uint32_t ESMSR7;
83  volatile uint8_t Resv_192[36u];
84  volatile uint32_t ESMIEPSR10;
85  volatile uint32_t ESMIEPCR10;
86  volatile uint32_t ESMIESR10;
87  volatile uint32_t ESMIECR10;
88  volatile uint32_t ESMILSR10;
89  volatile uint32_t ESMILCR10;
90  volatile uint32_t ESMSR10;
91 } SDL_esmRegs;
92 
93 
94 /**************************************************************************
95 * Register Macros
96 **************************************************************************/
97 
98 #define SDL_ESM_ESMIEPSR1 (0x00000000U)
99 #define SDL_ESM_ESMIEPCR1 (0x00000004U)
100 #define SDL_ESM_ESMIESR1 (0x00000008U)
101 #define SDL_ESM_ESMIECR1 (0x0000000CU)
102 #define SDL_ESM_ESMILSR1 (0x00000010U)
103 #define SDL_ESM_ESMILCR1 (0x00000014U)
104 #define SDL_ESM_ESMSR1 (0x00000018U)
105 #define SDL_ESM_ESMSR2 (0x0000001CU)
106 #define SDL_ESM_ESMSR3 (0x00000020U)
107 #define SDL_ESM_ESMEPSR (0x00000024U)
108 #define SDL_ESM_ESMIOFFHR (0x00000028U)
109 #define SDL_ESM_ESMIOFFLR (0x0000002CU)
110 #define SDL_ESM_ESMLTCR (0x00000030U)
111 #define SDL_ESM_ESMLTCPR (0x00000034U)
112 #define SDL_ESM_ESMEKR (0x00000038U)
113 #define SDL_ESM_ESMSSR2 (0x0000003CU)
114 #define SDL_ESM_ESMIEPSR4 (0x00000040U)
115 #define SDL_ESM_ESMIEPCR4 (0x00000044U)
116 #define SDL_ESM_ESMIESR4 (0x00000048U)
117 #define SDL_ESM_ESMIECR4 (0x0000004CU)
118 #define SDL_ESM_ESMILSR4 (0x00000050U)
119 #define SDL_ESM_ESMILCR4 (0x00000054U)
120 #define SDL_ESM_ESMSR4 (0x00000058U)
121 #define SDL_ESM_ESMIEPSR7 (0x00000080U)
122 #define SDL_ESM_ESMIEPCR7 (0x00000084U)
123 #define SDL_ESM_ESMIESR7 (0x00000088U)
124 #define SDL_ESM_ESMIECR7 (0x0000008CU)
125 #define SDL_ESM_ESMILSR7 (0x00000090U)
126 #define SDL_ESM_ESMILCR7 (0x00000094U)
127 #define SDL_ESM_ESMSR7 (0x00000098U)
128 #define SDL_ESM_ESMIEPSR10 (0x000000C0U)
129 #define SDL_ESM_ESMIEPCR10 (0x000000C4U)
130 #define SDL_ESM_ESMIESR10 (0x000000C8U)
131 #define SDL_ESM_ESMIECR10 (0x000000CCU)
132 #define SDL_ESM_ESMILSR10 (0x000000D0U)
133 #define SDL_ESM_ESMILCR10 (0x000000D4U)
134 #define SDL_ESM_ESMSR10 (0x000000D8U)
135 
136 /**************************************************************************
137 * Field Definition Macros
138 **************************************************************************/
139 
140 
141 /* ESMIEPSR1 */
142 
143 #define SDL_ESM_ESMIEPSR1_IEPSET_MASK (0xFFFFFFFFU)
144 #define SDL_ESM_ESMIEPSR1_IEPSET_SHIFT (0x00000000U)
145 #define SDL_ESM_ESMIEPSR1_IEPSET_RESETVAL (0x00000000U)
146 #define SDL_ESM_ESMIEPSR1_IEPSET_MAX (0xFFFFFFFFU)
147 
148 #define SDL_ESM_ESMIEPSR1_RESETVAL (0x00000000U)
149 
150 /* ESMIEPCR1 */
151 
152 #define SDL_ESM_ESMIEPCR1_IEPCLR_MASK (0xFFFFFFFFU)
153 #define SDL_ESM_ESMIEPCR1_IEPCLR_SHIFT (0x00000000U)
154 #define SDL_ESM_ESMIEPCR1_IEPCLR_RESETVAL (0x00000000U)
155 #define SDL_ESM_ESMIEPCR1_IEPCLR_MAX (0xFFFFFFFFU)
156 
157 #define SDL_ESM_ESMIEPCR1_RESETVAL (0x00000000U)
158 
159 /* ESMIESR1 */
160 
161 #define SDL_ESM_ESMIESR1_INTENSET_MASK (0xFFFFFFFFU)
162 #define SDL_ESM_ESMIESR1_INTENSET_SHIFT (0x00000000U)
163 #define SDL_ESM_ESMIESR1_INTENSET_RESETVAL (0x00000000U)
164 #define SDL_ESM_ESMIESR1_INTENSET_MAX (0xFFFFFFFFU)
165 
166 #define SDL_ESM_ESMIESR1_RESETVAL (0x00000000U)
167 
168 /* ESMIECR1 */
169 
170 #define SDL_ESM_ESMIECR1_INTENCLR_MASK (0xFFFFFFFFU)
171 #define SDL_ESM_ESMIECR1_INTENCLR_SHIFT (0x00000000U)
172 #define SDL_ESM_ESMIECR1_INTENCLR_RESETVAL (0x00000000U)
173 #define SDL_ESM_ESMIECR1_INTENCLR_MAX (0xFFFFFFFFU)
174 
175 #define SDL_ESM_ESMIECR1_RESETVAL (0x00000000U)
176 
177 /* ESMILSR1 */
178 
179 #define SDL_ESM_ESMILSR1_INTLVLSET_MASK (0xFFFFFFFFU)
180 #define SDL_ESM_ESMILSR1_INTLVLSET_SHIFT (0x00000000U)
181 #define SDL_ESM_ESMILSR1_INTLVLSET_RESETVAL (0x00000000U)
182 #define SDL_ESM_ESMILSR1_INTLVLSET_MAX (0xFFFFFFFFU)
183 
184 #define SDL_ESM_ESMILSR1_RESETVAL (0x00000000U)
185 
186 /* ESMILCR1 */
187 
188 #define SDL_ESM_ESMILCR1_INTLVLCLR_MASK (0xFFFFFFFFU)
189 #define SDL_ESM_ESMILCR1_INTLVLCLR_SHIFT (0x00000000U)
190 #define SDL_ESM_ESMILCR1_INTLVLCLR_RESETVAL (0x00000000U)
191 #define SDL_ESM_ESMILCR1_INTLVLCLR_MAX (0xFFFFFFFFU)
192 
193 #define SDL_ESM_ESMILCR1_RESETVAL (0x00000000U)
194 
195 /* ESMSR1 */
196 
197 #define SDL_ESM_ESMSR1_ESF_MASK (0xFFFFFFFFU)
198 #define SDL_ESM_ESMSR1_ESF_SHIFT (0x00000000U)
199 #define SDL_ESM_ESMSR1_ESF_RESETVAL (0x00000000U)
200 #define SDL_ESM_ESMSR1_ESF_MAX (0xFFFFFFFFU)
201 
202 #define SDL_ESM_ESMSR1_RESETVAL (0x00000000U)
203 
204 /* ESMSR2 */
205 
206 #define SDL_ESM_ESMSR2_ESF_MASK (0xFFFFFFFFU)
207 #define SDL_ESM_ESMSR2_ESF_SHIFT (0x00000000U)
208 #define SDL_ESM_ESMSR2_ESF_RESETVAL (0x00000000U)
209 #define SDL_ESM_ESMSR2_ESF_MAX (0xFFFFFFFFU)
210 
211 #define SDL_ESM_ESMSR2_RESETVAL (0x00000000U)
212 
213 /* ESMSR3 */
214 
215 #define SDL_ESM_ESMSR3_ESF_MASK (0xFFFFFFFFU)
216 #define SDL_ESM_ESMSR3_ESF_SHIFT (0x00000000U)
217 #define SDL_ESM_ESMSR3_ESF_RESETVAL (0x00000000U)
218 #define SDL_ESM_ESMSR3_ESF_MAX (0xFFFFFFFFU)
219 
220 #define SDL_ESM_ESMSR3_RESETVAL (0x00000000U)
221 
222 /* ESMEPSR */
223 
224 #define SDL_ESM_ESMEPSR_EPSF_MASK (0x00000001U)
225 #define SDL_ESM_ESMEPSR_EPSF_SHIFT (0x00000000U)
226 #define SDL_ESM_ESMEPSR_EPSF_RESETVAL (0x00000000U)
227 #define SDL_ESM_ESMEPSR_EPSF_MAX (0x00000001U)
228 
229 #define SDL_ESM_ESMEPSR_RESERVED_MASK (0xFFFFFFFEU)
230 #define SDL_ESM_ESMEPSR_RESERVED_SHIFT (0x00000001U)
231 #define SDL_ESM_ESMEPSR_RESERVED_RESETVAL (0x00000000U)
232 #define SDL_ESM_ESMEPSR_RESERVED_MAX (0x7FFFFFFFU)
233 
234 #define SDL_ESM_ESMEPSR_RESETVAL (0x00000000U)
235 
236 /* ESMIOFFHR */
237 
238 #define SDL_ESM_ESMIOFFHR_INTOFFH_MASK (0x000001FFU)
239 #define SDL_ESM_ESMIOFFHR_INTOFFH_SHIFT (0x00000000U)
240 #define SDL_ESM_ESMIOFFHR_INTOFFH_RESETVAL (0x00000000U)
241 #define SDL_ESM_ESMIOFFHR_INTOFFH_MAX (0x000001FFU)
242 
243 #define SDL_ESM_ESMIOFFHR_RESERVED_MASK (0xFFFFFE00U)
244 #define SDL_ESM_ESMIOFFHR_RESERVED_SHIFT (0x00000009U)
245 #define SDL_ESM_ESMIOFFHR_RESERVED_RESETVAL (0x00000000U)
246 #define SDL_ESM_ESMIOFFHR_RESERVED_MAX (0x007FFFFFU)
247 
248 #define SDL_ESM_ESMIOFFHR_RESETVAL (0x00000000U)
249 
250 /* ESMIOFFLR */
251 
252 #define SDL_ESM_ESMIOFFLR_INTOFFL_MASK (0x000000FFU)
253 #define SDL_ESM_ESMIOFFLR_INTOFFL_SHIFT (0x00000000U)
254 #define SDL_ESM_ESMIOFFLR_INTOFFL_RESETVAL (0x00000000U)
255 #define SDL_ESM_ESMIOFFLR_INTOFFL_MAX (0x000000FFU)
256 
257 #define SDL_ESM_ESMIOFFLR_RESERVED_MASK (0xFFFFFF00U)
258 #define SDL_ESM_ESMIOFFLR_RESERVED_SHIFT (0x00000008U)
259 #define SDL_ESM_ESMIOFFLR_RESERVED_RESETVAL (0x00000000U)
260 #define SDL_ESM_ESMIOFFLR_RESERVED_MAX (0x00FFFFFFU)
261 
262 #define SDL_ESM_ESMIOFFLR_RESETVAL (0x00000000U)
263 
264 /* ESMLTCR */
265 
266 #define SDL_ESM_ESMLTCR_LTCP_MASK (0x0000FFFFU)
267 #define SDL_ESM_ESMLTCR_LTCP_SHIFT (0x00000000U)
268 #define SDL_ESM_ESMLTCR_LTCP_RESETVAL (0x00000000U)
269 #define SDL_ESM_ESMLTCR_LTCP_MAX (0x0000FFFFU)
270 
271 #define SDL_ESM_ESMLTCR_RESERVED_MASK (0xFFFF0000U)
272 #define SDL_ESM_ESMLTCR_RESERVED_SHIFT (0x00000010U)
273 #define SDL_ESM_ESMLTCR_RESERVED_RESETVAL (0x00000000U)
274 #define SDL_ESM_ESMLTCR_RESERVED_MAX (0x0000FFFFU)
275 
276 #define SDL_ESM_ESMLTCR_RESETVAL (0x00000000U)
277 
278 /* ESMLTCPR */
279 
280 #define SDL_ESM_ESMLTCPR_LTCP_MASK (0x0000FFFFU)
281 #define SDL_ESM_ESMLTCPR_LTCP_SHIFT (0x00000000U)
282 #define SDL_ESM_ESMLTCPR_LTCP_RESETVAL (0x00000000U)
283 #define SDL_ESM_ESMLTCPR_LTCP_MAX (0x0000FFFFU)
284 
285 #define SDL_ESM_ESMLTCPR_RESERVED_MASK (0xFFFF0000U)
286 #define SDL_ESM_ESMLTCPR_RESERVED_SHIFT (0x00000010U)
287 #define SDL_ESM_ESMLTCPR_RESERVED_RESETVAL (0x00000000U)
288 #define SDL_ESM_ESMLTCPR_RESERVED_MAX (0x0000FFFFU)
289 
290 #define SDL_ESM_ESMLTCPR_RESETVAL (0x00000000U)
291 
292 /* ESMEKR */
293 
294 #define SDL_ESM_ESMEKR_EKEY_MASK (0x0000000FU)
295 #define SDL_ESM_ESMEKR_EKEY_SHIFT (0x00000000U)
296 #define SDL_ESM_ESMEKR_EKEY_RESETVAL (0x00000000U)
297 #define SDL_ESM_ESMEKR_EKEY_MAX (0x0000000FU)
298 
299 #define SDL_ESM_ESMEKR_RESERVED_MASK (0xFFFFFFF0U)
300 #define SDL_ESM_ESMEKR_RESERVED_SHIFT (0x00000004U)
301 #define SDL_ESM_ESMEKR_RESERVED_RESETVAL (0x00000000U)
302 #define SDL_ESM_ESMEKR_RESERVED_MAX (0x0FFFFFFFU)
303 
304 #define SDL_ESM_ESMEKR_RESETVAL (0x00000000U)
305 
306 /* ESMSSR2 */
307 
308 #define SDL_ESM_ESMSSR2_ESF_MASK (0xFFFFFFFFU)
309 #define SDL_ESM_ESMSSR2_ESF_SHIFT (0x00000000U)
310 #define SDL_ESM_ESMSSR2_ESF_RESETVAL (0x00000000U)
311 #define SDL_ESM_ESMSSR2_ESF_MAX (0xFFFFFFFFU)
312 
313 #define SDL_ESM_ESMSSR2_RESETVAL (0x00000000U)
314 
315 /* ESMIEPSR4 */
316 
317 #define SDL_ESM_ESMIEPSR4_IEPSET_MASK (0xFFFFFFFFU)
318 #define SDL_ESM_ESMIEPSR4_IEPSET_SHIFT (0x00000000U)
319 #define SDL_ESM_ESMIEPSR4_IEPSET_RESETVAL (0x00000000U)
320 #define SDL_ESM_ESMIEPSR4_IEPSET_MAX (0xFFFFFFFFU)
321 
322 #define SDL_ESM_ESMIEPSR4_RESETVAL (0x00000000U)
323 
324 /* ESMIEPCR4 */
325 
326 #define SDL_ESM_ESMIEPCR4_IEPCLR_MASK (0xFFFFFFFFU)
327 #define SDL_ESM_ESMIEPCR4_IEPCLR_SHIFT (0x00000000U)
328 #define SDL_ESM_ESMIEPCR4_IEPCLR_RESETVAL (0x00000000U)
329 #define SDL_ESM_ESMIEPCR4_IEPCLR_MAX (0xFFFFFFFFU)
330 
331 #define SDL_ESM_ESMIEPCR4_RESETVAL (0x00000000U)
332 
333 /* ESMIESR4 */
334 
335 #define SDL_ESM_ESMIESR4_INTENSET_MASK (0xFFFFFFFFU)
336 #define SDL_ESM_ESMIESR4_INTENSET_SHIFT (0x00000000U)
337 #define SDL_ESM_ESMIESR4_INTENSET_RESETVAL (0x00000000U)
338 #define SDL_ESM_ESMIESR4_INTENSET_MAX (0xFFFFFFFFU)
339 
340 #define SDL_ESM_ESMIESR4_RESETVAL (0x00000000U)
341 
342 /* ESMIECR4 */
343 
344 #define SDL_ESM_ESMIECR4_INTENCLR_MASK (0xFFFFFFFFU)
345 #define SDL_ESM_ESMIECR4_INTENCLR_SHIFT (0x00000000U)
346 #define SDL_ESM_ESMIECR4_INTENCLR_RESETVAL (0x00000000U)
347 #define SDL_ESM_ESMIECR4_INTENCLR_MAX (0xFFFFFFFFU)
348 
349 #define SDL_ESM_ESMIECR4_RESETVAL (0x00000000U)
350 
351 /* ESMILSR4 */
352 
353 #define SDL_ESM_ESMILSR4_INTLVLSET_MASK (0xFFFFFFFFU)
354 #define SDL_ESM_ESMILSR4_INTLVLSET_SHIFT (0x00000000U)
355 #define SDL_ESM_ESMILSR4_INTLVLSET_RESETVAL (0x00000000U)
356 #define SDL_ESM_ESMILSR4_INTLVLSET_MAX (0xFFFFFFFFU)
357 
358 #define SDL_ESM_ESMILSR4_RESETVAL (0x00000000U)
359 
360 /* ESMILCR4 */
361 
362 #define SDL_ESM_ESMILCR4_INTLVLCLR_MASK (0xFFFFFFFFU)
363 #define SDL_ESM_ESMILCR4_INTLVLCLR_SHIFT (0x00000000U)
364 #define SDL_ESM_ESMILCR4_INTLVLCLR_RESETVAL (0x00000000U)
365 #define SDL_ESM_ESMILCR4_INTLVLCLR_MAX (0xFFFFFFFFU)
366 
367 #define SDL_ESM_ESMILCR4_RESETVAL (0x00000000U)
368 
369 /* ESMSR4 */
370 
371 #define SDL_ESM_ESMSR4_ESF_MASK (0xFFFFFFFFU)
372 #define SDL_ESM_ESMSR4_ESF_SHIFT (0x00000000U)
373 #define SDL_ESM_ESMSR4_ESF_RESETVAL (0x00000000U)
374 #define SDL_ESM_ESMSR4_ESF_MAX (0xFFFFFFFFU)
375 
376 #define SDL_ESM_ESMSR4_RESETVAL (0x00000000U)
377 
378 /* ESMIEPSR7 */
379 
380 #define SDL_ESM_ESMIEPSR7_IEPSET_MASK (0xFFFFFFFFU)
381 #define SDL_ESM_ESMIEPSR7_IEPSET_SHIFT (0x00000000U)
382 #define SDL_ESM_ESMIEPSR7_IEPSET_RESETVAL (0x00000000U)
383 #define SDL_ESM_ESMIEPSR7_IEPSET_MAX (0xFFFFFFFFU)
384 
385 #define SDL_ESM_ESMIEPSR7_RESETVAL (0x00000000U)
386 
387 /* ESMIEPCR7 */
388 
389 #define SDL_ESM_ESMIEPCR7_IEPCLR_MASK (0xFFFFFFFFU)
390 #define SDL_ESM_ESMIEPCR7_IEPCLR_SHIFT (0x00000000U)
391 #define SDL_ESM_ESMIEPCR7_IEPCLR_RESETVAL (0x00000000U)
392 #define SDL_ESM_ESMIEPCR7_IEPCLR_MAX (0xFFFFFFFFU)
393 
394 #define SDL_ESM_ESMIEPCR7_RESETVAL (0x00000000U)
395 
396 /* ESMIESR7 */
397 
398 #define SDL_ESM_ESMIESR7_INTENSET_MASK (0xFFFFFFFFU)
399 #define SDL_ESM_ESMIESR7_INTENSET_SHIFT (0x00000000U)
400 #define SDL_ESM_ESMIESR7_INTENSET_RESETVAL (0x00000000U)
401 #define SDL_ESM_ESMIESR7_INTENSET_MAX (0xFFFFFFFFU)
402 
403 #define SDL_ESM_ESMIESR7_RESETVAL (0x00000000U)
404 
405 /* ESMIECR7 */
406 
407 #define SDL_ESM_ESMIECR7_INTENCLR_MASK (0xFFFFFFFFU)
408 #define SDL_ESM_ESMIECR7_INTENCLR_SHIFT (0x00000000U)
409 #define SDL_ESM_ESMIECR7_INTENCLR_RESETVAL (0x00000000U)
410 #define SDL_ESM_ESMIECR7_INTENCLR_MAX (0xFFFFFFFFU)
411 
412 #define SDL_ESM_ESMIECR7_RESETVAL (0x00000000U)
413 
414 /* ESMILSR7 */
415 
416 #define SDL_ESM_ESMILSR7_INTLVLSET_MASK (0xFFFFFFFFU)
417 #define SDL_ESM_ESMILSR7_INTLVLSET_SHIFT (0x00000000U)
418 #define SDL_ESM_ESMILSR7_INTLVLSET_RESETVAL (0x00000000U)
419 #define SDL_ESM_ESMILSR7_INTLVLSET_MAX (0xFFFFFFFFU)
420 
421 #define SDL_ESM_ESMILSR7_RESETVAL (0x00000000U)
422 
423 /* ESMILCR7 */
424 
425 #define SDL_ESM_ESMILCR7_INTLVLCLR_MASK (0xFFFFFFFFU)
426 #define SDL_ESM_ESMILCR7_INTLVLCLR_SHIFT (0x00000000U)
427 #define SDL_ESM_ESMILCR7_INTLVLCLR_RESETVAL (0x00000000U)
428 #define SDL_ESM_ESMILCR7_INTLVLCLR_MAX (0xFFFFFFFFU)
429 
430 #define SDL_ESM_ESMILCR7_RESETVAL (0x00000000U)
431 
432 /* ESMSR7 */
433 
434 #define SDL_ESM_ESMSR7_ESF_MASK (0xFFFFFFFFU)
435 #define SDL_ESM_ESMSR7_ESF_SHIFT (0x00000000U)
436 #define SDL_ESM_ESMSR7_ESF_RESETVAL (0x00000000U)
437 #define SDL_ESM_ESMSR7_ESF_MAX (0xFFFFFFFFU)
438 
439 #define SDL_ESM_ESMSR7_RESETVAL (0x00000000U)
440 
441 /* ESMIEPSR10 */
442 
443 #define SDL_ESM_ESMIEPSR10_IEPSET_MASK (0xFFFFFFFFU)
444 #define SDL_ESM_ESMIEPSR10_IEPSET_SHIFT (0x00000000U)
445 #define SDL_ESM_ESMIEPSR10_IEPSET_RESETVAL (0x00000000U)
446 #define SDL_ESM_ESMIEPSR10_IEPSET_MAX (0xFFFFFFFFU)
447 
448 #define SDL_ESM_ESMIEPSR10_RESETVAL (0x00000000U)
449 
450 /* ESMIEPCR10 */
451 
452 #define SDL_ESM_ESMIEPCR10_IEPCLR_MASK (0xFFFFFFFFU)
453 #define SDL_ESM_ESMIEPCR10_IEPCLR_SHIFT (0x00000000U)
454 #define SDL_ESM_ESMIEPCR10_IEPCLR_RESETVAL (0x00000000U)
455 #define SDL_ESM_ESMIEPCR10_IEPCLR_MAX (0xFFFFFFFFU)
456 
457 #define SDL_ESM_ESMIEPCR10_RESETVAL (0x00000000U)
458 
459 /* ESMIESR10 */
460 
461 #define SDL_ESM_ESMIESR10_INTENSET_MASK (0xFFFFFFFFU)
462 #define SDL_ESM_ESMIESR10_INTENSET_SHIFT (0x00000000U)
463 #define SDL_ESM_ESMIESR10_INTENSET_RESETVAL (0x00000000U)
464 #define SDL_ESM_ESMIESR10_INTENSET_MAX (0xFFFFFFFFU)
465 
466 #define SDL_ESM_ESMIESR10_RESETVAL (0x00000000U)
467 
468 /* ESMIECR10 */
469 
470 #define SDL_ESM_ESMIECR10_INTENCLR_MASK (0xFFFFFFFFU)
471 #define SDL_ESM_ESMIECR10_INTENCLR_SHIFT (0x00000000U)
472 #define SDL_ESM_ESMIECR10_INTENCLR_RESETVAL (0x00000000U)
473 #define SDL_ESM_ESMIECR10_INTENCLR_MAX (0xFFFFFFFFU)
474 
475 #define SDL_ESM_ESMIECR10_RESETVAL (0x00000000U)
476 
477 /* ESMILSR10 */
478 
479 #define SDL_ESM_ESMILSR10_INTLVLSET_MASK (0xFFFFFFFFU)
480 #define SDL_ESM_ESMILSR10_INTLVLSET_SHIFT (0x00000000U)
481 #define SDL_ESM_ESMILSR10_INTLVLSET_RESETVAL (0x00000000U)
482 #define SDL_ESM_ESMILSR10_INTLVLSET_MAX (0xFFFFFFFFU)
483 
484 #define SDL_ESM_ESMILSR10_RESETVAL (0x00000000U)
485 
486 /* ESMILCR10 */
487 
488 #define SDL_ESM_ESMILCR10_INTLVLCLR_MASK (0xFFFFFFFFU)
489 #define SDL_ESM_ESMILCR10_INTLVLCLR_SHIFT (0x00000000U)
490 #define SDL_ESM_ESMILCR10_INTLVLCLR_RESETVAL (0x00000000U)
491 #define SDL_ESM_ESMILCR10_INTLVLCLR_MAX (0xFFFFFFFFU)
492 
493 #define SDL_ESM_ESMILCR10_RESETVAL (0x00000000U)
494 
495 /* ESMSR10 */
496 
497 #define SDL_ESM_ESMSR10_ESF_MASK (0xFFFFFFFFU)
498 #define SDL_ESM_ESMSR10_ESF_SHIFT (0x00000000U)
499 #define SDL_ESM_ESMSR10_ESF_RESETVAL (0x00000000U)
500 #define SDL_ESM_ESMSR10_ESF_MAX (0xFFFFFFFFU)
501 
502 #define SDL_ESM_ESMSR10_RESETVAL (0x00000000U)
503 
504 
505 /**************************************************************************
506 * hw_esm.h alias definitions
507 **************************************************************************/
508 #define ESM_ESMIEPSR1 SDL_ESM_ESMIEPSR1
509 #define ESM_ESMIEPCR1 SDL_ESM_ESMIEPCR1
510 #define ESM_ESMIESR1 SDL_ESM_ESMIESR1
511 #define ESM_ESMIECR1 SDL_ESM_ESMIECR1
512 #define ESM_ESMILSR1 SDL_ESM_ESMILSR1
513 #define ESM_ESMILCR1 SDL_ESM_ESMILCR1
514 #define ESM_ESMSR1 SDL_ESM_ESMSR1
515 #define ESM_ESMSR2 SDL_ESM_ESMSR2
516 #define ESM_ESMSR3 SDL_ESM_ESMSR3
517 #define ESM_ESMEPSR SDL_ESM_ESMEPSR
518 #define ESM_ESMIOFFHR SDL_ESM_ESMIOFFHR
519 #define ESM_ESMIOFFLR SDL_ESM_ESMIOFFLR
520 #define ESM_ESMLTCR SDL_ESM_ESMLTCR
521 #define ESM_ESMLTCPR SDL_ESM_ESMLTCPR
522 #define ESM_ESMEKR SDL_ESM_ESMEKR
523 #define ESM_ESMSSR2 SDL_ESM_ESMSSR2
524 
525 #define ESM_ESMEPSR_EPSF_MASK SDL_ESM_ESMEPSR_EPSF_MASK
526 #define ESM_ESMEPSR_EPSF_SHIFT SDL_ESM_ESMEPSR_EPSF_SHIFT
527 #define ESM_ESMIOFFHR_INTOFFH_MASK SDL_ESM_ESMIOFFHR_INTOFFH_MASK
528 #define ESM_ESMIOFFHR_INTOFFH_SHIFT SDL_ESM_ESMIOFFHR_INTOFFH_SHIFT
529 #define ESM_ESMIOFFLR_INTOFFL_MASK SDL_ESM_ESMIOFFLR_INTOFFL_MASK
530 #define ESM_ESMIOFFLR_INTOFFL_SHIFT SDL_ESM_ESMIOFFLR_INTOFFL_SHIFT
531 #define ESM_ESMLTCR_LTC_MASK SDL_ESM_ESMLTCR_LTCP_MASK
532 #define ESM_ESMLTCR_LTC_SHIFT SDL_ESM_ESMLTCR_LTCP_SHIFT
533 #define ESM_ESMLTCPR_LTCPR_MASK SDL_ESM_ESMLTCPR_LTCP_MASK
534 #define ESM_ESMLTCPR_LTCPR_SHIFT SDL_ESM_ESMLTCPR_LTCP_SHIFT
535 #define ESM_ESMEKR_EKEY_MASK SDL_ESM_ESMEKR_EKEY_MASK
536 #define ESM_ESMEKR_EKEY_SHIFT SDL_ESM_ESMEKR_EKEY_SHIFT
537 
538 #define ESM_ESMLTCPR_LTCPR_MAX SDL_ESM_ESMLTCPR_LTCP_MAX
539 
540 #define ESM_ESMEKR_EKEY_NORMAL_MODE (0x0U)
541 #define ESM_ESMEKR_EKEY_ERROR_PIN_RESET (0x5U)
542 #define ESM_ESMEKR_EKEY_ERROR_FORCE_MODE (0xAU)
543 
544 #ifdef __cplusplus
545 }
546 #endif
547 #endif
SDL_esmRegs::ESMILSR4
volatile uint32_t ESMILSR4
Definition: sdlr_esm.h:72
SDL_esmRegs::ESMIESR10
volatile uint32_t ESMIESR10
Definition: sdlr_esm.h:86
SDL_esmRegs::ESMIESR7
volatile uint32_t ESMIESR7
Definition: sdlr_esm.h:78
SDL_esmRegs::ESMSR2
volatile uint32_t ESMSR2
Definition: sdlr_esm.h:59
SDL_esmRegs::ESMIOFFHR
volatile uint32_t ESMIOFFHR
Definition: sdlr_esm.h:62
SDL_esmRegs::ESMILSR7
volatile uint32_t ESMILSR7
Definition: sdlr_esm.h:80
SDL_esmRegs::ESMSR3
volatile uint32_t ESMSR3
Definition: sdlr_esm.h:60
SDL_esmRegs::ESMIECR1
volatile uint32_t ESMIECR1
Definition: sdlr_esm.h:55
SDL_esmRegs::ESMSR1
volatile uint32_t ESMSR1
Definition: sdlr_esm.h:58
SDL_esmRegs::ESMILCR4
volatile uint32_t ESMILCR4
Definition: sdlr_esm.h:73
SDL_esmRegs::ESMIESR4
volatile uint32_t ESMIESR4
Definition: sdlr_esm.h:70
SDL_esmRegs::ESMEPSR
volatile uint32_t ESMEPSR
Definition: sdlr_esm.h:61
SDL_esmRegs::ESMIEPSR10
volatile uint32_t ESMIEPSR10
Definition: sdlr_esm.h:84
SDL_esmRegs::ESMIECR7
volatile uint32_t ESMIECR7
Definition: sdlr_esm.h:79
SDL_esmRegs::ESMILCR7
volatile uint32_t ESMILCR7
Definition: sdlr_esm.h:81
SDL_esmRegs::ESMIECR10
volatile uint32_t ESMIECR10
Definition: sdlr_esm.h:87
SDL_esmRegs::ESMIEPCR7
volatile uint32_t ESMIEPCR7
Definition: sdlr_esm.h:77
SDL_esmRegs
Definition: sdlr_esm.h:51
SDL_esmRegs::ESMILCR10
volatile uint32_t ESMILCR10
Definition: sdlr_esm.h:89
SDL_esmRegs::ESMSR7
volatile uint32_t ESMSR7
Definition: sdlr_esm.h:82
SDL_esmRegs::ESMSSR2
volatile uint32_t ESMSSR2
Definition: sdlr_esm.h:67
SDL_esmRegs::ESMIEPSR7
volatile uint32_t ESMIEPSR7
Definition: sdlr_esm.h:76
SDL_esmRegs::ESMLTCPR
volatile uint32_t ESMLTCPR
Definition: sdlr_esm.h:65
SDL_esmRegs::ESMIEPCR4
volatile uint32_t ESMIEPCR4
Definition: sdlr_esm.h:69
SDL_esmRegs::ESMLTCR
volatile uint32_t ESMLTCR
Definition: sdlr_esm.h:64
SDL_esmRegs::ESMILSR1
volatile uint32_t ESMILSR1
Definition: sdlr_esm.h:56
SDL_esmRegs::ESMIOFFLR
volatile uint32_t ESMIOFFLR
Definition: sdlr_esm.h:63
SDL_esmRegs::ESMIECR4
volatile uint32_t ESMIECR4
Definition: sdlr_esm.h:71
SDL_esmRegs::ESMSR4
volatile uint32_t ESMSR4
Definition: sdlr_esm.h:74
SDL_esmRegs::ESMEKR
volatile uint32_t ESMEKR
Definition: sdlr_esm.h:66
SDL_esmRegs::ESMILSR10
volatile uint32_t ESMILSR10
Definition: sdlr_esm.h:88
SDL_esmRegs::ESMIESR1
volatile uint32_t ESMIESR1
Definition: sdlr_esm.h:54
SDL_esmRegs::ESMIEPCR10
volatile uint32_t ESMIEPCR10
Definition: sdlr_esm.h:85
SDL_esmRegs::ESMIEPSR1
volatile uint32_t ESMIEPSR1
Definition: sdlr_esm.h:52
SDL_esmRegs::ESMIEPCR1
volatile uint32_t ESMIEPCR1
Definition: sdlr_esm.h:53
SDL_esmRegs::ESMIEPSR4
volatile uint32_t ESMIEPSR4
Definition: sdlr_esm.h:68
SDL_esmRegs::ESMILCR1
volatile uint32_t ESMILCR1
Definition: sdlr_esm.h:57
SDL_esmRegs::ESMSR10
volatile uint32_t ESMSR10
Definition: sdlr_esm.h:90