AM273x MCU+ SDK  08.05.00
sdl_ip_pbist.h
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33 
41 /*
42  * @file sdl/pbist/v0/sdl_ip_pbist.h
43  *
44  * @brief This file contains the SDL-FL API's for PBIST
45  *
46  * This is the SDL-FL API documentation for the Programmable Built-In Self Test
47  * (PBIST) module.
48  *
49  *
50  *
51  */
52 
53 #ifndef SDL_IP_PBIST_H_
54 #define SDL_IP_PBIST_H_
55 
56 #ifdef __cplusplus
57 extern "C" {
58 #endif
59 
60 #include <stdint.h>
61 #include <stdbool.h>
64 #if defined (SUBSYS_R5FSS0) || defined (R5F0_INPUTS)
65 #define PBIST_MAX_NUM_RUNS_1 14
66 #define PBIST_MAX_NUM_RUNS_2 22
67 #elif defined (SUBSYS_R5FSS1) || defined (R5F1_INPUTS)
68 #define PBIST_MAX_NUM_RUNS_1 11
69 #define PBIST_MAX_NUM_RUNS_2 1
70 #endif
71 
79 typedef struct
80 {
83  uint32_t override;
84 
90  uint32_t algorithmsBitMap;
91 
95 
98  uint64_t scrambleValue;
100 
110 typedef struct
111 {
114  uint32_t CA0;
115 
118  uint32_t CA1;
119 
122  uint32_t CA2;
123 
126  uint32_t CA3;
127 
130  uint32_t CL0;
131 
134  uint32_t CL1;
135 
138  uint32_t CL2;
139 
142  uint32_t CL3;
143 
146  uint32_t CMS;
147 
150  uint32_t CSR;
151 
154  uint32_t I0;
155 
158  uint32_t I1;
159 
162  uint32_t I2;
163 
166  uint32_t I3;
167 
170  uint32_t RAMT;
172 
186 int32_t SDL_PBIST_softReset(SDL_pbistRegs *pPBISTRegs);
187 
201 int32_t SDL_PBIST_start(SDL_pbistRegs *pPBISTRegs,
202  const SDL_PBIST_config * pConfig);
203 
217 int32_t SDL_PBIST_startNeg(SDL_pbistRegs *pPBISTRegs,
218  const SDL_PBIST_configNeg *pConfig);
219 
233 int32_t SDL_PBIST_checkResult (const SDL_pbistRegs *pPBISTRegs, bool *pResult);
234 
249 
261 typedef struct
262 {
265  uint32_t numPBISTRuns;
266  SDL_PBIST_config PBISTConfigRun1[PBIST_MAX_NUM_RUNS_1];
267  SDL_PBIST_config PBISTConfigRun2[PBIST_MAX_NUM_RUNS_2];
268  uint32_t interruptNumber;
269  uint32_t esmEventNumber;
270  volatile uint32_t doneFlag;
274 
275 #ifdef __cplusplus
276 }
277 #endif
278 
279 #endif /* SDL_IP_PBIST_H_ */
SDL_pbistInstInfo::failureDetected
uint8_t failureDetected
Definition: sdl_ip_pbist.h:272
SDL_PBIST_configNeg::RAMT
uint32_t RAMT
Definition: sdl_ip_pbist.h:170
SDL_pbistRegs
Definition: sdlr_pbist.h:53
SDL_pbistInstInfo::doneFlag
volatile uint32_t doneFlag
Definition: sdl_ip_pbist.h:270
SDL_PBIST_configNeg::I0
uint32_t I0
Definition: sdl_ip_pbist.h:154
sdlr_pbist.h
SDL_PBIST_checkResult
int32_t SDL_PBIST_checkResult(const SDL_pbistRegs *pPBISTRegs, bool *pResult)
PBIST check result.
SDL_PBIST_Instance
int32_t SDL_PBIST_Instance(SDL_PBIST_inst instance)
PBIST Instance.
SDL_PBIST_configNeg::I1
uint32_t I1
Definition: sdl_ip_pbist.h:158
SDL_PBIST_config::scrambleValue
uint64_t scrambleValue
Definition: sdl_ip_pbist.h:98
SDL_PBIST_configNeg::I2
uint32_t I2
Definition: sdl_ip_pbist.h:162
SDL_PBIST_configNeg::CMS
uint32_t CMS
Definition: sdl_ip_pbist.h:146
SDL_pbistInstInfo::PBISTNegConfigRun
SDL_PBIST_configNeg PBISTNegConfigRun
Definition: sdl_ip_pbist.h:271
SDL_PBIST_config::memoryGroupsBitMap
uint64_t memoryGroupsBitMap
Definition: sdl_ip_pbist.h:94
SDL_PBIST_releaseTestMode
int32_t SDL_PBIST_releaseTestMode(SDL_pbistRegs *pPBISTRegs)
PBIST Release Test mode.
SDL_PBIST_configNeg::CSR
uint32_t CSR
Definition: sdl_ip_pbist.h:150
SDL_PBIST_config
This structure contains the different configuration used for PBIST.
Definition: sdl_ip_pbist.h:80
SDL_PBIST_configNeg::CL3
uint32_t CL3
Definition: sdl_ip_pbist.h:142
SDL_PBIST_configNeg::CA2
uint32_t CA2
Definition: sdl_ip_pbist.h:122
SDL_pbistInstInfo::pPBISTRegs
SDL_pbistRegs * pPBISTRegs
Definition: sdl_ip_pbist.h:264
sdl_soc_pbist.h
SDL_PBIST_configNeg::CA1
uint32_t CA1
Definition: sdl_ip_pbist.h:118
SDL_PBIST_configNeg::CL0
uint32_t CL0
Definition: sdl_ip_pbist.h:130
SDL_PBIST_configNeg::CA0
uint32_t CA0
Definition: sdl_ip_pbist.h:114
SDL_PBIST_start
int32_t SDL_PBIST_start(SDL_pbistRegs *pPBISTRegs, const SDL_PBIST_config *pConfig)
PBIST Start.
SDL_PBIST_configNeg::CL2
uint32_t CL2
Definition: sdl_ip_pbist.h:138
SDL_pbistInstInfo
Definition: sdl_ip_pbist.h:262
SDL_pbistInstInfo::esmEventNumber
uint32_t esmEventNumber
Definition: sdl_ip_pbist.h:269
SDL_pbistInstInfo::interruptNumber
uint32_t interruptNumber
Definition: sdl_ip_pbist.h:268
SDL_PBIST_config::algorithmsBitMap
uint32_t algorithmsBitMap
Definition: sdl_ip_pbist.h:90
SDL_PBIST_softReset
int32_t SDL_PBIST_softReset(SDL_pbistRegs *pPBISTRegs)
PBIST Soft reset.
SDL_PBIST_configNeg::CA3
uint32_t CA3
Definition: sdl_ip_pbist.h:126
SDL_pbistInstInfo::PBISTRegsHiAddress
uint64_t PBISTRegsHiAddress
Definition: sdl_ip_pbist.h:263
SDL_PBIST_configNeg::CL1
uint32_t CL1
Definition: sdl_ip_pbist.h:134
SDL_PBIST_configNeg
This structure contains the different configuration used for PBIST for the failure insertion test to ...
Definition: sdl_ip_pbist.h:111
SDL_PBIST_configNeg::I3
uint32_t I3
Definition: sdl_ip_pbist.h:166
SDL_PBIST_inst
SDL_PBIST_inst
PBIST instance.
Definition: sdl_pbist_soc.h:91
SDL_PBIST_startNeg
int32_t SDL_PBIST_startNeg(SDL_pbistRegs *pPBISTRegs, const SDL_PBIST_configNeg *pConfig)
PBIST Failure Insertion Test Start.
SDL_pbistInstInfo::numPBISTRuns
uint32_t numPBISTRuns
Definition: sdl_ip_pbist.h:265