AM273x MCU+ SDK  08.05.00
sdl/esm/v1/esm.h
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1 /*
2  * Copyright (c) Texas Instruments Incorporated 2022
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61 #ifndef SDL_ESM_H
62 #define SDL_ESM_H
63 
64 /* ========================================================================== */
65 /* Include Files */
66 /* ========================================================================== */
67 #include <stdint.h>
68 #include <stdbool.h>
69 #include <sdl/include/hw_types.h>
70 
71 #ifdef __cplusplus
72 extern "C" {
73 #endif
74 
75 /* ========================================================================== */
76 /* Macros & Typedefs */
77 /* ========================================================================== */
78 
79 
80 /* Local Defines */
81 #define BITS_PER_WORD (32u)
82 #define ESM_INTR_GRP_NUM (32U)
83 #define GROUP_NUMBER_BIT_SHIFT (5u)
84 #define NO_EVENT_VALUE (0xffffu)
85 #define SDL_ESM_EN_KEY_ENBALE_VAL (0xFU)
86 #define INVALID_BIT (0u)
87 #define FLAG_NO (0u)
88 #define FLAG_YES (1u)
89 
90 #define ESM_NUM_INTR_PER_GRP (32U)
91 #define ESM_MAX_NUM_INTRS (1024U)
92 #define ESM_ESM_PIN_CTRL_KEY_RESET_VAL (0x5U)
93 #define ESM_SFT_RST_KEY_RESET_VAL (0xFU)
94 #define ESM_EN_KEY_MASK (0xFU)
95 #define ESM_EN_KEY_ENBALE_VAL (0xFU)
96 #define ESM_EN_KEY_DISABLE_VAL (0x0U)
97 
98 
100 #define SDL_ESM_ESMIEPSR(m) ((uint32_t) ESM_ESMIEPSR1 + \
101  (((m) / 32U) * 0x40U))
102 
103 #define SDL_ESM_ESMIEPCR(m) ((uint32_t) ESM_ESMIEPCR1 + \
104  (((m) / 32U) * 0x40U))
105 
106 #define SDL_ESM_ESMIESR(m) ((uint32_t) ESM_ESMIESR1 + \
107  (((m) / 32U) * 0x40U))
108 
109 #define SDL_ESM_ESMIECR(m) ((uint32_t) ESM_ESMIECR1 + \
110  (((m) / 32U) * 0x40U))
111 
112 #define SDL_ESM_ESMILSR(m) ((uint32_t) ESM_ESMILSR1 + \
113  (((m) / 32U) * 0x40U))
114 
115 #define SDL_ESM_ESMILCR(m) ((uint32_t) ESM_ESMILCR1 + \
116  (((m) / 32U) * 0x40U))
117 
118 #define SDL_ESM_ESMSR(m) ((uint32_t) ESM_ESMSR1 + \
119  (((m) / 32U) * 0x40U))
120 
122 #define SDL_ESM_ESMSR_NUM_ELEMS (4U)
123 
125 #define ESM_GATING_MASK (0xFU)
126 
127 #define ESM_GATING_SHIFT (0x4U)
128 
129 #define ESM_NUM_EVTS_PER_GATING_REG (0x8U)
130 
131 #define ESM_GATING_GROUP (0x4U)
132 
133 #define BITS_PER_WORD (32u)
134 
139 #define ESM_NUMBER_OF_GROUP_REGS (32u)
140 
144 #define SDL_ESM_NUM_GROUP_MAX (3U)
145 #define SDL_ESM_NUM_INTR_PER_GROUP (128U)
146 
156 typedef uint32_t esmOperationMode_t;
157 
158 #define SDL_ESM_OPERATION_MODE_NORMAL 0x0U
159 
160 #define SDL_ESM_OPERATION_MODE_ERROR_FORCE 0xAu
161 
170 typedef uint32_t esmIntrType_t;
171 
172 #define SDL_ESM_INTR_TYPE_LOW_PRIO_ERROR (0x1u)
173 
174 #define SDL_ESM_INTR_TYPE_HIGH_PRIO_ERROR (0x2u)
175 
184 typedef uint32_t esmIntrPriorityLvl_t;
185 
186 #define SDL_ESM_INTR_PRIORITY_LEVEL_LOW (0x0u)
187 
188 #define SDL_ESM_INTR_PRIORITY_LEVEL_HIGH (0x1u)
189 
193 typedef void *SDL_ESM_Handle;
194 
195 /* ========================================================================== */
196 /* Structures and Enums */
197 /* ========================================================================== */
198 
203 typedef struct
204 {
208 
212 typedef struct {
213  volatile uint32_t ESMIEPSR1; /* ESM Enable ERROR Pin Action/Response Register 1 */
214  volatile uint32_t ESMIEPCR1; /* ESM Disable ERROR Pin Action/Response Register 1 */
215  volatile uint32_t ESMIESR1; /* ESM Interrupt Enable Set/Status Register 1 */
216  volatile uint32_t ESMIECR1; /* ESM Interrupt Enable Clear/Status Register 1 */
217  volatile uint32_t ESMILSR1; /* Interrupt Level Set/Status Register 1 */
218  volatile uint32_t ESMILCR1; /* Interrupt Level Clear/Status Register 1 */
219  volatile uint32_t ESMSR1; /* ESM Status Register 1 */
220  volatile uint32_t ESMSR2; /* ESM Status Register 2 */
221  volatile uint32_t ESMSR3; /* ESM Status Register 3 */
222  volatile uint32_t ESMEPSR; /* ESM ERROR Pin Status Register */
223  volatile uint32_t ESMIOFFHR; /* ESM Interrupt Offset High Register */
224  volatile uint32_t ESMIOFFLR; /* ESM Interrupt Offset Low Register */
225  volatile uint32_t ESMLTCR; /* ESM Low-Time Counter Register */
226  volatile uint32_t ESMLTCPR; /* ESM Low-Time Counter Preload Register */
227  volatile uint32_t ESMEKR; /* ESM Error Key Register */
228  volatile uint32_t ESMSSR2; /* ESM Status Shadow Register 2 */
229 
231 /* ========================================================================== */
232 /* Global Variables */
233 /* ========================================================================== */
234 /* None */
235 
236 /* ========================================================================== */
237 /* Function Declarations */
238 /* ========================================================================== */
268 int32_t SDL_ESM_setMode(uint32_t baseAddr, esmOperationMode_t mode);
269 
299 int32_t SDL_ESM_getPinMode(uint32_t baseAddr, esmOperationMode_t *pMode);
300 
334 int32_t SDL_ESM_setInfluenceOnErrPin(uint32_t baseAddr, uint32_t intrSrc,
335  bool enable);
336 
373 int32_t SDL_ESM_getInfluenceOnErrPin(uint32_t baseAddr, uint32_t intrSrc,
374  uint32_t *pInfluence);
410 int32_t SDL_ESM_setErrPinLowTimePreload(uint32_t baseAddr, uint32_t lowTime);
411 
447 int32_t SDL_ESM_getErrPinLowTimePreload(uint32_t baseAddr, uint32_t *pLowTime);
448 
476 int32_t SDL_ESM_getCurrErrPinLowTimeCnt(uint32_t baseAddr, uint32_t *pPinCntrPre);
477 
505 int32_t SDL_ESM_getErrPinStatus(uint32_t baseAddr, uint32_t *pStatus);
506 
533 int32_t SDL_ESM_resetErrPin(uint32_t baseAddr);
534 
569 int32_t SDL_ESM_isEnableIntr(uint32_t baseAddr, uint32_t intrSrc, uint32_t *pEnStatus);
570 
599 int32_t SDL_ESM_enableIntr(uint32_t baseAddr, uint32_t intrNum);
600 
629 int32_t SDL_ESM_disableIntr(uint32_t baseAddr, uint32_t intrNum);
630 
667 int32_t SDL_ESM_setIntrPriorityLvl(uint32_t baseAddr, uint32_t intrSrc,
668  esmIntrPriorityLvl_t intrPriorityLvl);
669 
704 int32_t SDL_ESM_getIntrStatus(uint32_t baseAddr, uint32_t intrSrc, uint32_t *pStaus);
705 
741 int32_t SDL_ESM_getGroupIntrStatus(uint32_t baseAddr, esmIntrPriorityLvl_t intrPrioType,
742  SDL_ESM_GroupIntrStatus *pIntrstatus);
743 
775 int32_t SDL_ESM_clearIntrStatus(uint32_t baseAddr, uint32_t intrSrc);
776 
809 int32_t SDL_ESM_clearGroupIntrStatus(uint32_t baseAddr, uint32_t grpNum);
810 
811 
845 int32_t SDL_ESM_getLowPriorityLvlIntrStatus(uint32_t baseAddr, uint32_t *pstatus);
846 
880 int32_t SDL_ESM_getHighPriorityLvlIntrStatus(uint32_t baseAddr, uint32_t *pstatus);
881 
918 int32_t SDL_ESM_getIntrPriorityLvl(uint32_t baseAddr, uint32_t intrSrc,
919  esmIntrPriorityLvl_t *pIntrPriorityLvl);
920 
923 #ifdef __cplusplus
924 }
925 
926 #endif /*extern "C" */
927 
928 #endif /*SDL_ESM_H*/
SDL_ESM_Handle
void * SDL_ESM_Handle
A handle that is returned from a ESM_Init() call.
Definition: sdl/esm/v1/esm.h:193
SDL_ESM_setInfluenceOnErrPin
int32_t SDL_ESM_setInfluenceOnErrPin(uint32_t baseAddr, uint32_t intrSrc, bool enable)
This API is used to set the influence of interrupt on nERROR pin.
SDL_ESM_setIntrPriorityLvl
int32_t SDL_ESM_setIntrPriorityLvl(uint32_t baseAddr, uint32_t intrSrc, esmIntrPriorityLvl_t intrPriorityLvl)
This API is used to set interrupt level.
SDL_ESM_staticRegs::ESMSR1
volatile uint32_t ESMSR1
Definition: sdl/esm/v1/esm.h:219
SDL_ESM_staticRegs::ESMIECR1
volatile uint32_t ESMIECR1
Definition: sdl/esm/v1/esm.h:216
SDL_ESM_staticRegs::ESMILCR1
volatile uint32_t ESMILCR1
Definition: sdl/esm/v1/esm.h:218
SDL_ESM_staticRegs::ESMEKR
volatile uint32_t ESMEKR
Definition: sdl/esm/v1/esm.h:227
SDL_ESM_getErrPinLowTimePreload
int32_t SDL_ESM_getErrPinLowTimePreload(uint32_t baseAddr, uint32_t *pLowTime)
This API is used to read the low time counter pre-load value.
SDL_ESM_getInfluenceOnErrPin
int32_t SDL_ESM_getInfluenceOnErrPin(uint32_t baseAddr, uint32_t intrSrc, uint32_t *pInfluence)
This API is used to get the influence of interrupt on nERROR pin.
SDL_ESM_staticRegs
ESM static registers list.
Definition: sdl/esm/v1/esm.h:212
SDL_ESM_getHighPriorityLvlIntrStatus
int32_t SDL_ESM_getHighPriorityLvlIntrStatus(uint32_t baseAddr, uint32_t *pstatus)
This API is used to get the High priority level interrupt status.
SDL_ESM_getIntrStatus
int32_t SDL_ESM_getIntrStatus(uint32_t baseAddr, uint32_t intrSrc, uint32_t *pStaus)
This API is used to get the interrupt status.
esmOperationMode_t
uint32_t esmOperationMode_t
ESM Operation Mode type.
Definition: sdl/esm/v1/esm.h:156
SDL_ESM_staticRegs::ESMSSR2
volatile uint32_t ESMSSR2
Definition: sdl/esm/v1/esm.h:228
SDL_ESM_getPinMode
int32_t SDL_ESM_getPinMode(uint32_t baseAddr, esmOperationMode_t *pMode)
This API is used to read operation mode of ESM module.
SDL_ESM_getGroupIntrStatus
int32_t SDL_ESM_getGroupIntrStatus(uint32_t baseAddr, esmIntrPriorityLvl_t intrPrioType, SDL_ESM_GroupIntrStatus *pIntrstatus)
This API is used to get the interrupt/error status for a group. This will also return highest pending...
SDL_ESM_GroupIntrStatus
Structure to access the status of interrupts belonging to a High or Low priority interrupt.
Definition: sdl/esm/v1/esm.h:204
SDL_ESM_staticRegs::ESMSR3
volatile uint32_t ESMSR3
Definition: sdl/esm/v1/esm.h:221
SDL_ESM_NUM_INTR_PER_GROUP
#define SDL_ESM_NUM_INTR_PER_GROUP
Definition: sdl/esm/v1/esm.h:145
SDL_ESM_staticRegs::ESMSR2
volatile uint32_t ESMSR2
Definition: sdl/esm/v1/esm.h:220
esmIntrType_t
uint32_t esmIntrType_t
Definition: sdl/esm/v1/esm.h:170
SDL_ESM_staticRegs::ESMIOFFLR
volatile uint32_t ESMIOFFLR
Definition: sdl/esm/v1/esm.h:224
SDL_ESM_getErrPinStatus
int32_t SDL_ESM_getErrPinStatus(uint32_t baseAddr, uint32_t *pStatus)
This API is used to get the current status of nERROR pin.
SDL_ESM_getIntrPriorityLvl
int32_t SDL_ESM_getIntrPriorityLvl(uint32_t baseAddr, uint32_t intrSrc, esmIntrPriorityLvl_t *pIntrPriorityLvl)
This API is used to get interrupt level.
SDL_ESM_staticRegs::ESMLTCR
volatile uint32_t ESMLTCR
Definition: sdl/esm/v1/esm.h:225
SDL_ESM_isEnableIntr
int32_t SDL_ESM_isEnableIntr(uint32_t baseAddr, uint32_t intrSrc, uint32_t *pEnStatus)
This API is used check if interrupt is enabled/disabled.
SDL_ESM_setErrPinLowTimePreload
int32_t SDL_ESM_setErrPinLowTimePreload(uint32_t baseAddr, uint32_t lowTime)
This API is used to configure the low time counter pre-load value.
SDL_ESM_getCurrErrPinLowTimeCnt
int32_t SDL_ESM_getCurrErrPinLowTimeCnt(uint32_t baseAddr, uint32_t *pPinCntrPre)
This API is used to get the current value of low time counter.
SDL_ESM_staticRegs::ESMIEPSR1
volatile uint32_t ESMIEPSR1
Definition: sdl/esm/v1/esm.h:213
esmIntrPriorityLvl_t
uint32_t esmIntrPriorityLvl_t
Definition: sdl/esm/v1/esm.h:184
SDL_ESM_staticRegs::ESMIEPCR1
volatile uint32_t ESMIEPCR1
Definition: sdl/esm/v1/esm.h:214
SDL_ESM_staticRegs::ESMIOFFHR
volatile uint32_t ESMIOFFHR
Definition: sdl/esm/v1/esm.h:223
ESM_NUM_INTR_PER_GRP
#define ESM_NUM_INTR_PER_GRP
Definition: sdl/esm/v1/esm.h:90
SDL_ESM_disableIntr
int32_t SDL_ESM_disableIntr(uint32_t baseAddr, uint32_t intrNum)
This API is used to disable interrupt.
SDL_ESM_staticRegs::ESMILSR1
volatile uint32_t ESMILSR1
Definition: sdl/esm/v1/esm.h:217
SDL_ESM_enableIntr
int32_t SDL_ESM_enableIntr(uint32_t baseAddr, uint32_t intrNum)
This API is used to enable interrupt.
SDL_ESM_staticRegs::ESMLTCPR
volatile uint32_t ESMLTCPR
Definition: sdl/esm/v1/esm.h:226
SDL_ESM_clearGroupIntrStatus
int32_t SDL_ESM_clearGroupIntrStatus(uint32_t baseAddr, uint32_t grpNum)
This API is used to clear the interrupt/error status for a group. This will also return highest pendi...
SDL_ESM_setMode
int32_t SDL_ESM_setMode(uint32_t baseAddr, esmOperationMode_t mode)
This API is used to configure operation mode of ESM module.
SDL_ESM_staticRegs::ESMEPSR
volatile uint32_t ESMEPSR
Definition: sdl/esm/v1/esm.h:222
SDL_ESM_clearIntrStatus
int32_t SDL_ESM_clearIntrStatus(uint32_t baseAddr, uint32_t intrSrc)
This API is used to clear the interrupt status.
SDL_ESM_getLowPriorityLvlIntrStatus
int32_t SDL_ESM_getLowPriorityLvlIntrStatus(uint32_t baseAddr, uint32_t *pstatus)
This API is used to get the low priority level interrupt status.
SDL_ESM_resetErrPin
int32_t SDL_ESM_resetErrPin(uint32_t baseAddr)
This API is used to reset the nERROR pin.
SDL_ESM_staticRegs::ESMIESR1
volatile uint32_t ESMIESR1
Definition: sdl/esm/v1/esm.h:215