AM263x MCU+ SDK  09.02.00
edma/v0/edma.h
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1 /*
2  * Copyright (C) 2022-24 Texas Instruments Incorporated
3  *
4  * Redistribution and use in source and binary forms, with or without
5  * modification, are permitted provided that the following conditions
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12  * notice, this list of conditions and the following disclaimer in the
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18  * from this software without specific prior written permission.
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31  */
32 
61 #ifndef EDMA_V0_H_
62 #define EDMA_V0_H_
63 
64 #ifdef __cplusplus
65 extern "C" {
66 #endif
67 
68 /* ========================================================================== */
69 /* Include Files */
70 /* ========================================================================== */
71 
72 #include <drivers/hw_include/cslr_edma.h>
73 #include <drivers/hw_include/cslr_soc.h>
74 #include <drivers/hw_include/tistdtypes.h>
75 #include <kernel/dpl/SystemP.h>
76 #include <kernel/dpl/HwiP.h>
77 
78 /* ========================================================================== */
79 /* Macros */
80 /* ========================================================================== */
85 #define EDMACC_DMAQNUM_CLR(chNum) \
86  (~((uint32_t) 0x7U << (((chNum) % 8U) * 4U)))
87 
88 #define EDMACC_DMAQNUM_SET(chNum, queNum) \
89  (((uint32_t) 0x7U & (queNum)) << (((chNum) % 8U) * 4U))
90 
91 #define EDMACC_QDMAQNUM_CLR(chNum) \
92  (~((uint32_t) 0x7U << ((chNum) * 4U)))
93 
94 #define EDMACC_QDMAQNUM_SET(chNum, queNum) \
95  (((uint32_t) 0x7U & (queNum)) << ((chNum) * 4U))
96 
103 #define EDMACC_QCHMAP_PAENTRY_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_PAENTRY_MASK)))
104 
105 #define EDMACC_QCHMAP_PAENTRY_SET(paRAMId) \
106  (((EDMA_TPCC_QCHMAPN_PAENTRY_MASK >> EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
107  & (paRAMId)) << EDMA_TPCC_QCHMAPN_PAENTRY_SHIFT) \
108 
109 #define EDMACC_QCHMAP_TRWORD_CLR ((uint32_t) (~((uint32_t)EDMA_TPCC_QCHMAPN_TRWORD_MASK)))
110 
111 #define EDMACC_QCHMAP_TRWORD_SET(paRAMId) \
112  (((EDMA_TPCC_QCHMAPN_TRWORD_MASK >> EDMA_TPCC_QCHMAPN_TRWORD_SHIFT) & \
113  (paRAMId)) << EDMA_TPCC_QCHMAPN_TRWORD_SHIFT)
114 
121 #define EDMA_PARAM_BIDX(val) (val & 0xFFFF)
122 
123 #define EDMA_PARAM_BIDX_EXT(val) ((val & 0xFF0000) >> 16)
124 
131 #define EDMA_TRIG_MODE_MANUAL ((uint32_t) 0U)
132 
133 #define EDMA_TRIG_MODE_QDMA ((uint32_t) 1U)
134 
135 #define EDMA_TRIG_MODE_EVENT ((uint32_t) 2U)
136 
145 #define EDMA_CHANNEL_TYPE_DMA ((uint32_t) 0U)
146 
147 #define EDMA_CHANNEL_TYPE_QDMA ((uint32_t) 1U)
148 
157 #define EDMA_XFER_COMPLETE ((uint32_t) 0U)
158 
159 #define EDMA_CC_DMA_EVT_MISS ((uint32_t) 1U)
160 
161 #define EDMA_CC_QDMA_EVT_MISS ((uint32_t) 2U)
162 
173 #define EDMA_SYNC_A ((uint32_t) 0U)
174 
175 #define EDMA_SYNC_AB ((uint32_t) 1U)
176 
186 #define EDMA_ADDRESSING_MODE_LINEAR ((uint32_t) 0U)
187 
188 #define EDMA_ADDRESSING_MODE_FIFO_WRAP ((uint32_t) 1U)
189 
199 #define EDMA_FIFO_WIDTH_8BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH8BIT)
200 
201 #define EDMA_FIFO_WIDTH_16BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH16BIT)
202 
203 #define EDMA_FIFO_WIDTH_32BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH32BIT)
204 
205 #define EDMA_FIFO_WIDTH_64BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH64BIT)
206 
207 #define EDMA_FIFO_WIDTH_128BIT ((uint32_t) EDMA_TPCC_OPT_FWID_FIFOWIDTH128BIT)
208 
209 #define EDMA_FIFO_WIDTH_256BIT ((uint32_t) DMA_TPCC_OPT_FWID_FIFOWIDTH256BIT)
210 
219 #define EDMACC_CLR_TCCERR ((uint32_t) EDMA_TPCC_CCERRCLR_TCERR_MASK)
220 
221 #define EDMACC_CLR_QTHRQ0 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD0_MASK)
222 
223 #define EDMACC_CLR_QTHRQ1 ((uint32_t) EDMA_TPCC_CCERRCLR_QTHRXCD1_MASK)
224 
232 #define EDMA_OPT_TCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCCHEN_MASK)
233 
234 #define EDMA_OPT_ITCCHEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCCHEN_MASK)
235 
236 #define EDMA_OPT_TCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_TCINTEN_MASK)
237 
238 #define EDMA_OPT_ITCINTEN_MASK ((uint32_t) EDMA_TPCC_OPT_ITCINTEN_MASK)
239 
240 #define EDMA_OPT_TCC_MASK ((uint32_t) EDMA_TPCC_OPT_TCC_MASK)
241 
242 #define EDMA_OPT_TCC_SHIFT ((uint32_t) EDMA_TPCC_OPT_TCC_SHIFT)
243 
244 #define EDMA_OPT_SYNCDIM_MASK ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_MASK)
245 
246 #define EDMA_OPT_SYNCDIM_SHIFT ((uint32_t) EDMA_TPCC_OPT_SYNCDIM_SHIFT)
247 
248 #define EDMA_OPT_STATIC_MASK ((uint32_t) EDMA_TPCC_OPT_STATIC_MASK)
249 
250 #define EDMA_OPT_STATIC_SHIFT ((uint32_t) EDMA_TPCC_OPT_STATIC_SHIFT)
251 
252 #define EDMACC_OPT_TCC_CLR ((uint32_t) (~EDMA_TPCC_OPT_TCC_MASK))
253 
254 #define EDMACC_OPT_TCC_SET(tcc) \
255  (((EDMA_TPCC_OPT_TCC_MASK >> EDMA_TPCC_OPT_TCC_SHIFT) & (tcc)) << \
256  EDMA_TPCC_OPT_TCC_SHIFT)
257 
258 #define EDMA_OPT_SAM_MASK ((uint32_t) EDMA_TPCC_OPT_SAM_MASK)
259 
260 #define EDMA_OPT_SAM_SHIFT ((uint32_t) EDMA_TPCC_OPT_SAM_SHIFT)
261 
262 #define EDMA_OPT_DAM_MASK ((uint32_t) EDMA_TPCC_OPT_DAM_SHIFT)
263 
264 #define EDMA_OPT_DAM_SHIFT ((uint32_t) EDMA_TPCC_OPT_DAM_SHIFT)
265 
273 #define EDMACC_PARAM_ENTRY_OPT ((uint32_t) 0x0U)
274 
275 #define EDMACC_PARAM_ENTRY_SRC ((uint32_t) 0x1U)
276 
277 #define EDMACC_PARAM_ENTRY_ACNT_BCNT ((uint32_t) 0x2U)
278 
279 #define EDMACC_PARAM_ENTRY_DST ((uint32_t) 0x3U)
280 
281 #define EDMACC_PARAM_ENTRY_SRC_DST_BIDX ((uint32_t) 0x4U)
282 
283 #define EDMACC_PARAM_ENTRY_LINK_BCNTRLD ((uint32_t) 0x5U)
284 
285 #define EDMACC_PARAM_ENTRY_SRC_DST_CIDX ((uint32_t) 0x6U)
286 
287 #define EDMACC_PARAM_ENTRY_CCNT ((uint32_t) 0x7U)
288 
289 #define EDMACC_PARAM_FIELD_OFFSET ((uint32_t) 0x4U)
290 
291 #define EDMACC_PARAM_ENTRY_FIELDS ((uint32_t) 0x8U)
292 
296 #define EDMA_NUM_TCC ((uint32_t) SOC_EDMA_NUM_DMACH)
297 
306 #define EDMA_RESOURCE_TYPE_DMA ((uint32_t) 0U)
307 
308 #define EDMA_RESOURCE_TYPE_QDMA ((uint32_t) 1U)
309 
310 #define EDMA_RESOURCE_TYPE_TCC ((uint32_t) 2U)
311 
312 #define EDMA_RESOURCE_TYPE_PARAM ((uint32_t) 3U)
313 
314 #define EDMA_RESOURCE_ALLOC_ANY ((uint32_t) 0xFFFFU)
315 
318 #define EDMA_SET_ALL_BITS ((uint32_t) 0xFFFFFFFFU)
319 
320 #define EDMA_CLR_ALL_BITS ((uint32_t) 0x00000000U)
321 
322 #define EDMACC_COMPL_HANDLER_RETRY_COUNT ((uint32_t) 10U)
323 
324 #define EDMACC_ERR_HANDLER_RETRY_COUNT ((uint32_t) 10U)
325 
327 /* ========================================================================== */
328 /* Structures */
329 /* ========================================================================== */
335 typedef struct {
336  /* \brief OPT field of PaRAM Set */
337  uint32_t opt;
342  uint32_t srcAddr;
343  /* \brief Number of bytes in each Array (ACNT) */
344  uint16_t aCnt;
345  /* \brief Number of Arrays in each Frame (BCNT) */
346  uint16_t bCnt;
352  uint32_t destAddr;
358  int16_t srcBIdx;
364  int16_t destBIdx;
370  uint16_t linkAddr;
375  uint16_t bCntReload;
376  /* \brief Index between consecutive frames of a Source Block (SRCCIDX) */
377  int16_t srcCIdx;
378  /* \brief Index between consecutive frames of a Dest Block (DSTCIDX) */
379  int16_t destCIdx;
380  /* \brief Number of Frames in a block (CCNT) */
381  uint16_t cCnt;
382  /* \brief Stores higher 8 Bits of SRCBIDX */
383  int8_t srcBIdxExt;
384  /* \brief Stores higher 8 Bits of DSTBIDX */
385  int8_t destBIdxExt;
386 
387 } __attribute__((packed))
388 EDMACCPaRAMEntry;
389 
394 typedef struct
395 {
400  uint32_t dmaCh[SOC_EDMA_NUM_DMACH/32U];
401  /* \brief QDMA channels allocated. Each channel will be defined with 1 bit. */
402  uint32_t qdmaCh;
407  uint32_t tcc[EDMA_NUM_TCC/32U];
412  uint32_t paramSet[SOC_EDMA_NUM_PARAMSETS/32U];
414 
419 typedef struct {
420  /* \brief EDMA region to be used */
421  uint32_t regionId;
422  /* \brief EDMA Event queue to be used for all channels */
423  uint32_t queNum;
424  /* \brief Parameter to reset the PaRAM memory of the owned PaRAMs */
425  uint32_t initParamSet;
426  /* \brief owned resource configuration */
427  EDMA_ResourceObject ownResource;
428  /* \brief Dma channels reserved for Event triggered transfers */
429  uint32_t reservedDmaCh[SOC_EDMA_NUM_DMACH/32U];
431 
435 typedef struct
436 {
437  uint32_t intrEnable;
439 } EDMA_Params;
440 
444 typedef struct Edma_IntrObject_t *Edma_IntrHandle;
445 
449 typedef void (*Edma_EventCallback)(Edma_IntrHandle intrHandle,
450  void *appData);
451 
459 typedef struct Edma_IntrObject_t
460 {
461  /* \brief TCC number for which the callback to be reistered. */
462  uint32_t tccNum;
463  /* \brief Application data pointer passed to callback function. */
464  void *appData;
465  /* \brief Callback function pointer. */
466  Edma_EventCallback cbFxn;
471  Edma_IntrHandle nextIntr;
476  Edma_IntrHandle prevIntr;
478 
480 typedef void *EDMA_Handle;
481 
485 typedef struct
486 {
487  /*
488  * User parameters
489  */
490  EDMA_Handle handle;
492  EDMA_Params openPrms;
494  uint32_t isOpen;
496  EDMA_ResourceObject allocResource;
498  void *hwiHandle;
500  HwiP_Object hwiObj;
502  Edma_IntrHandle firstIntr;
503 } EDMA_Object;
504 
506 typedef struct
507 {
508  /*
509  * SOC configuration
510  */
511  uint32_t baseAddr;
513  EDMA_InitParams initPrms;
515  uint32_t compIntrNumber;
517  uint8_t intrPriority;
519  uint32_t intrAggEnableAddr;
521  uint32_t intrAggEnableMask;
523  uint32_t intrAggStatusAddr;
525  uint32_t intrAggClearMask;
527 } EDMA_Attrs;
528 
532 typedef struct
533 {
534  EDMA_Attrs *attrs;
536  EDMA_Object *object;
539 
541 extern EDMA_Config gEdmaConfig[];
543 extern uint32_t gEdmaConfigNum;
546 
547 /* ========================================================================== */
548 /* Function Declarations */
549 /* ========================================================================== */
550 
560 void EDMA_initParamsInit(EDMA_InitParams *initParam);
561 
568 void EDMA_ccPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry);
569 
594 void EDMA_enableChInShadowRegRegion(uint32_t baseAddr,
595  uint32_t regionId,
596  uint32_t chType,
597  uint32_t chNum);
598 
623 void EDMA_disableChInShadowRegRegion(uint32_t baseAddr,
624  uint32_t regionId,
625  uint32_t chType,
626  uint32_t chNum);
627 
641 void EDMA_channelToParamMap(uint32_t baseAddr,
642  uint32_t channel,
643  uint32_t paramSet);
644 
669 void EDMA_mapChToEvtQ(uint32_t baseAddr,
670  uint32_t chType,
671  uint32_t chNum,
672  uint32_t evtQNum);
673 
694 void EDMA_unmapChToEvtQ(uint32_t baseAddr,
695  uint32_t chType,
696  uint32_t chNum);
697 
720 void EDMA_mapQdmaChToPaRAM(uint32_t baseAddr,
721  uint32_t chNum,
722  const uint32_t *paRAMId);
723 
741 uint32_t EDMA_getMappedPaRAM(uint32_t baseAddr,
742  uint32_t chNum,
743  uint32_t chType,
744  uint32_t *paramId);
763 void EDMA_setQdmaTrigWord(uint32_t baseAddr,
764  uint32_t chNum,
765  uint32_t trigWord);
766 
778 void EDMA_clrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
779 
793 void EDMA_qdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
794 
810 void EDMA_clrCCErr(uint32_t baseAddr, uint32_t flags);
811 
825 void EDMA_setEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
826 
840 void EDMA_clrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
841 
856 void EDMA_enableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
857 
873 void EDMA_disableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
874 
889 void EDMA_enableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
890 
905 void EDMA_disableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
906 
919 uint32_t EDMA_getIntrStatusRegion(uint32_t baseAddr, uint32_t regionId);
920 
936 void EDMA_enableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
937 
953 void EDMA_disableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum);
954 
967 void EDMA_clrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value);
968 
981 uint32_t EDMA_getEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId);
982 
995 uint32_t EDMA_getEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId);
996 
1010 void EDMA_getPaRAM(uint32_t baseAddr,
1011  uint32_t paRAMId,
1012  EDMACCPaRAMEntry *currPaRAM);
1013 
1027 void EDMA_qdmaGetPaRAM(uint32_t baseAddr,
1028  uint32_t paRAMId,
1029  EDMACCPaRAMEntry *currPaRAM);
1030 
1050 void EDMA_setPaRAM(uint32_t baseAddr,
1051  uint32_t paRAMId,
1052  const EDMACCPaRAMEntry *newPaRAM);
1053 
1074 void EDMA_qdmaSetPaRAM(uint32_t baseAddr,
1075  uint32_t paRAMId,
1076  const EDMACCPaRAMEntry *newPaRAM);
1077 
1106 void EDMA_qdmaSetPaRAMEntry(uint32_t baseAddr,
1107  uint32_t paRAMId,
1108  uint32_t paRAMEntry,
1109  uint32_t newPaRAMEntryVal);
1110 
1143 uint32_t EDMA_qdmaGetPaRAMEntry(uint32_t baseAddr,
1144  uint32_t paRAMId,
1145  uint32_t paRAMEntry);
1146 
1173 void EDMA_dmaSetPaRAMEntry(uint32_t baseAddr,
1174  uint32_t paRAMId,
1175  uint32_t paRAMEntry,
1176  uint32_t newPaRAMEntryVal);
1177 
1210 uint32_t EDMA_dmaGetPaRAMEntry(uint32_t baseAddr,
1211  uint32_t paRAMId,
1212  uint32_t paRAMEntry);
1213 
1265 uint32_t EDMA_configureChannelRegion(uint32_t baseAddr,
1266  uint32_t regionId,
1267  uint32_t chType,
1268  uint32_t chNum,
1269  uint32_t tccNum,
1270  uint32_t paramId,
1271  uint32_t evtQNum);
1272 
1318 uint32_t EDMA_freeChannelRegion(uint32_t baseAddr,
1319  uint32_t regionId,
1320  uint32_t chType,
1321  uint32_t chNum,
1322  uint32_t trigMode,
1323  uint32_t tccNum,
1324  uint32_t evtQNum);
1325 
1366 uint32_t EDMA_enableTransferRegion(uint32_t baseAddr,
1367  uint32_t regionId,
1368  uint32_t chNum,
1369  uint32_t trigMode);
1370 
1403 uint32_t EDMA_disableTransferRegion(uint32_t baseAddr,
1404  uint32_t regionId,
1405  uint32_t chNum,
1406  uint32_t trigMode);
1407 
1429 void EDMA_clearErrorBitsRegion(uint32_t baseAddr,
1430  uint32_t regionId,
1431  uint32_t chNum,
1432  uint32_t evtQNum);
1433 
1442 uint32_t EDMA_getCCErrStatus(uint32_t baseAddr);
1443 
1453 uint32_t EDMA_getErrIntrStatus(uint32_t baseAddr);
1454 
1463 uint32_t EDMA_qdmaGetErrIntrStatus(uint32_t baseAddr);
1464 
1472 uint32_t EDMA_peripheralIdGet(uint32_t baseAddr);
1473 
1485 uint32_t EDMA_intrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId);
1486 
1500 uint32_t EDMA_readIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum);
1501 
1511 uint32_t EDMA_getEventStatus(uint32_t baseAddr);
1512 
1513 
1523 uint32_t EDMA_getEventStatusHigh(uint32_t baseAddr);
1524 
1536 uint32_t EDMA_readEventStatusRegion(uint32_t baseAddr, uint32_t chNum);
1537 
1547 uint32_t EDMA_errIntrHighStatusGet(uint32_t baseAddr);
1548 
1587 void EDMA_chainChannel(uint32_t baseAddr,
1588  uint32_t paRAMId1,
1589  uint32_t chId2,
1590  uint32_t chainOptions);
1591 
1625 void EDMA_linkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2);
1626 
1631 void EDMA_init(void);
1632 
1637 void EDMA_deinit(void);
1638 
1651 
1662 EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms);
1663 
1676 EDMA_Handle EDMA_getHandle(uint32_t index);
1677 
1687 void EDMA_close(EDMA_Handle handle);
1688 
1698 uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle);
1699 
1715 int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj);
1716 
1732 int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj);
1733 
1746 uint32_t EDMA_getBaseAddr(EDMA_Handle handle);
1747 
1761 uint32_t EDMA_getRegionId(EDMA_Handle handle);
1762 
1777 int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1778 
1793 int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1794 
1809 int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc);
1810 
1825 int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param);
1826 
1840 int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh);
1841 
1855 int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh);
1856 
1870 int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc);
1871 
1885 int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param);
1886 
1887 #ifdef __cplusplus
1888 }
1889 #endif
1890 
1891 #endif /* #ifndef EDMA_V0_H_ */
1892 
EDMA_registerIntr
int32_t EDMA_registerIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to register callback function for a TCC.
EDMA_Config
EDMA Instance Configuration. Pointer to this object is returned as handle by driver open.
Definition: edma/v0/edma.h:552
EDMA_enableEvtIntrRegion
void EDMA_enableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable the transfer completion interrupt generation by the EDMACC for all DMA/QDM...
EDMA_peripheralIdGet
uint32_t EDMA_peripheralIdGet(uint32_t baseAddr)
This API return the revision Id of the peripheral.
EDMA_readIntrStatusRegion
uint32_t EDMA_readIntrStatusRegion(uint32_t baseAddr, uint32_t regionId, uint32_t tccNum)
This function reads interrupt status.
EDMA_disableTransferRegion
uint32_t EDMA_disableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Disable DMA transfer on the specified channel.
EDMA_ResourceObject
EDMA resource allocation structure.
Definition: edma/v0/edma.h:414
EDMA_errIntrHighStatusGet
uint32_t EDMA_errIntrHighStatusGet(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is greater than 32.
SOC_EDMA_NUM_DMACH
#define SOC_EDMA_NUM_DMACH
Number of DMA Channels.
Definition: cslr_soc_defines.h:88
EDMA_mapChToEvtQ
void EDMA_mapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum, uint32_t evtQNum)
Map channel to Event Queue.
EDMA_setEvtRegion
void EDMA_setEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Set an event. This API helps user to manually set events to initiate DMA transfer...
EDMA_freeTcc
int32_t EDMA_freeTcc(EDMA_Handle handle, uint32_t *tcc)
Function to free the tcc Channel.
EDMA_intrStatusHighGetRegion
uint32_t EDMA_intrStatusHighGetRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt status of those events which are greater than 32.
EDMA_disableDmaEvtRegion
void EDMA_disableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Disable an DMA event.
EDMA_isInitialized
uint32_t EDMA_isInitialized(EDMA_Handle handle)
Function to check if EDMA is enabled or not.
EDMA_getPaRAM
void EDMA_getPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (DMA/Link).
EDMA_init
void EDMA_init(void)
This function initializes the EDMA driver object and controller.
Edma_IntrObject
EDMA interrupt configuration object. The object is passed to the EDMA_registerIntr() function....
Definition: edma/v0/edma.h:479
SystemP.h
EDMA_Object
EDMA driver object.
Definition: edma/v0/edma.h:505
EDMA_enableTransferRegion
uint32_t EDMA_enableTransferRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t trigMode)
Start EDMA transfer on the specified channel.
EDMA_unregisterIntr
int32_t EDMA_unregisterIntr(EDMA_Handle handle, Edma_IntrObject *intrObj)
Function to unregister callback function for a TCC.
EDMA_getEnabledIntrHighRegion
uint32_t EDMA_getEnabledIntrHighRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are more than 32.
EDMA_getMappedPaRAM
uint32_t EDMA_getMappedPaRAM(uint32_t baseAddr, uint32_t chNum, uint32_t chType, uint32_t *paramId)
Returns the PaRAM associated with the DMA/QDMA channel.
EDMA_getRegionId
uint32_t EDMA_getRegionId(EDMA_Handle handle)
Function to get the edma region.
EDMA_enableChInShadowRegRegion
void EDMA_enableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Enable channel to Shadow region mapping.
EDMA_linkChannel
void EDMA_linkChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t paRAMId2)
Link two channels.
EDMA_freeDmaChannel
int32_t EDMA_freeDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to free the Dma Channel.
Edma_EventCallback
void(* Edma_EventCallback)(Edma_IntrHandle intrHandle, void *appData)
EDMA interrupt callback function prototype.
Definition: edma/v0/edma.h:468
EDMA_clrIntrRegion
void EDMA_clrIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t value)
Enables the user to Clear an Interrupt.
EDMA_clrEvtRegion
void EDMA_clrEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear an event.
EDMA_getBaseAddr
uint32_t EDMA_getBaseAddr(EDMA_Handle handle)
Function to get the edma base address.
EDMA_getCCErrStatus
uint32_t EDMA_getCCErrStatus(uint32_t baseAddr)
This returns EDMA CC error status.
SOC_EDMA_NUM_PARAMSETS
#define SOC_EDMA_NUM_PARAMSETS
Number of PaRAM Sets available.
Definition: cslr_soc_defines.h:92
EDMA_clearErrorBitsRegion
void EDMA_clearErrorBitsRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum, uint32_t evtQNum)
Clears Event Register and Error Register for a specific DMA channel and brings back EDMA to its initi...
EDMA_allocDmaChannel
int32_t EDMA_allocDmaChannel(EDMA_Handle handle, uint32_t *dmaCh)
Function to allocate the Dma Channel.
EDMA_close
void EDMA_close(EDMA_Handle handle)
Function to close a EDMA peripheral specified by the EDMA handle.
EDMA_dmaSetPaRAMEntry
void EDMA_dmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
EDMA_qdmaSetPaRAM
void EDMA_qdmaSetPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (QDMA only).
EDMA_Attrs
EDMA instance attributes - used during init time.
Definition: edma/v0/edma.h:526
EDMA_clrMissEvtRegion
void EDMA_clrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any missed event.
flags
uint8_t flags
Definition: hsmclient_msg.h:2
HwiP.h
EDMA_clrCCErr
void EDMA_clrCCErr(uint32_t baseAddr, uint32_t flags)
Enables the user to Clear any Channel controller Errors.
EDMA_enableDmaEvtRegion
void EDMA_enableDmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an DMA event.
gEdmaConfigNum
uint32_t gEdmaConfigNum
Externally defined driver configuration array size.
EDMA_getIntrStatusRegion
uint32_t EDMA_getIntrStatusRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupts status of those events which is less than 32.
EDMA_allocQdmaChannel
int32_t EDMA_allocQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to allocate the Dma Channel.
EDMA_channelToParamMap
void EDMA_channelToParamMap(uint32_t baseAddr, uint32_t channel, uint32_t paramSet)
This function maps DMA channel to any of the PaRAM sets in the PaRAM memory map.
EDMA_freeChannelRegion
uint32_t EDMA_freeChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t trigMode, uint32_t tccNum, uint32_t evtQNum)
Free the specified channel (DMA/QDMA/Link) and its associated resources (PaRAM Set,...
EDMA_enableQdmaEvtRegion
void EDMA_enableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to enable an QDMA event.
EDMA_initParamsInit
void EDMA_initParamsInit(EDMA_InitParams *initParam)
Structure initialization function for EDMA_InitParams.
EDMA_InitParams
EDMA initialization structure used for EDMAInitialize.
Definition: edma/v0/edma.h:438
EDMA_setQdmaTrigWord
void EDMA_setQdmaTrigWord(uint32_t baseAddr, uint32_t chNum, uint32_t trigWord)
Assign a Trigger Word to the specified QDMA channel.
Edma_IntrHandle
struct Edma_IntrObject_t * Edma_IntrHandle
EDMA interrupt handle returned from EDMA_registerIntr() function.
Definition: edma/v0/edma.h:463
EDMA_NUM_TCC
#define EDMA_NUM_TCC
Definition: edma/v0/edma.h:315
EDMA_unmapChToEvtQ
void EDMA_unmapChToEvtQ(uint32_t baseAddr, uint32_t chType, uint32_t chNum)
Remove Mapping of channel to Event Queue.
EDMA_qdmaGetErrIntrStatus
uint32_t EDMA_qdmaGetErrIntrStatus(uint32_t baseAddr)
This returns QDMA error interrupt status.
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:93
EDMA_freeParam
int32_t EDMA_freeParam(EDMA_Handle handle, uint32_t *param)
Function to free the Param.
EDMA_open
EDMA_Handle EDMA_open(uint32_t index, const EDMA_Params *prms)
This function opens a given EDMA instance.
EDMA_chainChannel
void EDMA_chainChannel(uint32_t baseAddr, uint32_t paRAMId1, uint32_t chId2, uint32_t chainOptions)
Chain the two specified channels.
EDMA_qdmaGetPaRAM
void EDMA_qdmaGetPaRAM(uint32_t baseAddr, uint32_t paRAMId, EDMACCPaRAMEntry *currPaRAM)
Retrieve existing PaRAM set associated with specified logical channel (QDMA).
EDMA_getErrIntrStatus
uint32_t EDMA_getErrIntrStatus(uint32_t baseAddr)
This returns error interrupt status for those events whose event number is less than 32.
EDMA_Handle
void * EDMA_Handle
A handle that is returned from a EDMA_open() call.
Definition: edma/v0/edma.h:499
EDMA_qdmaClrMissEvtRegion
void EDMA_qdmaClrMissEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to Clear any QDMA missed event.
EDMA_configureChannelRegion
uint32_t EDMA_configureChannelRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum, uint32_t tccNum, uint32_t paramId, uint32_t evtQNum)
Request a DMA/QDMA/Link channel.
EDMA_allocParam
int32_t EDMA_allocParam(EDMA_Handle handle, uint32_t *param)
Function to allocate the TCC.
EDMA_deinit
void EDMA_deinit(void)
This function Deinitializes the EDMA driver object and controller.
EDMA_getHandle
EDMA_Handle EDMA_getHandle(uint32_t index)
This function returns the handle of an open EDMA Instance from the instance index.
EDMA_dmaGetPaRAMEntry
uint32_t EDMA_dmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
EDMA_freeQdmaChannel
int32_t EDMA_freeQdmaChannel(EDMA_Handle handle, uint32_t *qdmaCh)
Function to free the Qdma Channel.
EDMA_getEnabledIntrRegion
uint32_t EDMA_getEnabledIntrRegion(uint32_t baseAddr, uint32_t regionId)
This function returns interrupt enable status of events which are less than 32.
EDMA_readEventStatusRegion
uint32_t EDMA_readEventStatusRegion(uint32_t baseAddr, uint32_t chNum)
This function reads Event pending status.
EDMA_setPaRAM
void EDMA_setPaRAM(uint32_t baseAddr, uint32_t paRAMId, const EDMACCPaRAMEntry *newPaRAM)
Copy the user specified PaRAM Set onto the PaRAM Set associated with the logical channel (DMA/Link).
EDMA_mapQdmaChToPaRAM
void EDMA_mapQdmaChToPaRAM(uint32_t baseAddr, uint32_t chNum, const uint32_t *paRAMId)
Enables the user to map a QDMA channel to PaRAM set This API Needs to be called before programming th...
EDMA_Params
EDMA open parameters passed to EDMA_open() function.
Definition: edma/v0/edma.h:455
gEdmaConfig
EDMA_Config gEdmaConfig[]
Externally defined driver configuration array.
EDMA_qdmaGetPaRAMEntry
uint32_t EDMA_qdmaGetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry)
Get a particular PaRAM entry of the specified PaRAM set.
gEdmaInitParams
EDMA_InitParams gEdmaInitParams[]
Externally defined driver init parameters array.
__attribute__
struct sockaddr __attribute__
HSM client / server message format struct.
EDMA_isInterruptEnabled
uint32_t EDMA_isInterruptEnabled(EDMA_Handle handle)
Function to check if EDMA interrupt is enabled.
EDMA_disableQdmaEvtRegion
void EDMA_disableQdmaEvtRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to disable an QDMA event.
EDMA_ccPaRAMEntry_init
void EDMA_ccPaRAMEntry_init(EDMACCPaRAMEntry *paramEntry)
Clear a PaRAM Set .
EDMA_getEventStatus
uint32_t EDMA_getEventStatus(uint32_t baseAddr)
This function returns status of those events which are less than 32.
EDMA_qdmaSetPaRAMEntry
void EDMA_qdmaSetPaRAMEntry(uint32_t baseAddr, uint32_t paRAMId, uint32_t paRAMEntry, uint32_t newPaRAMEntryVal)
Set a particular PaRAM set entry of the specified PaRAM set.
EDMA_getEventStatusHigh
uint32_t EDMA_getEventStatusHigh(uint32_t baseAddr)
This function returns status of those events which are greater than 32.
EDMA_disableChInShadowRegRegion
void EDMA_disableChInShadowRegRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chType, uint32_t chNum)
Disable channel to Shadow region mapping.
EDMA_disableEvtIntrRegion
void EDMA_disableEvtIntrRegion(uint32_t baseAddr, uint32_t regionId, uint32_t chNum)
Enables the user to clear CC interrupts.
EDMA_allocTcc
int32_t EDMA_allocTcc(EDMA_Handle handle, uint32_t *tcc)
Function to allocate the Qdma Channel.