Features Supported

Support for Single, Dual or Quad read operation.
Support for Interrupt mode.
Support for DMA read.
Programmable Signal Polarities
Programmable Active Clock Edge
Programmable Delay between chip select activation and output data from 0 to 3 QSPI clock cycles

SysConfig Features

Note: It is strongly recommend to use SysConfig where it is available instead of using direct SW API calls. This will help simplify the SW application and also catch common mistakes early in the development cycle.

QSPI instance name
Input clock frequency to be used for QSPI module
Input clock divider which decides the baud-rate at which the flash will be read
Chip Select
Enabling DMA mode
In advanced config, you can choose various parameters like frame format, decoder chip select polarity, read dummy cycles, SDK Infra and QSPI Interrupt

Features NOT Supported

Dual and Quad writes are not supported.

Usage Overview

API Sequence

To use the QSPI driver to send data over the SPI bus, the application calls the following APIs:

QSPI_open(): Initialize the QSPI driver.
QSPI_readMemMapMode() / QSPI_readConfigModeIntr(): Read data in Memory mapped mode, DMA mode and Interrupt.
QSPI_writeConfigMode() / QSPI_writeConfigModeIntr(): Write data in Config mode and Interrupt mode.
QSPI_close(): De-initialize the QSPI instance.

Example Usage

Include the below file to access the APIs

#include <stdio.h>
#include <string.h>
#include <drivers/qspi.h>
#include <kernel/dpl/MutexArmP.h>
#include <kernel/dpl/DebugP.h>
#include <kernel/nortos/dpl/r5/HwiP_armv7r_vim.h>

Instance Open Example

    QSPI_Params qspiParams;
 
    QSPI_Params_init(&qspiParams);
    gQspiHandle = QSPI_open(CONFIG_QSPI0, &qspiParams);
    DebugP_assert(gQspiHandle != NULL);

Instance Close Example

QSPI_close(gQspiHandle);

Blocking Write and Read Example

void transfer_blocking(void)
{
    int32_t status = SystemP_SUCCESS;
    uint32_t itr = 0U;
    QSPI_Transaction transaction;
 
    QSPI_transaction_init(&transaction);
    
    transaction.addrOffset = APP_QSPI_FLASH_OFFSET;
    transaction.buf = (void *)gQspiTxBuf;
    transaction.count = APP_QSPI_DATA_SIZE;
    transaction.transferTimeout = QSPI_Timeout;
    
    status = QSPI_writeConfigMode(gQspiHandle, &transaction);
 
    transaction.buf = (void *)gQspiRxBuf;
 
    status = QSPI_readMemMapMode(gQspiHandle,&transaction);
 
    for(itr = 0U; itr < APP_QSPI_DATA_SIZE; itr++)
    {
        if(gQspiTxBuf[itr] != gQspiRxBuf[itr])
        {
            status = SystemP_FAILURE;
            DebugP_logError("QSPI read data mismatch %d !!!\r\n",itr);
            break;
        }
    }
 
    if (status == SystemP_SUCCESS)
    {
        DebugP_log("QSPI Write and Read PASS");
    }
}

Non-Blocking Write and Read Example

void transfer_nonblocking(void)
{
    int32_t status = SystemP_SUCCESS;
    uint32_t itr = 0U;
    QSPI_WriteCmdParams wrParams;
    QSPI_ReadCmdParams rdParams;
 
    /* Read and Write Initialization */
    QSPI_readCmdParams_init(&rdParams);
    QSPI_writeCmdParams_init(&wrParams);
 
    /* Populate the write commands */
    wrParams.cmd = QSPI_NOR_PAGE_PROG;
    wrParams.cmdAddr = APP_QSPI_FLASH_OFFSET;
    wrParams.numAddrBytes = QSPI_ADDR_BYTES;
    wrParams.txDataBuf = (void *)(gQspiTxBuf);
    wrParams.txDataLen = APP_QSPI_DATA_SIZE;
 
    QSPI_writeConfigModeIntr(gQspiHandle,&wrParams);
 
    /* Populate the Read commands */
    rdParams.cmd = QSPI_NOR_CMD_SINGLE_READ;
    rdParams.cmdAddr = APP_QSPI_FLASH_OFFSET;
    rdParams.numAddrBytes = QSPI_ADDR_BYTES;
    rdParams.rxDataBuf = (void *)(gQspiRxBuf);
    rdParams.rxDataLen = APP_QSPI_DATA_SIZE;
 
    QSPI_readConfigModeIntr(gQspiHandle,&rdParams);
 
    for(itr = 0U; itr < APP_QSPI_DATA_SIZE; itr++)
    {
        if(gQspiTxBuf[itr] != gQspiRxBuf[itr])
        {
            status = SystemP_FAILURE;
            DebugP_logError("QSPI read data mismatch %d !!!\r\n",itr);
            break;
        }
    }
    if (status == SystemP_SUCCESS)
    {
        DebugP_log("QSPI Write and Read PASS");
    }
}

API

APIs for QSPI

Table of Contents