AM263x MCU+ SDK  08.06.00
Release Notes 08.06.00

Attention
Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines.
Note
The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination.
Unless explicitly noted otherwise, the SW modules would work in both FreeRTOS and no-RTOS environment.
Unless explicitly noted otherwise, the SW modules would work on any of the R5F's present on the SOC.
Attention
Klockwork Static Analysis report is not updated for this release

New in this Release

Feature Module
CAN SBL (basic CAN) support SBL
MMCSD SBL support SBL
MCAN transceiver based example MCAN
ECAP Type 3 driver and syconfig ECAP
EPWM TYpe 5 sysconfig enhancement EPWM
EQEP example enhancements - Error check EQEP
Early Ethernet with PHY in strapped mode example Ethernet
Receive packet Scatter-Gather feature support Ethernet
Support for custom modification receive packet buffer size Ethernet
Mbed-TLS library support (software cryptography) Networking
DSCP priority mapping support in CPSW Ethernet
ENET driver (enet-lld) APIs added to support IEEE 802.1Qav (TSN Credit Based Shapper) in CPSW Ethernet
R5 PMU driver and example added PMU

Device and Validation Information

SOC Supported CPUs EVM Host PC
AM263x R5F AM263x ControlCard Revision E1 (referred to as am263x-cc in code).
Windows 10 64b or Ubuntu 18.04 64b
AM263x R5F AM263x LaunchPad Revision E2 (referred to as am263x-lp in code) Windows 10 64b or Ubuntu 18.04 64b

Refer here for information about using this release with E2 revision of ControlCard

Dependent Tools and Compiler Information

Tools Supported CPUs Version
Code Composer Studio R5F 12.1.0
SysConfig R5F 1.14.0, build 2667
TI ARM CLANG R5F 2.1.2.LTS
FreeRTOS Kernel R5F 10.4.3
LwIP R5F STABLE-2_1_2_RELEASE
Mbed-TLS R5F mbedtls-2.13.1
Attention
TI ARM CLANG 2.1.2.LTS is not part of CCS by default, Follow steps at TI CLANG Compiler Toolchain to install the compiler

Key Features

Experimental Features

Attention
Features listed below are early versions and should be considered as "experimental".
Users can evaluate the feature, however the feature is not fully tested at TI side.
TI would not support these feature on public e2e.
Experimental features will be enabled with limited examples and SW modules.
Feature Module
GUI for UART Uniflash Tool Bootloader

OS Kernel

OS Supported CPUs SysConfig Support Key features tested Key features not tested / NOT supported
FreeRTOS Kernel R5F NA Task, Task notification, interrupts, semaphores, mutexs, timers Task load measurement using FreeRTOS run time statistics APIs. Limited support for ROV features.
FreeRTOS POSIX R5F NA pthread, mqueue, semaphore, clock -
NO RTOS R5F NA See Driver Porting Layer (DPL) below -

Driver Porting Layer (DPL)

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
Cache R5F YES FreeRTOS, NORTOS Cache write back, invalidate, enable/disable -
Clock R5F YES FreeRTOS, NORTOS Tick timer at user specified resolution, timeouts and delays -
CpuId R5F NA FreeRTOS, NORTOS Verify Core ID and Cluster ID that application is currently running on -
CycleCounter R5F NA FreeRTOS, NORTOS Measure CPU cycles using CPU specific internal counters -
Debug R5F YES FreeRTOS, NORTOS Logging and assert to any combo of: UART, CCS, shared memory -
Heap R5F NA FreeRTOS, NORTOS Create arbitrary heaps in user defined memory segments -
Hwi R5F YES FreeRTOS, NORTOS Interrupt register, enable/disable/restore, Interrupt prioritization -
MPU R5F YES FreeRTOS, NORTOS Setup MPU and control access to address space -
Semaphore R5F NA FreeRTOS, NORTOS Binary, Counting Semaphore, recursive mutexs with timeout -
Task R5F NA FreeRTOS Create, delete tasks -
Timer R5F YES FreeRTOS, NORTOS Configure arbitrary timers -

Secondary Bootloader (SBL)

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
Bootloader R5FSS0-0 YES NORTOS Boot modes: QSPI, UART. All R5F's. RPRC, multi-core image format Force Dual Core Mode, Disable Dual Core Switch and R5SS1 only not tested

SOC Device Drivers

Peripheral Supported CPUs SysConfig Support DMA Supported Key features tested Key features not tested / NOT supported
ADC R5F YES Yes. Example: adc_soc_continuous_dma Single software triggered conversion, Multiple ADC trigger using PWM, Result read using DMA, EPWM trip through PPB limit, PPB limits, PPB offsets, burst mode oversampling, differential mode, Offset, EPWM triggered conversion -
Bootloader R5F YES Yes. DMA enabled for SBL QSPI Boot modes: QSPI, UART. All R5F's -
CMPSS R5F YES NA Asynchronous PWM trip -
CPSW R5F YES No MAC loopback, PHY loopback, LWIP: Getting IP, Ping, Iperf, Layer 2 MAC, Layer 2 PTP Timestamping and Ethernet CPSW Switch support -
DAC R5F YES Yes. Example: dac_sine_dma Constant voltage, Square wave generation, Sine wave generation with and without DMA, Ramp wave generation, Random Voltage generation -
ECAP R5F YES No ECAP APWM mode, PWM capture -
EDMA R5F YES NA DMA transfer using interrupt and polling mode, QDMA Transfer, Channel Chaining, PaRAM Linking -
EPWM R5F YES Yes. Example: epwm_dma PWM outputs A and B in up-down count mode, Trip zone, Update PWM using EDMA, Valley switching, High resolution time period adjustment, type5 feature -
EQEP R5F YES NA Speed and Position measurement. Frequency Measurement not tested
FSI R5F YES Yes. Example: fsi_loopback_dma RX, TX, polling, interrupt mode, Dma, single lane loopback. - FSI Spi Mode
GPIO R5F YES NA Output, Input and Interrupt functionality -
I2C R5F YES No Controller mode, basic read/write -
IPC Notify R5F YES NA Mailbox functionality, IPC between RTOS/NORTOS CPUs M4F core
IPC Rpmsg R5F YES NA RPMessage protocol based IPC M4F core
MCAN R5F YES No RX, TX, interrupt and polling mode, Corrupt Message Transmission Prevention, Error Passive state, Bus Off State, Bus Monitoring Mode -
MCSPI R5F YES Yes. Example: mcspi_loopback_dma Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode -
MDIO R5F YES NA Register read/write, link status and link interrupt enable API -
MPU Firewall R5F YES NA Only compiled (Works only on HS-SE device) -
MMCSD R5F YES NA MMCSD 4bit, Raw read/write - file IO, eMMC

PINMUX | R5F | YES | NA | Tested with multiple peripheral pinmuxes PMU | R5F | NO | NA | Tested various PMU events | Counter overflow detection is not enabled | - PRUICSS | R5F | YES | NA | Tested with Ethercat FW HAL | - QSPI | R5F | YES | Yes. Example: qspi_flash_dma_transfer | Read direct, Write indirect, Read/Write commands, DMA for read | - RTI | R5F | YES | No | Counter read, timebase selction, comparator setup for Interrupt, DMA requests | Capture feature, fast enabling/disabling of events not tested SDFM | R5F | YES | No | Filter data read from CPU, Filter data read with PWM sync | - SOC | R5F | YES | NA | Lock/unlock MMRs, clock enable, set Hz, Xbar configuration, SW Warm Reset, Address Translation | - SPINLOCK | R5F | NA | NA | Lock, unlock HW spinlocks | - UART | R5F | YES | Yes. Example: uart_echo_dma | Basic read/write at baud rate 115200, polling, interrupt mode | HW flow control not tested, DMA mode not supported WATCHDOG | R5F | YES | NA | Reset mode, Interrupt mode | -

Board Device Drivers

Peripheral Supported CPUs SysConfig Support Key features tested Key features not tested
EEPROM R5F YES Only compiled -
ETHPHY R5F YES Tested with ethercat_slave_beckhoff_ssc_demo example -
FLASH R5F YES QSPI Flash -
LED R5F YES GPIO -

CMSIS

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
- - - - - -

Industrial Communications Toolkit

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
EtherCAT SubDevice FWHAL R5F NO FreeRTOS Tested with ethercat_slave_beckhoff_ssc_demo example Reset isolation

Motor Control

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
- - - - - -

Networking

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
LwIP R5F YES FreeRTOS TCP/UDP IP networking stack with and without checksum offload enabled, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping Other LwIP features
Ethernet driver (ENET) R5F YES FreeRTOS Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, CPSW EST, interrupt pacing, Policer and Classifier, MDIO Manual Mode, CBS (IEEE 802.1Qav), Strapped PHY (Early Ethernet) RMII mode
ICSS-EMAC R5F YES FreeRTOS Only compiled Not tested
Mbed-TLS R5F NO FreeRTOS Tested software cryptography after porting, used mbedTLS with LwIP to implement HTTPS server Hardware offloaded cryptography

Demos

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
- - - - - -

Safety Diagnostic Library

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
MCRC R5F NA NORTOS Full CPU, Auto CPU Mode and Semi CPU Auto Mode -
DCC R5F NA NORTOS Single Shot and Continuous modes -
PBIST R5F NA NORTOS Memories supported by MSS PBIST controller. -
ESM R5F NA NORTOS Tested in combination with RTI, DCC -
RTI R5F NA NORTOS WINDOWSIZE_100_PERCENT, WINDOWSIZE_50_PERCENT ,Latency/Propagation timing error(early)(50% window),Latency/Propagation timing error(late)(50% window) -
ECC R5F NA NORTOS ECC of MSS_L2, R5F TCM, MCAN, VIM, ICSSM R5F Cache, HSM, CPSW
Bus Safety R5F NA NORTOS AHB, AXI, TPTC -
CCM R5F NA NORTOS CCM Self Test Mode,Error Forcing Mode and Self Test Error Forcing Mode. -
R5F STC(LBIST) R5F NA NORTOS STC of R5F. -
PARITY R5F NA NORTOS TCM and DMA memories -

Fixed Issues

ID Head Line Module Applicable Releases Applicable Devices Resolution/Comments
MCUSDK-9460 LIN SDK function is setting a improper register bit for selecting the checksum type in the register LIN 8.4.0 onwards AM263x None
MCUSDK-9313 EPWM : SYSCFG : Mixed Event selection is missing from the DC and ET Sub Modules EPWM 8.4.0 onwards AM263x None
MCUSDK-9044 Strapping mode in phy is not giving correct link speed Ethernet 8.5.0 onwards AM263x Phy configuration for strapped and forced mode was not correctly handled
MCUSDK-8994 EQEP frequency measurement example fails EQEP 8.5.0 onwards AM263x Incorrect value used for pass/fail criteria and typecasting bug in EQEP frequency measurement example
MCUSDK-8974 LIN External Example is only sending the LIN ID and no packet data LIN 8.4.0 onwards AM263x Incorrect lin configuration
MCUSDK-8383 Load from JSON feature fails in SysConfig in Windows PC Flash 8.4.0 onwards AM263x Updated the sysconfig to use OS agnostic copy function
MCUSDK-7320 Errata ADC: DMA Read of Stale Result ADC 8.4.0 onwards AM263x refer Errata i2355
MCUSDK-2557 AM263x_lp:EQEP examples are not working EQEP 8.2.0 onwards AM263x Incorrect value used for pass/fail criteria and typecasting bug in EQEP frequency measurement example
MCUSDK-9304 LWIP Ethernet CPSW Socket: Putting Udp application buffer in cached region of memory causes stale data to be sent out in Udp packets ENET 8.4.0 onwards AM263x Fixed the udp examples and added udp client socket example
MCUSDK-9185 Enet Lwip Ethernet CPSW example: Correct MAC address not available from EEPROM on custom board and Pg1.0 lp causes example crash ENET 8.4.0 onwards AM263x Fixed
PROC_SDL-5739 MCRC Auto mode was not implemented correctly. SDL 8.5.0 onwards AM263x Fixed the source and example.
MCUSDK-9578 ICSS-EMAC : IOCTL for statistics always returns errors ICSS-EMAC 7.3.0 onwards Fixed
MCUSDK-9640 ICSS-EMAC : isNRT flag in ICSS_EMAC_pollPkt is not cleared appropriately ICSS-EMAC 8.2.0 onwards AM64x, AM243x Fixed
MCUSDK-8403 1000000(1MHz) baud rate not working on UART UART 8.4.0 Fixed
MCUSDK-8983 EtherCAT : EDIO pins for AL event is not supported in firmware. EtherCAT 7.3.0 onwards AM263x Fixed
MCUSDK-9051 CAN : Sampling Point Calculation For Default Nominal and Data baud rate configuration not present in SysCfg CAN 8.5.0 AM263x Fixed
MCUSDK-9523 ENET : PhyState polling frequency is incorrectly set ENET 8.5.0 AM263x Fixed
MCUSDK-6909 EPWM: Emulation mode doesn't work EPWM 8.4.0 onwards Fixed
MCUSDK-7915 SDFM: EPWM filter sync example does not configure and check the PWM synchronization SDFM 8.3.0 onwards None
MCUSDK-8348 EnetDma_initPktInfo does not initialized chkSumInfo member Enet 8.4.0 onwards Fixed
MCUSDK-8989 WDT Reset example takes more than expiration time to reset. WDT 8.5.0 None
MCUSDK-8072 EnetBoard_setupPorts does not provide config option to enable internal delay for RGMII Enet 8.4.0 onwards None
MCUSDK-9480 EPWM : HR Updown example crashing on AM263x-LP EPWM 8.5.0 None
MCUSDK-9595 MCPSI Lookback DMA example locks up when the Bit Rate is set to < 12.5Mhz McSPI 8.4.0 onwards None
MCUSDK-9651 Enet - Host port statistics driver and CSL overlay is not correct Enet 8.5.0 None

Known Issues

ID Head Line Module Reported in release Workaround
MCUSDK-2294 GPIO Pin Direction GPIO. GPIO Pin Direction not getting automatically configured. 8.0.0 Use GPIO_setDirMode to set pin direction for GPIO pin.
MCUSDK-4234 FSI RX Generic Trigger Test is not working FSI 8.3.0 -
SITARAAPPS-2040 Dual Core configuration issue with CSP 1.1.3 (Sitara MCU Device Support) on AM263x CSP Gel Scripts 8.2.1 Edit gel file as mentioned in Prerequisites while running multi core applications.
MCUSDK-7030 Interrupt nesting is not functional as expected when you have 2 or more interrupts with different priorities MCAN 8.4.0 Keep the interrupt priority same in system
MCUSDK-7319 CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events SDFM 8.4.0 Avoid back-to-back writes within three SD-modulator clock cycles or have the SDCPARMx register bit fields configured in one register write.
MCUSDK-7811 CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks Ethernet CPSW 8.3.0 onwards Ensure from application side single ethernet packet does not span across memory banks.
MCUSDK-8073 UART1 not working as expected while configuring two uarts i.e UART0 and UART1 for two different cores UART 8.4.0 onwards UART1 configuration from other core should be done after UART0 is configured and initialized
MCUSDK-8391 PRU Pin Mux configuration missing in syscfg am263x PRU 8.4.0 -
MCUSDK-8825 MCAN bit timing parameters not correct in Sysconfig generated code MCAN 8.4.0 -
MCUSDK-9082 MbedTLS - RSA exploit by kernel-privileged cache side-channel attackers Mbed-TLS 8.6.0 -
PROC_SDL-5159 SEC ECC Bus Safety for MSS_AXI_RD not supported. SDL 8.5.0 onwards None.
PROC_SDL-5616 For ECC Bus Safety, SEC and DED are not supported for CPSW. SDL 8.6.0 onwards None.
PROC_SDL-5617 ECC Bus safety for SEC and DED not supported for MSS_L2. SDL 8.6.0 onwards None.
PROC_SDL-4749 AXI DED Bus Safety fail. SDL 8.5.0 onwards None.
MCUSDK-9800 ENET: Connection reset while running HTTPS server due to insufficient packet buffers ENET 8.6.0 onwards -
MCUSDK-9813 WDT: Time to reset or generate interrupt is incorrect when run on CCS WDT 8.6.0 onwards -
MCUSDK-9662 QSPI LLD EDMA Transfer fails for size (Unaligned) > MAX EDMA CNT QSPI 8.4.0 onwards Initiate trasfer with aligned data
MCUSDK-9813 WDT takes incorrect time to reset or generate interrupt when run on CCS WDT 8.6.0 None. Works when run with sbl

Limitations

ID Head Line Module Reported in release Workaround
MCUSDK-9471 Ethernet CPSW CPDMA stuck with SOF overrun when TCP/DUP checksum offload is enabled. Ethernet CPSW 08.05.00 onwards Disable TCPUDP checksum offload in receive (THOST) direction.

Upgrade and Compatibility Information

Compiler Options

Module Affected API Change Additional Remarks

SOC Device Drivers

Module Affected API Change Additional Remarks
ECAP HRCAP APIs and Macros
  • Removed 16 functions:
    • HRCAP_enableHighResolution
    • HRCAP_disableHighResolution
    • HRCAP_enableHighResolutionClock
    • HRCAP_disbleHighResolutionClock
    • HRCAP_startCalibration
    • HRCAP_setCalibrationMode
    • HRCAP_enableCalibrationInterrupt
    • HRCAP_disableCalibrationInterrupt
    • HRCAP_getCalibrationFlags
    • HRCAP_clearCalibrationFlags
    • HRCAP_isCalibrationBusy
    • HRCAP_forceCalibrationFlags
    • HRCAP_setCalibrationPeriod
    • HRCAP_getCalibrationClockPeriod
    • HRCAP_getScaleFactor
    • HRCAP_convertEventTimeStampNanoseconds
  • Removed a supported input macro from 5 functions and 1 macro:
    • ECAP_ISR_SOURCE_HR_ERROR from ECAP_forceInterrupt, ECAP_clearInterrupt, ECAP_getInterruptSource, ECAP_disableInterrupt, ECAP_enableInterrupt. And from ECAP_ISR_SOURCE_ALL
  • Removed 2 enums and 3 macros:
    • HRCAP_CalibrationClockSource,
    • HRCAP_ContinuousCalibrationMode.
    • HRCAP_GLOBAL_CALIBRATION_INTERRUPT,
    • HRCAP_CALIBRATION_DONE and
    • HRCAP_CALIBRATION_PERIOD_OVERFLOW
  • CSLR change:
    • removed register offsets and related CSL for HRCAP in ECAP.
removed

HRCAP is not supported in AM263x.

Module Affected API Change Additional Remarks
FSI Macro FSI_RX_MASTER_CORE_RESET, FSI_TX_MASTER_CORE_RESET API/MACRO/STRUCTURE name are updated while keeping the case sensitivity from MASTER to MAIN Updated to use the inclusive naming
I2C Structure I2C_Transaction member slaveAddress, masterMode API/MACRO/STRUCTURE name are updated while keeping the case sensitivity from master to controller and slave to target, for example..
slaveAddress->targetAddress
Updated to use the inclusive naming
LIN Enum LIN_LINMode member LIN_MODE_LIN_SLAVE, LIN_MODE_LIN_MASTER
Enum LIN_MessageFilter member LIN_MSG_FILTER_IDSLAVE
Function LIN_setIDSlaveTask
API/MACRO/STRUCTURE name are updated while keeping the case sensitivity from master to commander and slave to responder, for example..
LIN_setIDSlaveTask->LIN_setIDResponderTask
Updated to use the inclusive naming
McSPI MACRO MCSPI_MS_MODE_MASTER, MCSPI_MS_MODE_SLAVE Replaced csumOffloadEn parameter with txCsumOffloadEn and rxCsumOffloadEn. This enables support to control TXP/DUP checksum offload along Rx and Tx seperatly.
SDFM MACRO SDFM_MASTER_INTERRUPT_FLAG
Function SDFM_enableMasterInterrupt
Function SDFM_disableMasterInterrupt
Function SDFM_enableMasterFilter
Function SDFM_disableMasterFilter
API/MACRO/STRUCTURE name are updated while keeping the case sensitivity from master to main, for example..
SDFM_enableMasterFilter->SDFM_enableMainFilter
Updated to use the inclusive naming

Networking

Module Affected API Change Additional Remarks
Ethernet CPSW Structure CpswHostPort_Cfg in Cpsw_Cfg
Function Enet_open
Replaced csumOffloadEn parameter with txCsumOffloadEn and rxCsumOffloadEn This enables support to control TXP/DUP checksum offload along Rx and Tx separately
Ethernet CPSW Structure EnetCpdma_Cfg in Cpsw_Cfg
Function Enet_open
Removed the parameter isCacheable. Support to place descriptor in cached memory is removed. CPDMA descriptiors has be placed un-cached memory section always.