| Feature | Module |
| Syconfig support and flash driver redesign to enable new flash configuration | OSPI |
| Optimized trigonometric funtion support on R5 core | Common |
| McSPI Driver update for performance improvement | McSPI |
| LIN driver and example support | LIN |
| EPWM: PWM protection and latency example using PRU | EPWM |
| SBL support to configure R5 in lockstep or dualcore mode | SBL |
| Syncronization support for 2 SDFM instances | SDFM |
| High sampling rate examples for burst mode | ADC |
| TCP/IP Checksum offload to hardware support enabled in ethernet CPSW driver | CPSW |
| Simplified LwIP CPSW examples added for reference | CPSW |
| CPSW Scatter-Gather and Interrupt pacing is enabled in enet driver and in reference example | CPSW |
| CPSW driver memory footprint reduced by more than 40% | CPSW |
| CPSW Layer-2 performance is benchmarked and added a reference example | CPSW |
| CPSW driver support added for MDIO manual mode | CPSW |
| CPSW ALE congurations are moved to SysConfig GUI | CPSW |
| CPSW DSCP Priority mapping and Policer usecase is added in the CPSW example | CPSW |
| Multi-core (R5) support added for CPSW driver | CPSW |
| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Cache | R5F | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is currently running on | - |
| CycleCounter | R5F | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore, Interrupt prioritization | - |
| MPU | R5F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| Semaphore | R5F | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | Yes. Example: adc_soc_continuous_dma | Single software triggered conversion, Multiple ADC trigger using PWM, Result read using DMA, EPWM trip through PPB limit, burst mode oversampling, differential mode | - |
| Bootloader | R5F | YES | Yes. DMA enabled for SBL QSPI | Boot modes: QSPI, UART. All R5F's | - |
| CMPSS | R5F | YES | NA | Asynchronous PWM trip | - |
| CPSW | R5F | YES | No | MAC loopback, PHY loopback, LWIP: Getting IP, Ping, Iperf, Layer 2 MAC, Layer 2 PTP Timestamping and CPSW Switch support | - |
| DAC | R5F | YES | Yes. Example: dac_sine_dma | Constant voltage, Square wave generation, Sine wave generation with and without DMA, Ramp wave generation, Random Voltage generation | - |
| ECAP | R5F | YES | No | ECAP APWM mode, PWM capture | - |
| EDMA | R5F | YES | NA | DMA transfer using interrupt and polling mode, QDMA Transfer, Channel Chaining, PaRAM Linking | - |
| EPWM | R5F | YES | Yes. Example: epwm_dma | PWM outputs A and B in up-down count mode, Trip zone, Update PWM using EDMA, Valley switching, High resolution time period adjustment, type5 feature | - |
| EQEP | R5F | YES | NA | Speed and Position measurement. | Frequency Measurement not tested |
| FSI | R5F | YES | Yes. Example: fsi_loopback_dma | RX, TX, polling, interrupt mode, Dma, single lane loopback. | - FSI Spi Mode |
| GPIO | R5F | YES | NA | Output, Input and Interrupt functionality | - |
| I2C | R5F | YES | No | Master mode, basic read/write | - |
| IPC Notify | R5F | YES | NA | Mailbox functionality, IPC between RTOS/NORTOS CPUs | M4F core |
| IPC Rpmsg | R5F | YES | NA | RPMessage protocol based IPC | M4F core |
| MCAN | R5F | YES | No | RX, TX, interrupt and polling mode, Corrupt Message Transmission Prevention, Error Passive state, Bus Off State, Bus Monitoring Mode | - |
| MCSPI | R5F | YES | Yes. Example: mcspi_loopback_dma | Master/Slave mode, basic read/write, polling, interrupt and DMA mode | - |
| MDIO | R5F | YES | NA | Register read/write, link status and link interrupt enable API | - |
| MPU Firewall | R5F | YES | NA | Only compiled (Works only on HS-SE device) | - |
| PINMUX | R5F | YES | NA | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | NA | Tested with Ethercat FW HAL | - |
| QSPI | R5F | YES | Yes. Example: qspi_flash_dma_transfer | Read direct, Write indirect, Read/Write commands, DMA for read | - |
| RTI | R5F | YES | No | Counter read, timebase selction, comparator setup for Interrupt, DMA requests | Capture feature, fast enabling/disabling of events not tested |
| SDFM | R5F | YES | No | Filter data read from CPU, Filter data read with PWM sync | - |
| SOC | R5F | YES | NA | Lock/unlock MMRs, clock enable, set Hz, Xbar configuration, SW Warm Reset, Address Translation | - |
| SPINLOCK | R5F | NA | NA | Lock, unlock HW spinlocks | - |
| UART | R5F | YES | Yes. Example: uart_echo_dma | Basic read/write at baud rate 115200, polling, interrupt mode | HW flow control not tested, DMA mode not supported |
| WATCHDOG | R5F | YES | NA | Reset mode | Interrupt mode |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-4050 | Long CS assert/deassert delay before and after the MCSPI data transfer | McSPI | 8.2.0 onwards | AM263x | Fixed |
| MCUSDK-4190 | Fixed MAC address is hard-coded for CPDMA devices, this will cause issue when two boards are connected in the same network | Enet | 8.2.0 onwards | AM263x | Fixed |
| MCUSDK-4345 | EDMA: Region interrupt not triggered if Channel Id and TCC are not equal | EDMA | 8.2.0 onwards | AM263x | Fixed |
| MCUSDK-4357 | hw_types.h should include <stdint.h> to resolve dependent includes | Common | 8.2.0 onwards | AM263x | Fixed |
| MCUSDK-4538 | [SBL] sbl qspi incorrect core number displayed for R5FSS1-0 | SBL | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-6263 | ADC interrupt are not cleared properly in ADC_soc_continuous_dma example | ADC | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7303 | MCAN_getTxBufCancellationIntrEnable is misnamed | MCAN | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7304 | CPSW: LWIP example doesn't work on port 2 | CPSW | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7308 | Multiple RTI instances selection leads to duplicates variable declaration in auto generated files | RTI & Sysconfig | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7322 | ADC: minimum Acquistion window should be 16 | ADC | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7342 | Unable to add more than one instance of Output XBAR in sysconfig | Sysconfig | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7813 | ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set | ADC | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7827 | CMPSS: Hysteresis APIs overwrite other register fields | CMPSS | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7833 | CMPSS: Invalid macros supported for input parameters to CMPSS_configLowComparator API | CMPSS | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7834 | CMPSS sysconfig: COMPL does not show configurable positive input source | CMPSS | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7835 | CMPSS sysconfig: CMPSSB shows invalid configurables | CMPSS | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7838 | CMPSS sysconfig: Incorrect the PWM sync source range and Blanking source range | CMPSS | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-7946 | Invalid interrupt source configuration for burst mode oversampling, differential mode ADC example | ADC | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-8039 | CPSW: Syscfg should not have two instances of CPSW for enabling both RGMIIs | CPSW | 8.3.0 onwards | AM263x | Fixed |
| MCUSDK-6207 | A53x, Linux references in documentation | Common | 8.3.0 onwards | Fixed |
| MCUSDK-7333 | DEV_ID and Core IDs table is not mentioned in documentation | Common | 8.3.0 onwards | Fixed |
| MCUSDK-7363 | [enet] Documentation of file name incorrect in sysconfig generated file | Enet | 8.3.0 onwards | Fixed |
| MCUSDK-8115 | HRPWM_getHiResTimeBasePeriod() API function doesn't return correct value | EPWM | 8.2.0 onwards | Fixed |
| MCUSDK-8116 | HRPWM_getCounterCompareValue() API function doesn't return correct value | EPWM | 8.2.0 onwards | Fixed |
| MCUSDK-8117 | HRPWM_getHiResCounterCompareValueOnly() API function doesn't return correct value | EPWM | 8.2.0 onwards | Fixed |
| ID | Head Line | Module | Reported in release | Workaround |
| MCUSDK-1016 | Semaphore does not function as expected when "post" call is present in multiple ISRs at different priorities | DPL, FreeRTOS | 8.0.0 | Disable interrupt nesting |
| MCUSDK-2294 | GPIO Pin Direction | GPIO. GPIO Pin Direction not getting automatically configured. | 8.0.0 | Use GPIO_setDirMode to set pin direction for GPIO pin. |
| MCUSDK-2557 | eqep_frequency_measurement example is failing | SBL | 8.2.0 | - |
| MCUSDK-4059 | AM263x: FSI first frame transmitted is incorrect in DMA mode | FSI | 8.3.0 | Please refer fsi_loopback_dma example. |
| MCUSDK-4234 | FSI RX Generic Trigger Test is not working | FSI | 8.3.0 | - |
| SITARAAPPS-2040 | Dual Core configuration issue with CSP 1.1.3 (Sitara MCU Device Support) on AM263x | CSP Gel Scripts | 8.2.1 | Edit gel file as mentioned in Prerequisites while running multi core applications. |
| MCUSDK-6909 | EPWM: Emulation mode doesn't work | EPWM | 8.4.0 | - |
| MCUSDK-7030 | [NORTOS]Interrupt nesting is not functional as expected when you have 2 or more interrupts with different priorities | MCAN | 8.4.0 | Keep the interrupt priority same in system |
| MCUSDK-7319 | CONTROLSS-SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events | SDFM | 8.4.0 | Avoid back-to-back writes within three SD-modulator clock cycles or have the SDCPARMx register bit fields configured in one register write. |
| MCUSDK-7811 | CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks | CPSW | 8.3.0 onwards | Ensure from application side single ethernet packet does not span across memory banks. |
| MCUSDK-7915 | SDFM: EPWM filter sync example does not configure and check the PWM synchronization | SDFM | 8.3.0 onwards | None |
| MCUSDK-8072 | [Enet] EnetBoard_setupPorts does not provide config option to enable internal delay for RGMII | Enet | 8.4.0 onwards | None |
| MCUSDK-8073 | UART1 not working as expected while configuring two uarts i.e UART0 and UART1 for two different cores | UART | 8.4.0 onwards | UART1 configuration from other core should be done after UART0 is configured and initialized |
| MCUSDK-8079 | EDMA: Aggregated interrupt used instead of Region interrupt | EDMA | 8.4.0 onwards | None |
| MCUSDK-8235 | AM263x LP: CMPSS: Example fails - PWM not tripped | CMPSS | 8.4.0 onwards | None |
| MCUSDK-8348 | EnetDma_initPktInfo does not initialized chkSumInfo member | Enet | 8.4.0 onwards | All L2 based applications need to explicitly set EnetDma_initPktInfo.chkSumInfo = 0 |
| Module | Affected API | Change | Additional Remarks |
| MCSPI | MCSPI_chConfig | Added parameter for trigger level configuration txFifoTrigLvl, rxFifoTrigLvl in MCSPI_ChConfig | Allows configuring tragger level through sys config. Regenerate the sys config files |
| MCAN | MCAN_getTxBufCancellationIntrEnable | Name changed from MCAN_getTxBufCancellationIntrEnable to MCAN_txBufCancellationIntrEnable. | MCAN_getTxBufCancellationIntrEnable function sets (does not get). So renamed to MCAN_txBufCancellationIntrEnable. |
| CMPSS | CMPSS_configLowComparator | Values (macros) that can be passed to CMPSS_configLowComparator() | Changed from CMPSS_INSRC_DAC, CMPSS_INSRC_PIN to CMPSS_INSRC_PIN_INL and CMPSS_INSRC_PIN_INH |
| CMPSS sysconfig | lowCompPositive | In CMPSSA 'Low Comparator Configuration', 'Negative Input Source' changed to 'Positive Input Source'. Valid values changed to CMPSS_INSRC_PIN_INL and CMPSS_INSRC_PIN_INH | CMPSSA low comparator does not have configurable negative input source. Low comparator Positive input source is configurable between pin INL and pin INH |
| CMPSS sysconfig | CMPSSB highCompNegative and CMPSSB lowCompPositive | In CMPSSB 'High Comparator Configuration' -> 'Negative Input Source' and 'Low Comparator Configuration' -> 'Positive Input Source' are removed. | CMPSSB high comparator and low comparator does not have configurable positive/negative input source. |
| SBL | Bootloader_socCpuPowerOnReset | Added argument to configure the R5 sub system to lockstep or dualcore mode | Function Bootloader_socCpuPowerOnReset() requires 2 arguments, cpuID and cpu operating mode
|
1.8.20