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AM263x MCU+ SDK
08.02.00
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Go to the documentation of this file.
63 #include <drivers/hw_include/hw_types.h>
64 #include <drivers/hw_include/cslr_soc.h>
66 #include <drivers/hw_include/cslr_adc.h>
76 #define ADC_EVT_TRIPHI (0x0001U)
77 #define ADC_EVT_TRIPLO (0x0002U)
78 #define ADC_EVT_ZERO (0x0004U)
86 #define ADC_FORCE_SOC0 (0x0001U)
87 #define ADC_FORCE_SOC1 (0x0002U)
88 #define ADC_FORCE_SOC2 (0x0004U)
89 #define ADC_FORCE_SOC3 (0x0008U)
90 #define ADC_FORCE_SOC4 (0x0010U)
91 #define ADC_FORCE_SOC5 (0x0020U)
92 #define ADC_FORCE_SOC6 (0x0040U)
93 #define ADC_FORCE_SOC7 (0x0080U)
94 #define ADC_FORCE_SOC8 (0x0100U)
95 #define ADC_FORCE_SOC9 (0x0200U)
96 #define ADC_FORCE_SOC10 (0x0400U)
97 #define ADC_FORCE_SOC11 (0x0800U)
98 #define ADC_FORCE_SOC12 (0x1000U)
99 #define ADC_FORCE_SOC13 (0x2000U)
100 #define ADC_FORCE_SOC14 (0x4000U)
101 #define ADC_FORCE_SOC15 (0x8000U)
375 #define ADC_ADCSOCxCTL_STEP (CSL_ADC_ADCSOC1CTL - CSL_ADC_ADCSOC0CTL)
376 #define ADC_ADCINTSELxNy_STEP (CSL_ADC_ADCINTSEL3N4 - CSL_ADC_ADCINTSEL1N2)
378 #define ADC_ADCPPBx_STEP (CSL_ADC_ADCPPB2CONFIG - CSL_ADC_ADCPPB1CONFIG)
380 #define ADC_ADCPPBTRIP_MASK ((uint32_t)CSL_ADC_ADCPPB1TRIPHI_LIMITHI_MASK \
382 | (uint32_t)CSL_ADC_ADCPPB1TRIPHI_HSIGN_MASK)
383 #define ADC_RESULT_ADCPPBxRESULT_STEP (CSL_ADC_RESULT_ADCPPB2RESULT -\
385 CSL_ADC_RESULT_ADCPPB1RESULT)
386 #define ADC_RESULT_ADCRESULTx_STEP (CSL_ADC_RESULT_ADCRESULT1 - \
388 CSL_ADC_RESULT_ADCRESULT0)
419 HW_WR_REG16(base + CSL_ADC_ADCCTL2,
420 ((HW_RD_REG16(base + CSL_ADC_ADCCTL2) &
421 ~CSL_ADC_ADCCTL2_PRESCALE_MASK) | (uint16_t)clkPrescale));
470 DebugP_assert((sampleWindow >= 1U) && (sampleWindow <= 512U));
475 ctlRegAddr = base + CSL_ADC_ADCSOC0CTL +
481 HW_WR_REG32(ctlRegAddr,
482 (((uint32_t)channel << CSL_ADC_ADCSOC0CTL_CHSEL_SHIFT) |
483 ((uint32_t)trigger << CSL_ADC_ADCSOC0CTL_TRIGSEL_SHIFT) |
484 (sampleWindow - 1U)));
523 shiftVal = (uint16_t)socNumber << 1U;
529 HW_WR_REG32(base + CSL_ADC_ADCINTSOCSEL1,
530 ((HW_RD_REG32(base + CSL_ADC_ADCINTSOCSEL1) &
531 ~((uint32_t)CSL_ADC_ADCINTSOCSEL1_SOC0_MASK << shiftVal)) |
532 ((uint32_t)trigger << shiftVal)));
558 HW_WR_REG16(base + CSL_ADC_ADCCTL1,
559 ((HW_RD_REG16(base + CSL_ADC_ADCCTL1) &
560 ~CSL_ADC_ADCCTL1_INTPULSEPOS_MASK) |
561 ((uint16_t)pulseMode<<CSL_ADC_ADCCTL1_INTPULSEPOS_SHIFT)));
589 HW_WR_REG16(base + CSL_ADC_ADCINTCYCLE, cycleOffset);
613 HW_WR_REG16(base + CSL_ADC_ADCCTL1,
614 (HW_RD_REG16(base + CSL_ADC_ADCCTL1) | CSL_ADC_ADCCTL1_ADCPWDNZ_MASK));
634 HW_WR_REG16(base + CSL_ADC_ADCCTL1,
635 (HW_RD_REG16(base + CSL_ADC_ADCCTL1) &
636 ~CSL_ADC_ADCCTL1_ADCPWDNZ_MASK));
660 HW_WR_REG16(base + CSL_ADC_ADCSOCFRC1, (1U << (uint16_t)socNumber));
690 HW_WR_REG16(base + CSL_ADC_ADCSOCFRC1, socMask);
717 return((HW_RD_REG16(base + CSL_ADC_ADCINTFLG) &
718 (1U << (uint16_t)adcIntNum)) != 0U);
745 HW_WR_REG16(base + CSL_ADC_ADCINTFLGCLR, (1U << (uint16_t)adcIntNum));
773 return((HW_RD_REG16(base + CSL_ADC_ADCINTOVF) &
774 (1U << (uint16_t)adcIntNum)) != 0U);
801 HW_WR_REG16(base + CSL_ADC_ADCINTOVFCLR, (1U << (uint16_t)adcIntNum));
823 static inline uint16_t
829 return(HW_RD_REG16(resultBase + CSL_ADC_RESULT_ADCRESULT0 +
852 return((HW_RD_REG16(base + CSL_ADC_ADCCTL1) &
853 CSL_ADC_ADCCTL1_ADCBSY_MASK) != 0U);
891 regValue = (uint16_t)trigger |
892 ((burstSize - 1U) << CSL_ADC_ADCBURSTCTL_BURSTSIZE_SHIFT);
894 HW_WR_REG16(base + CSL_ADC_ADCBURSTCTL,
895 ((HW_RD_REG16(base + CSL_ADC_ADCBURSTCTL) &
896 ~((uint16_t)CSL_ADC_ADCBURSTCTL_BURSTTRIGSEL_MASK |
897 CSL_ADC_ADCBURSTCTL_BURSTSIZE_MASK)) | regValue));
921 HW_WR_REG16(base + CSL_ADC_ADCBURSTCTL,
922 (HW_RD_REG16(base + CSL_ADC_ADCBURSTCTL) |
923 CSL_ADC_ADCBURSTCTL_BURSTEN_MASK));
945 HW_WR_REG16(base + CSL_ADC_ADCBURSTCTL,
946 (HW_RD_REG16(base + CSL_ADC_ADCBURSTCTL) &
947 ~CSL_ADC_ADCBURSTCTL_BURSTEN_MASK));
983 HW_WR_REG16(base + CSL_ADC_ADCSOCPRICTL,
984 ((HW_RD_REG16(base + CSL_ADC_ADCSOCPRICTL) &
985 ~CSL_ADC_ADCSOCPRICTL_SOCPRIORITY_MASK) | (uint16_t)priMode));
1023 CSL_ADC_ADCPPB1CONFIG;
1028 HW_WR_REG16(base + ppbOffset,
1029 ((HW_RD_REG16(base + ppbOffset) & ~CSL_ADC_ADCPPB1CONFIG_CONFIG_MASK) |
1030 ((uint16_t)socNumber & CSL_ADC_ADCPPB1CONFIG_CONFIG_MASK)));
1059 HW_WR_REG16(base + CSL_ADC_ADCEVTSEL,
1060 (HW_RD_REG16(base + CSL_ADC_ADCEVTSEL) |
1061 (evtFlags << ((uint16_t)ppbNumber * 4U))));
1089 HW_WR_REG16(base + CSL_ADC_ADCEVTSEL,
1090 (HW_RD_REG16(base + CSL_ADC_ADCEVTSEL) &
1091 ~(evtFlags << ((uint16_t)ppbNumber * 4U))));
1121 HW_WR_REG16(base + CSL_ADC_ADCEVTINTSEL,
1122 (HW_RD_REG16(base + CSL_ADC_ADCEVTINTSEL) |
1123 (intFlags << ((uint16_t)ppbNumber * 4U))));
1153 HW_WR_REG16(base + CSL_ADC_ADCEVTINTSEL,
1154 (HW_RD_REG16(base + CSL_ADC_ADCEVTINTSEL) &
1155 ~(intFlags << ((uint16_t)ppbNumber * 4U))));
1170 static inline uint16_t
1176 return((HW_RD_REG16(base + CSL_ADC_ADCEVTSTAT) >>
1177 ((uint16_t)ppbNumber * 4U)) & 0x7U);
1207 HW_WR_REG16(base + CSL_ADC_ADCEVTCLR,
1208 (HW_RD_REG16(base + CSL_ADC_ADCEVTCLR) |
1209 evtFlags << ((uint16_t)ppbNumber * 4U)));
1229 static inline int32_t
1235 return((int32_t)HW_RD_REG32(resultBase + CSL_ADC_RESULT_ADCPPB1RESULT +
1253 static inline uint16_t
1262 CSL_ADC_ADCPPB1STAMP;
1267 return(HW_RD_REG16(base + ppbOffset) & CSL_ADC_ADCPPB1STAMP_DLYSTAMP_MASK);
1306 CSL_ADC_ADCPPB1OFFCAL;
1311 HW_WR_REG16(base + ppbOffset,
1312 ((HW_RD_REG16(base + ppbOffset) & ~CSL_ADC_ADCPPB1OFFCAL_OFFCAL_MASK) |
1313 ((uint16_t)offset & CSL_ADC_ADCPPB1OFFCAL_OFFCAL_MASK)));
1349 CSL_ADC_ADCPPB1OFFREF;
1354 HW_WR_REG16(base + ppbOffset, offset);
1383 CSL_ADC_ADCPPB1CONFIG;
1388 HW_WR_REG16(base + ppbOffset,
1389 (HW_RD_REG16(base + ppbOffset) |
1390 CSL_ADC_ADCPPB1CONFIG_TWOSCOMPEN_MASK));
1419 CSL_ADC_ADCPPB1CONFIG;
1424 HW_WR_REG16(base + ppbOffset,
1425 (HW_RD_REG16(base + ppbOffset) &
1426 ~CSL_ADC_ADCPPB1CONFIG_TWOSCOMPEN_MASK));
1453 CSL_ADC_ADCPPB1CONFIG;
1458 HW_WR_REG16(base + ppbOffset,
1459 (HW_RD_REG16(base + ppbOffset) | CSL_ADC_ADCPPB1CONFIG_CBCEN_MASK));
1485 CSL_ADC_ADCPPB1CONFIG;
1490 HW_WR_REG16(base + ppbOffset,
1491 (HW_RD_REG16(base + ppbOffset) & ~CSL_ADC_ADCPPB1CONFIG_CBCEN_MASK));
1515 uint32_t intRegAddr;
1522 intRegAddr = base + CSL_ADC_ADCINTSEL1N2 +
1524 shiftVal = ((uint16_t)adcIntNum & 0x1U) << 3U;
1529 HW_WR_REG16(intRegAddr,
1530 HW_RD_REG16(intRegAddr) |
1531 (CSL_ADC_ADCINTSEL1N2_INT1E_MASK << shiftVal));
1555 uint32_t intRegAddr;
1562 intRegAddr = base + CSL_ADC_ADCINTSEL1N2 +
1564 shiftVal = ((uint16_t)adcIntNum & 0x1U) << 3U;
1569 HW_WR_REG16(intRegAddr,
1570 HW_RD_REG16(intRegAddr) &
1571 ~(CSL_ADC_ADCINTSEL1N2_INT1E_MASK << shiftVal));
1599 uint32_t intRegAddr;
1606 intRegAddr = base + CSL_ADC_ADCINTSEL1N2 +
1608 shiftVal = ((uint16_t)adcIntNum & 0x1U) << 3U;
1613 HW_WR_REG16(intRegAddr,
1614 ((HW_RD_REG16(intRegAddr) &
1615 ~(CSL_ADC_ADCINTSEL1N2_INT1SEL_MASK << shiftVal)) |
1616 ((uint16_t)socNumber << shiftVal)));
1641 uint32_t intRegAddr;
1648 intRegAddr = base + CSL_ADC_ADCINTSEL1N2 +
1650 shiftVal = ((uint16_t)adcIntNum & 0x1U) << 3U;
1655 HW_WR_REG16(intRegAddr,
1656 HW_RD_REG16(intRegAddr) |
1657 (CSL_ADC_ADCINTSEL1N2_INT1CONT_MASK << shiftVal));
1683 uint32_t intRegAddr;
1690 intRegAddr = base + CSL_ADC_ADCINTSEL1N2 +
1692 shiftVal = ((uint16_t)adcIntNum & 0x1U) << 3U;
1697 HW_WR_REG16(intRegAddr,
1698 HW_RD_REG16(intRegAddr) &
1699 ~(CSL_ADC_ADCINTSEL1N2_INT1CONT_MASK << shiftVal));
1752 int32_t tripHiLimit, int32_t tripLoLimit);
@ ADC_SOC_NUMBER7
SOC/EOC number 7.
Definition: adc/v1/adc.h:318
ADC_Resolution
Definition: adc/v1/adc.h:135
@ ADC_SOC_NUMBER15
SOC/EOC number 15.
Definition: adc/v1/adc.h:326
@ ADC_SOC_NUMBER9
SOC/EOC number 9.
Definition: adc/v1/adc.h:320
@ ADC_TRIGGER_EPWM26_SOCA
ePWM26, ADCSOCA
Definition: adc/v1/adc.h:218
@ ADC_TRIGGER_EPWM3_SOCA
ePWM3, ADCSOCA
Definition: adc/v1/adc.h:172
#define ADC_RESULT_ADCPPBxRESULT_STEP
Register offset difference between 2 ADCPPBxRESULT registers.
Definition: adc/v1/adc.h:384
@ ADC_CLK_DIV_2_0
ADCCLK = (input clock) / 2.0.
Definition: adc/v1/adc.h:112
static void ADC_disablePPBEventInterrupt(uint32_t base, ADC_PPBNumber ppbNumber, uint16_t intFlags)
Definition: adc/v1/adc.h:1142
@ ADC_TRIGGER_EPWM14_SOCB
ePWM14, ADCSOCB
Definition: adc/v1/adc.h:195
static void ADC_disablePPBTwosComplement(uint32_t base, ADC_PPBNumber ppbNumber)
Definition: adc/v1/adc.h:1411
ADC_ClkPrescale
Definition: adc/v1/adc.h:110
@ ADC_INT_NUMBER3
ADCINT3 Interrupt.
Definition: adc/v1/adc.h:282
@ ADC_TRIGGER_EPWM24_SOCA
ePWM24, ADCSOCA
Definition: adc/v1/adc.h:214
@ ADC_CH_ADCIN2
single-ended, ADCIN2
Definition: adc/v1/adc.h:243
@ ADC_TRIGGER_EPWM23_SOCA
ePWM23, ADCSOCA
Definition: adc/v1/adc.h:212
@ ADC_TRIGGER_EPWM11_SOCB
ePWM11, ADCSOCB
Definition: adc/v1/adc.h:189
static uint16_t ADC_getPPBEventStatus(uint32_t base, ADC_PPBNumber ppbNumber)
Definition: adc/v1/adc.h:1171
@ ADC_PULSE_END_OF_CONV
Occurs at the end of the conversion.
Definition: adc/v1/adc.h:266
static void ADC_clearInterruptOverflowStatus(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:796
static void ADC_enableBurstMode(uint32_t base)
Definition: adc/v1/adc.h:916
@ ADC_CH_ADCIN0
single-ended, ADCIN0
Definition: adc/v1/adc.h:241
@ ADC_SOC_NUMBER8
SOC/EOC number 8.
Definition: adc/v1/adc.h:319
@ ADC_TRIGGER_EPWM9_SOCB
ePWM9, ADCSOCB
Definition: adc/v1/adc.h:185
@ ADC_TRIGGER_EPWM16_SOCA
ePWM16, ADCSOCA
Definition: adc/v1/adc.h:198
@ ADC_SOC_NUMBER1
SOC/EOC number 1.
Definition: adc/v1/adc.h:312
@ ADC_PRI_THRU_SOC5_HIPRI
SOC 0-5 hi pri, others in round robin.
Definition: adc/v1/adc.h:356
static void ADC_disablePPBEvent(uint32_t base, ADC_PPBNumber ppbNumber, uint16_t evtFlags)
Definition: adc/v1/adc.h:1079
@ ADC_INT_SOC_TRIGGER_ADCINT1
ADCINT1 will trigger the SOC.
Definition: adc/v1/adc.h:338
@ ADC_TRIGGER_EPWM2_SOCB
ePWM2, ADCSOCB
Definition: adc/v1/adc.h:171
@ ADC_INT_NUMBER4
ADCINT4 Interrupt.
Definition: adc/v1/adc.h:283
@ ADC_TRIGGER_EPWM27_SOCA
ePWM27, ADCSOCA
Definition: adc/v1/adc.h:220
@ ADC_SOC_NUMBER11
SOC/EOC number 11.
Definition: adc/v1/adc.h:322
#define ADC_ADCINTSELxNy_STEP
Register offset difference between 2 ADCINTSELxNy registers.
Definition: adc/v1/adc.h:377
@ ADC_INT_SOC_TRIGGER_NONE
No ADCINT will trigger the SOC.
Definition: adc/v1/adc.h:337
@ ADC_PRI_THRU_SOC14_HIPRI
SOC 0-14 hi pri, SOC15 in round robin.
Definition: adc/v1/adc.h:365
@ ADC_MODE_SINGLE_ENDED
Sample on single pin with VREFLO.
Definition: adc/v1/adc.h:147
@ ADC_TRIGGER_EPWM28_SOCA
ePWM28, ADCSOCA
Definition: adc/v1/adc.h:222
@ ADC_TRIGGER_EPWM6_SOCB
ePWM6, ADCSOCB
Definition: adc/v1/adc.h:179
@ ADC_TRIGGER_EPWM12_SOCB
ePWM12, ADCSOCB
Definition: adc/v1/adc.h:191
@ ADC_TRIGGER_EPWM4_SOCA
ePWM4, ADCSOCA
Definition: adc/v1/adc.h:174
static void ADC_enablePPBEventCBCClear(uint32_t base, uint32_t ppbNumber)
Definition: adc/v1/adc.h:1445
static void ADC_forceMultipleSOC(uint32_t base, uint16_t socMask)
Definition: adc/v1/adc.h:685
@ ADC_CLK_DIV_4_0
ADCCLK = (input clock) / 4.0.
Definition: adc/v1/adc.h:116
static void ADC_disablePPBEventCBCClear(uint32_t base, uint32_t ppbNumber)
Definition: adc/v1/adc.h:1477
ADC_PulseMode
Definition: adc/v1/adc.h:262
@ ADC_TRIGGER_EPWM29_SOCB
ePWM29, ADCSOCB
Definition: adc/v1/adc.h:225
#define ADC_ADCSOCxCTL_STEP
Defines used by the driver.
Definition: adc/v1/adc.h:375
@ ADC_TRIGGER_EPWM27_SOCB
ePWM27, ADCSOCB
Definition: adc/v1/adc.h:221
static void ADC_setInterruptPulseMode(uint32_t base, ADC_PulseMode pulseMode)
Definition: adc/v1/adc.h:553
static void ADC_setInterruptSource(uint32_t base, ADC_IntNumber adcIntNum, ADC_SOCNumber socNumber)
Definition: adc/v1/adc.h:1596
@ ADC_PRI_THRU_SOC10_HIPRI
SOC 0-10 hi pri, others in round robin.
Definition: adc/v1/adc.h:361
@ ADC_TRIGGER_EPWM30_SOCB
ePWM30, ADCSOCB
Definition: adc/v1/adc.h:227
@ ADC_PRI_THRU_SOC11_HIPRI
SOC 0-11 hi pri, others in round robin.
Definition: adc/v1/adc.h:362
@ ADC_PRI_THRU_SOC3_HIPRI
SOC 0-3 hi pri, others in round robin.
Definition: adc/v1/adc.h:354
ADC_Trigger
Definition: adc/v1/adc.h:159
@ ADC_CLK_DIV_5_0
ADCCLK = (input clock) / 5.0.
Definition: adc/v1/adc.h:118
@ ADC_PRI_THRU_SOC4_HIPRI
SOC 0-4 hi pri, others in round robin.
Definition: adc/v1/adc.h:355
@ ADC_TRIGGER_EPWM2_SOCA
ePWM2, ADCSOCA
Definition: adc/v1/adc.h:170
@ ADC_PRI_THRU_SOC7_HIPRI
SOC 0-7 hi pri, others in round robin.
Definition: adc/v1/adc.h:358
@ ADC_TRIGGER_EPWM31_SOCA
ePWM31, ADCSOCA
Definition: adc/v1/adc.h:228
ADC_SOCNumber
Definition: adc/v1/adc.h:310
@ ADC_CH_ADCIN1
single-ended, ADCIN1
Definition: adc/v1/adc.h:242
static void ADC_setBurstModeConfig(uint32_t base, ADC_Trigger trigger, uint16_t burstSize)
Definition: adc/v1/adc.h:878
static void ADC_enableContinuousMode(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:1639
@ ADC_INT_NUMBER1
ADCINT1 Interrupt.
Definition: adc/v1/adc.h:280
@ ADC_TRIGGER_EPWM7_SOCB
ePWM7, ADCSOCB
Definition: adc/v1/adc.h:181
static void ADC_setInterruptSOCTrigger(uint32_t base, ADC_SOCNumber socNumber, ADC_IntSOCTrigger trigger)
Definition: adc/v1/adc.h:515
@ ADC_CH_CAL0
single-ended, CAL0
Definition: adc/v1/adc.h:247
@ ADC_TRIGGER_RTI1
RTI Timer 1.
Definition: adc/v1/adc.h:162
@ ADC_SOC_NUMBER3
SOC/EOC number 3.
Definition: adc/v1/adc.h:314
static bool ADC_getInterruptStatus(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:712
static uint16_t ADC_getPPBDelayTimeStamp(uint32_t base, ADC_PPBNumber ppbNumber)
Definition: adc/v1/adc.h:1254
@ ADC_SOC_NUMBER10
SOC/EOC number 10.
Definition: adc/v1/adc.h:321
@ ADC_TRIGGER_EPWM12_SOCA
ePWM12, ADCSOCA
Definition: adc/v1/adc.h:190
@ ADC_TRIGGER_EPWM9_SOCA
ePWM9, ADCSOCA
Definition: adc/v1/adc.h:184
@ ADC_TRIGGER_EPWM15_SOCB
ePWM15, ADCSOCB
Definition: adc/v1/adc.h:197
static void ADC_enablePPBEvent(uint32_t base, ADC_PPBNumber ppbNumber, uint16_t evtFlags)
Definition: adc/v1/adc.h:1049
@ ADC_TRIGGER_EPWM17_SOCB
ePWM17, ADCSOCB
Definition: adc/v1/adc.h:201
@ ADC_PRI_THRU_SOC13_HIPRI
SOC 0-13 hi pri, others in round robin.
Definition: adc/v1/adc.h:364
@ ADC_CLK_DIV_7_5
ADCCLK = (input clock) / 7.5.
Definition: adc/v1/adc.h:123
@ ADC_TRIGGER_EPWM29_SOCA
ePWM29, ADCSOCA
Definition: adc/v1/adc.h:224
@ ADC_PRI_THRU_SOC6_HIPRI
SOC 0-6 hi pri, others in round robin.
Definition: adc/v1/adc.h:357
static void ADC_setInterruptCycleOffset(uint32_t base, uint16_t cycleOffset)
Definition: adc/v1/adc.h:584
static void ADC_setPPBCalibrationOffset(uint32_t base, ADC_PPBNumber ppbNumber, int16_t offset)
Definition: adc/v1/adc.h:1297
@ ADC_TRIGGER_EPWM5_SOCB
ePWM5, ADCSOCB
Definition: adc/v1/adc.h:177
@ ADC_CLK_DIV_6_0
ADCCLK = (input clock) / 6.0.
Definition: adc/v1/adc.h:120
@ ADC_TRIGGER_EPWM25_SOCA
ePWM25, ADCSOCA
Definition: adc/v1/adc.h:216
ADC_PPBNumber
Definition: adc/v1/adc.h:293
@ ADC_CLK_DIV_8_5
ADCCLK = (input clock) / 8.5.
Definition: adc/v1/adc.h:125
@ ADC_TRIGGER_EPWM22_SOCB
ePWM22, ADCSOCB
Definition: adc/v1/adc.h:211
@ ADC_PRI_ALL_ROUND_ROBIN
Round robin mode is used for all.
Definition: adc/v1/adc.h:350
@ ADC_TRIGGER_EPWM17_SOCA
ePWM17, ADCSOCA
Definition: adc/v1/adc.h:200
@ ADC_SOC_NUMBER0
SOC/EOC number 0.
Definition: adc/v1/adc.h:311
ADC_IntSOCTrigger
Definition: adc/v1/adc.h:336
void ADC_setMode(uint32_t base, ADC_Resolution resolution, ADC_SignalMode signalMode)
@ ADC_TRIGGER_EPWM28_SOCB
ePWM28, ADCSOCB
Definition: adc/v1/adc.h:223
@ ADC_PPB_NUMBER3
Post-processing block 3.
Definition: adc/v1/adc.h:296
static void ADC_clearInterruptStatus(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:740
ADC_PriorityMode
Definition: adc/v1/adc.h:349
@ ADC_CLK_DIV_8_0
ADCCLK = (input clock) / 8.0.
Definition: adc/v1/adc.h:124
@ ADC_PRI_THRU_SOC8_HIPRI
SOC 0-8 hi pri, others in round robin.
Definition: adc/v1/adc.h:359
@ ADC_TRIGGER_EPWM1_SOCB
ePWM1, ADCSOCB
Definition: adc/v1/adc.h:169
@ ADC_SOC_NUMBER5
SOC/EOC number 5.
Definition: adc/v1/adc.h:316
@ ADC_CLK_DIV_6_5
ADCCLK = (input clock) / 6.5.
Definition: adc/v1/adc.h:121
@ ADC_INT_SOC_TRIGGER_ADCINT2
ADCINT2 will trigger the SOC.
Definition: adc/v1/adc.h:339
@ ADC_TRIGGER_EPWM6_SOCA
ePWM6, ADCSOCA
Definition: adc/v1/adc.h:178
static void ADC_enableConverter(uint32_t base)
Definition: adc/v1/adc.h:608
@ ADC_PPB_NUMBER4
Post-processing block 4.
Definition: adc/v1/adc.h:297
@ ADC_TRIGGER_EPWM13_SOCB
ePWM13, ADCSOCB
Definition: adc/v1/adc.h:193
static uint16_t ADC_readResult(uint32_t resultBase, ADC_SOCNumber socNumber)
Definition: adc/v1/adc.h:824
@ ADC_SOC_NUMBER13
SOC/EOC number 13.
Definition: adc/v1/adc.h:324
@ ADC_CLK_DIV_3_5
ADCCLK = (input clock) / 3.5.
Definition: adc/v1/adc.h:115
@ ADC_PRI_THRU_SOC9_HIPRI
SOC 0-9 hi pri, others in round robin.
Definition: adc/v1/adc.h:360
@ ADC_CH_ADCIN5
single-ended, ADCIN5
Definition: adc/v1/adc.h:246
@ ADC_TRIGGER_EPWM8_SOCA
ePWM8, ADCSOCA
Definition: adc/v1/adc.h:182
static void ADC_enablePPBTwosComplement(uint32_t base, ADC_PPBNumber ppbNumber)
Definition: adc/v1/adc.h:1375
static void ADC_disableInterrupt(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:1553
@ ADC_RESOLUTION_12BIT
12-bit conversion resolution
Definition: adc/v1/adc.h:136
static void ADC_setupPPB(uint32_t base, ADC_PPBNumber ppbNumber, ADC_SOCNumber socNumber)
Definition: adc/v1/adc.h:1015
static bool ADC_getInterruptOverflowStatus(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:768
@ ADC_PRI_THRU_SOC1_HIPRI
SOC 0-1 hi pri, others in round robin.
Definition: adc/v1/adc.h:352
@ ADC_TRIGGER_EPWM15_SOCA
ePWM15, ADCSOCA
Definition: adc/v1/adc.h:196
static void ADC_forceSOC(uint32_t base, ADC_SOCNumber socNumber)
Definition: adc/v1/adc.h:655
@ ADC_MODE_DIFFERENTIAL
Sample on pair of pins.
Definition: adc/v1/adc.h:148
@ ADC_TRIGGER_EPWM10_SOCB
ePWM10, ADCSOCB
Definition: adc/v1/adc.h:187
static void ADC_disableConverter(uint32_t base)
Definition: adc/v1/adc.h:629
static void ADC_enablePPBEventInterrupt(uint32_t base, ADC_PPBNumber ppbNumber, uint16_t intFlags)
Definition: adc/v1/adc.h:1110
@ ADC_TRIGGER_EPWM10_SOCA
ePWM10, ADCSOCA
Definition: adc/v1/adc.h:186
@ ADC_PRI_THRU_SOC12_HIPRI
SOC 0-12 hi pri, others in round robin.
Definition: adc/v1/adc.h:363
@ ADC_TRIGGER_EPWM31_SOCB
ePWM31, ADCSOCB
Definition: adc/v1/adc.h:229
@ ADC_CH_ADCIN4
single-ended, ADCIN4
Definition: adc/v1/adc.h:245
@ ADC_CLK_DIV_7_0
ADCCLK = (input clock) / 7.0.
Definition: adc/v1/adc.h:122
@ ADC_TRIGGER_EPWM19_SOCA
ePWM19, ADCSOCA
Definition: adc/v1/adc.h:204
static void ADC_disableContinuousMode(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:1681
@ ADC_SOC_NUMBER12
SOC/EOC number 12.
Definition: adc/v1/adc.h:323
@ ADC_TRIGGER_EPWM7_SOCA
ePWM7, ADCSOCA
Definition: adc/v1/adc.h:180
@ ADC_TRIGGER_EPWM16_SOCB
ePWM16, ADCSOCB
Definition: adc/v1/adc.h:199
static void ADC_setPrescaler(uint32_t base, ADC_ClkPrescale clkPrescale)
Definition: adc/v1/adc.h:414
@ ADC_SOC_NUMBER14
SOC/EOC number 14.
Definition: adc/v1/adc.h:325
@ ADC_TRIGGER_EPWM30_SOCA
ePWM30, ADCSOCA
Definition: adc/v1/adc.h:226
@ ADC_PRI_THRU_SOC2_HIPRI
SOC 0-2 hi pri, others in round robin.
Definition: adc/v1/adc.h:353
@ ADC_INT_NUMBER2
ADCINT2 Interrupt.
Definition: adc/v1/adc.h:281
@ ADC_PULSE_END_OF_ACQ_WIN
Occurs at the end of the acquisition window.
Definition: adc/v1/adc.h:264
@ ADC_TRIGGER_EPWM18_SOCB
ePWM18, ADCSOCB
Definition: adc/v1/adc.h:203
@ ADC_CH_ADCIN2_ADCIN3
differential, ADCIN2 and ADCIN3
Definition: adc/v1/adc.h:250
void ADC_setPPBTripLimits(uint32_t base, ADC_PPBNumber ppbNumber, int32_t tripHiLimit, int32_t tripLoLimit)
ADC_SignalMode
Definition: adc/v1/adc.h:146
@ ADC_CH_ADCIN4_ADCIN5
differential, ADCIN4 and ADCIN5
Definition: adc/v1/adc.h:251
@ ADC_TRIGGER_EPWM18_SOCA
ePWM18, ADCSOCA
Definition: adc/v1/adc.h:202
@ ADC_CLK_DIV_1_0
ADCCLK = (input clock) / 1.0.
Definition: adc/v1/adc.h:111
@ ADC_TRIGGER_SW_ONLY
Software only.
Definition: adc/v1/adc.h:160
@ ADC_TRIGGER_INPUT_XBAR_OUT5
InputXBar.Out[5].
Definition: adc/v1/adc.h:165
@ ADC_TRIGGER_EPWM11_SOCA
ePWM11, ADCSOCA
Definition: adc/v1/adc.h:188
static int32_t ADC_readPPBResult(uint32_t resultBase, ADC_PPBNumber ppbNumber)
Definition: adc/v1/adc.h:1230
@ ADC_TRIGGER_EPWM3_SOCB
ePWM3, ADCSOCB
Definition: adc/v1/adc.h:173
@ ADC_PRI_ALL_HIPRI
All priorities based on SOC number.
Definition: adc/v1/adc.h:366
@ ADC_PRI_SOC0_HIPRI
SOC 0 hi pri, others in round robin.
Definition: adc/v1/adc.h:351
@ ADC_TRIGGER_EPWM0_SOCA
ePWM0, ADCSOCA
Definition: adc/v1/adc.h:166
@ ADC_CH_ADCIN0_ADCIN1
differential, ADCIN0 and ADCIN1
Definition: adc/v1/adc.h:249
@ ADC_SOC_NUMBER6
SOC/EOC number 6.
Definition: adc/v1/adc.h:317
static void ADC_enableInterrupt(uint32_t base, ADC_IntNumber adcIntNum)
Definition: adc/v1/adc.h:1513
@ ADC_TRIGGER_EPWM20_SOCB
ePWM20, ADCSOCB
Definition: adc/v1/adc.h:207
@ ADC_TRIGGER_EPWM1_SOCA
ePWM1, ADCSOCA
Definition: adc/v1/adc.h:168
@ ADC_SOC_NUMBER4
SOC/EOC number 4.
Definition: adc/v1/adc.h:315
@ ADC_CH_ADCIN3
single-ended, ADCIN3
Definition: adc/v1/adc.h:244
#define ADC_RESULT_ADCRESULTx_STEP
Register offset difference between 2 ADCRESULTx registers.
Definition: adc/v1/adc.h:387
@ ADC_TRIGGER_RTI2
RTI Timer 2.
Definition: adc/v1/adc.h:163
@ ADC_TRIGGER_EPWM19_SOCB
ePWM19, ADCSOCB
Definition: adc/v1/adc.h:205
@ ADC_TRIGGER_EPWM20_SOCA
ePWM20, ADCSOCA
Definition: adc/v1/adc.h:206
@ ADC_CLK_DIV_3_0
ADCCLK = (input clock) / 3.0.
Definition: adc/v1/adc.h:114
static void ADC_setSOCPriority(uint32_t base, ADC_PriorityMode priMode)
Definition: adc/v1/adc.h:978
@ ADC_TRIGGER_EPWM23_SOCB
ePWM23, ADCSOCB
Definition: adc/v1/adc.h:213
static void ADC_disableBurstMode(uint32_t base)
Definition: adc/v1/adc.h:940
static bool ADC_isBusy(uint32_t base)
Definition: adc/v1/adc.h:847
@ ADC_TRIGGER_RTI3
RTI Timer 3.
Definition: adc/v1/adc.h:164
static void ADC_setPPBReferenceOffset(uint32_t base, ADC_PPBNumber ppbNumber, uint16_t offset)
Definition: adc/v1/adc.h:1340
#define DebugP_assert(expression)
Function to call for assert check.
Definition: DebugP.h:159
@ ADC_TRIGGER_EPWM21_SOCA
ePWM21, ADCSOCA
Definition: adc/v1/adc.h:208
@ ADC_CLK_DIV_5_5
ADCCLK = (input clock) / 5.5.
Definition: adc/v1/adc.h:119
#define ADC_ADCPPBx_STEP
Register offset difference between 2 ADCPPBxCONFIG registers.
Definition: adc/v1/adc.h:379
@ ADC_TRIGGER_EPWM22_SOCA
ePWM22, ADCSOCA
Definition: adc/v1/adc.h:210
ADC_Channel
Definition: adc/v1/adc.h:240
@ ADC_CH_CAL1
single-ended, CAL1
Definition: adc/v1/adc.h:248
@ ADC_CLK_DIV_4_5
ADCCLK = (input clock) / 4.5.
Definition: adc/v1/adc.h:117
@ ADC_PPB_NUMBER1
Post-processing block 1.
Definition: adc/v1/adc.h:294
@ ADC_TRIGGER_EPWM8_SOCB
ePWM8, ADCSOCB
Definition: adc/v1/adc.h:183
@ ADC_TRIGGER_EPWM0_SOCB
ePWM0, ADCSOCB
Definition: adc/v1/adc.h:167
@ ADC_TRIGGER_EPWM24_SOCB
ePWM24, ADCSOCB
Definition: adc/v1/adc.h:215
@ ADC_CLK_DIV_2_5
ADCCLK = (input clock) / 2.5.
Definition: adc/v1/adc.h:113
ADC_IntNumber
Definition: adc/v1/adc.h:279
@ ADC_CH_CAL0_CAL1
differential, CAL0 and CAL1
Definition: adc/v1/adc.h:252
@ ADC_TRIGGER_EPWM13_SOCA
ePWM13, ADCSOCA
Definition: adc/v1/adc.h:192
@ ADC_TRIGGER_EPWM5_SOCA
ePWM5, ADCSOCA
Definition: adc/v1/adc.h:176
@ ADC_SOC_NUMBER2
SOC/EOC number 2.
Definition: adc/v1/adc.h:313
@ ADC_TRIGGER_EPWM21_SOCB
ePWM21, ADCSOCB
Definition: adc/v1/adc.h:209
@ ADC_TRIGGER_EPWM25_SOCB
ePWM25, ADCSOCB
Definition: adc/v1/adc.h:217
static void ADC_clearPPBEventStatus(uint32_t base, ADC_PPBNumber ppbNumber, uint16_t evtFlags)
Definition: adc/v1/adc.h:1196
@ ADC_TRIGGER_RTI0
RTI Timer 0.
Definition: adc/v1/adc.h:161
@ ADC_TRIGGER_EPWM14_SOCA
ePWM14, ADCSOCA
Definition: adc/v1/adc.h:194
@ ADC_TRIGGER_EPWM26_SOCB
ePWM26, ADCSOCB
Definition: adc/v1/adc.h:219
@ ADC_PPB_NUMBER2
Post-processing block 2.
Definition: adc/v1/adc.h:295
static void ADC_setupSOC(uint32_t base, ADC_SOCNumber socNumber, ADC_Trigger trigger, ADC_Channel channel, uint32_t sampleWindow)
Definition: adc/v1/adc.h:462
@ ADC_TRIGGER_EPWM4_SOCB
ePWM4, ADCSOCB
Definition: adc/v1/adc.h:175