| Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
| Cache | R5F | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
| Clock | R5F | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
| CycleCounter | R5F | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
| Debug | R5F | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
| Heap | R5F | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
| Hwi | R5F | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore, Interrupt prioritization | - |
| MPU | R5F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
| Semaphore | R5F | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
| Task | R5F | NA | FreeRTOS | Create, delete tasks | - |
| Timer | R5F | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
| Peripheral | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
| ADC | R5F | YES | Single software triggered conversion, Multiple ADC trigger using PWM, Result read using DMA, EPWM trip through PPB limit | - |
| Bootloader | R5F | YES | Boot modes: QSPI, UART. All R5F's | - |
| CMPSS | R5F | YES | Asynchronous PWM trip | - |
| CPSW | R5F | YES | MAC loopback, PHY loopback, LWIP: Getting IP, Ping, Iperf, Layer 2 MAC, Layer 2 PTP Timestamping and CPSW Switch support | - |
| DAC | R5F | YES | Constant voltage, Square wave generation, Sine wave generation with and without DMA | - |
| ECAP | R5F | YES | ECAP APWM mode, PWM capture | - |
| EDMA | R5F | YES | DMA transfer using interrupt and polling mode, QDMA Transfer, Channel Chaining, PaRAM Linking | - |
| EPWM | R5F | YES | PWM outputs A and B in up-down count mode, Trip zone, Update PWM using EDMA, Valley switching functionality, High resolution time period adjustment capability | - |
| EQEP | R5F | YES | Frequency Measurement, Speed and Position measurement. | - |
| FSI | R5F | YES | RX, TX, polling, interrupt mode, single lane loopback. | - |
| GPIO | R5F | YES | Output, Input and Interrupt functionality | - |
| I2C | R5F | YES | Master mode, basic read/write | - |
| IPC Notify | R5F | YES | Mailbox functionality, IPC between RTOS/NORTOS CPUs | M4F core |
| IPC Rpmsg | R5F | YES | RPMessage protocol based IPC | M4F core |
| MCAN | R5F | YES | RX, TX, interrupt and polling mode | - |
| MCSPI | R5F | YES | Master/Slave mode, basic read/write, polling, interrupt mode | - |
| MDIO | R5F | YES | Register read/write, link status and link interrupt enable API | - |
| MPU Firewall | R5F | YES | Only compiled (Works only on HS-SE device) | - |
| PINMUX | R5F | YES | Tested with multiple peripheral pinmuxes | - |
| PRUICSS | R5F | YES | Tested with Ethercat FW HAL | - |
| QSPI | R5F | YES | Read direct, Write indirect, Read/Write commands, DMA for read | - |
| SDFM | R5F | YES | Filter data read from CPU, Filter data read with PWM sync | - |
| SOC | R5F | YES | Lock/unlock MMRs, clock enable, set Hz, Xbar configuration | - |
| SPINLOCK | R5F | NA | Lock, unlock HW spinlocks | - |
| UART | R5F | YES | Basic read/write at baud rate 115200, polling, interrupt mode | HW flow control not tested, DMA mode not supported |
| WATCHDOG | R5F | YES | Reset mode | Interrupt mode |
| ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
| MCUSDK-2285 | Enet lld - Debug gels scripts are not updated for AM263x | Enet | 08_02_00 | AM263x | Fixed. debug gels for am263x created. |
| MCUSDK-2343 | Documentation update for out2rprc binary dependencies | Build, Common, SBL | 08_02_00 | AM263x | Fixed. Documentation Gap. out2rprc.exe is replaced by elf2rprc java scripts there by removing dependency of .NET framework tool. |
| MCUSDK-2396 | Low SVC stack size with Interrupt nesting enabled | DPL | 08_02_00 | AM263x | Fixed. Stack size was not modified for few SOC's. Increased SVC stack size |
| MCUSDK-2457 | Tools installed twice due to makefile based and ccs based builds | Build | 08_02_00 | AM263x | Fixed. Updated the make file to select the ti arm clang either from CCS or from c:/ti based on availability |
| MCUSDK-2541 | IPC developer guide block diagram shows invalid cores | IPC_Notify, IPC_RPMSG | 08_02_00 | AM263x | Fixed. Documentation corrected |
| MCUSDK-2544 | AM263x: MCAN driver doesn't support MCAN2,3 | MCAN | 08_02_00 | AM263x | Fixed. Updated driver to support MCAN2 and MCAN3 instances. |
| MCUSDK-2555 | EPWM driver bug in 8.1 SDK | EPWM | 08_02_00 | AM263x | Fixed. Reverted the code to prepare and write the whole 16 bits value. Fixed the macro used to write to RED/FED registers. |
| MCUSDK-2559 | AM263x_LP:FSI interrupt mode example | FSI | 08_02_00 | AM263x | Fixed. The INTXBAR0_G3_SEL values for FSI TX and RX in CSL files were incorrect. Replaced with correct values. Also updated example syscfg to add interrupt xbar configuration. |
| MCUSDK-2626 | QSPI Flash DMA transfer example fails the subsequent tests. | QSPI | 08_02_00 | AM263x | Fixed. QSPI test was overwriting the SBL which caused this issue. QSPI test flash address changed. |
| MCUSDK-2704 | Clock Jitter is observed after reconfiguring core PLL in SBL | CPSW, SBL | 08_02_00 | AM263x | Fixed. Need to follow below sequence before reconfiguring CORE PLL. 1) Before we program the PLLs the R5F source clock is changed to 25MHz clock and also change the peripheral clock sources that are used. 2) Sigma delta divider for optimum jitter bit is programmed as per the requirement, update that as well for CPSW 2G need. |
| MCUSDK-2874 | Enet - LWIP example fails to load in CCS with SBL null mode | LWIP, SBL | 08_02_00 | AM263x | Fixed. Bank2 and Bank3 of L2 memory needs to be initialized before loading any app image which is placed in this memory. ROM does only does for Bank0 and Bank1 of L2memory. Added this in SBL before loading any appimage. |
| MCUSDK-3302 | UART: UART_Params_init() configures intrNum incorrectly | UART | 08_02_00 | AM263x | Fixed. UART_Params_init() configures intrNum with 210. This is valid only for AM243/64. Fixed the issue by initializing intrNum with invalid value. This needs to be modified with correct interrupt line for UART, before calling UART_open() |
| MCUSDK-3335 | AM263x: SBL signing scripts fail | Build | 08_02_00 | AM263x | Fixed. Added missing template file am263x_x509template.txt needed by signing script. |
| MCUSDK-3393 | IPC testcase fails in SBL testing | IPC_Notify | 08_02_00 | AM263x | Fixed. SBL fixed by updating Mailbox init API's |
| MCUSDK-3413 | Section Writing flash driver for a custom flash device is missing in AM263x documentation | docs | 08_02_00 | AM263x | Fixed. Added documentation on how to write flash driver for a custom flash device. |
| MCUSDK-3489 | MPU Firewall: MPU_FIREWALL_getFirewallConfig() incorrect argument | MPU Firewall | 08_02_00 | AM263x | Fixed. Source pointer passed as argument was not updated. Used double pointer as argument to MPU_FIREWALL_getFirewallConfig(). This makes sure that the pointer at source is updated. |
| ID | Head Line | Module | Reported in release | Workaround |
| MCUSDK-1016 | Semaphore does not function as expected when "post" call is present in multiple ISRs at different priorities | DPL, FreeRTOS | 08_00_03 | Disable interrupt nesting |
| MCUSDK-2252 | GPIO Pin Direction | GPIO. GPIO Pin Direction not getting automatically configured. | 08_00_02 | Use GPIO_setDirMode to set pin direction for GPIO pin. |
| MCUSDK-2254 | SBL QSPI bootmode is not working with DMA enabled | SBL | 08_00_03 | - |
| MCUSDK-2257 | eqep_frequency_measurement example is failing | SBL | 08_02_00 | - |
| MCUSDK-2464 | ADC sysconfig code generation issue | ADC | 08_00_03 | - |
| MCUSDK-2703 | Interrupt XBAR instance for FSI is static | FSI | 08_00_03 | - |
| MCUSDK-3336 | FSI is not functional with clock divider value more than 8 | FSI | 08_02_00 | - |
| MCUSDK-3398 | Address translation for R5FSS1 is missing | SBL | 08_02_00 | - |
| MCUSDK-3436 | QSPI flashing fails with uniflash | Flash | 08_02_00 | -
|
1.8.20