AM263Px MCU+ SDK  10.01.00
Release Notes 10.01.00

Attention
1. Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines.
2. Multi Core ELF image format support has been added (Understanding Multicore ELF image format). RPRC format will be deprecated from SDK 11.0.
3. Test report is not uploaded in SDK due to an issue with the report generation tool.
Note
The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination.
Unless explicitly noted otherwise, the SW modules would work in both FreeRTOS and no-RTOS environment.
Unless explicitly noted otherwise, the SW modules would work on any of the R5F's present on the SOC.
Attention
Current PMIC support in SDK is bare minimum meant to power up the modules and should not be used beyond this including safety use-case etc

New in this Release

Feature Module
Support added for Ethernet PHY Configuration for ENET (CPSW) in SysConfig Gui Ethernet And Networking
Enablement of ethernet Ether-Ring Feature Ethernet And Networking
Application load over Ethernet to external Flash (SBL Enet) example is added SBL
Pinmux CSV Generation support in SysCfg Pinmux
FreeRTOS FAT Example support FreeRTOS
FSI LLD Support FSI
OSPI LLD Support OSPI
FreeRTOS Kernel migrated to 11.1.0 LTS FreeRTOS
Optishare Tool Support Optiflash
OTFA Safety ECC Support Optiflash
FOTA with XIP Example Optiflash

Modules Not tested/supported in this release

  • -

Device and Validation Information

SOC Supported CPUs EVM Host PC
AM263Px R5F AM263Px ControlCard E2 Rev (referred to as am263Px-cc in code).
Windows 10 64b or Ubuntu 18.04 64b
AM263Px R5F AM263Px LaunchPad (referred to as am263Px-lp in code).
Windows 10 64b or Ubuntu 18.04 64b

Dependent Tools and Compiler Information

Tools Supported CPUs Version
Code Composer Studio R5F 12.8.1
SysConfig R5F 1.21.2 build, build 3837
TI ARM CLANG R5F 4.0.1.LTS
FreeRTOS Kernel R5F 11.1.0
LwIP R5F STABLE-2_2_0_RELEASE
Mbed-TLS R5F 2.13.1

Key Features

Experimental Features

Attention
Features listed below are early versions and should be considered as "experimental".
Users can evaluate the feature, however the feature is not fully tested at TI side.
TI would not support these feature on public e2e.
Experimental features will be enabled with limited examples and SW modules.
Feature Module
GUI for UART Uniflash Tool Bootloader
Ether-ring Feature Ethernet And Networking

OS Kernel

OS Supported CPUs SysConfig Support Key features tested Key features not tested / NOT supported
FreeRTOS Kernel R5F NA Task, Task notification, interrupts, semaphores, mutexs, timers Task load measurement using FreeRTOS run time statistics APIs. Limited support for ROV features.
FreeRTOS POSIX R5F NA pthread, mqueue, semaphore, clock -
NO RTOS R5F NA See Driver Porting Layer (DPL) below -

Driver Porting Layer (DPL)

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
Cache R5F YES FreeRTOS, NORTOS Cache write back, invalidate, enable/disable -
Clock R5F YES FreeRTOS, NORTOS Tick timer at user specified resolution, timeouts and delays -
CpuId R5F NA FreeRTOS, NORTOS Verify Core ID and Cluster ID that application is currently running on -
CycleCounter R5F NA FreeRTOS, NORTOS Measure CPU cycles using CPU specific internal counters -
Debug R5F YES FreeRTOS, NORTOS Logging and assert to any combo of: UART, CCS, shared memory -
Heap R5F NA FreeRTOS, NORTOS Create arbitrary heaps in user defined memory segments -
Hwi R5F YES FreeRTOS, NORTOS Interrupt register, enable/disable/restore, Interrupt prioritization -
MPU R5F YES FreeRTOS, NORTOS Setup MPU and control access to address space -
Semaphore R5F NA FreeRTOS, NORTOS Binary, Counting Semaphore, recursive mutexs with timeout -
Task R5F NA FreeRTOS Create, delete tasks -
Timer R5F YES FreeRTOS, NORTOS Configure arbitrary timers -

Secondary Bootloader (SBL)

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
Bootloader R5FSS0-0 YES NORTOS Boot modes: OSPI, UART. All R5F's. RPRC, MCELF, multi-core image format Force Dual Core Mode

SOC Device Drivers

Peripheral Supported CPUs SysConfig Support DMA Supported Key features tested Key features not tested / NOT supported
ADC, ADC_R R5F YES Yes. Examples: adc_soc_continuous_dma, adc_alternate_dma_trigger Single software triggered conversion, Multiple ADC trigger using PWM, Result read using DMA (normal and alternate triggers), EPWM trip through PPB limit, PPB features, Burst mode, Single and Differential mode, Interrupt with Offset from Aquisition Window, EPWM/ECAP/RTI triggered conversions, Trigger Repeater for Undersampling and Oversampling, Global Force on Multiple ADCs, Internal DAC Loopback to Calibration Channels, Safety Checker and Aggregator, Open Short Detection feature External channel selection
Bootloader R5F YES Yes. DMA enabled for SBL OSPI Boot modes: OSPI, UART. All R5F's -
CMPSS R5F YES NA Asynchronous PWM trip, digital filter, Calibration, Diode Emulation example CMPSS Dac LoopBack feature
CPSW R5F YES No MAC loopback, PHY loopback, LWIP: Getting IP, Ping, Iperf, Layer 2 MAC, Layer 2 PTP Timestamping and Ethernet CPSW Switch support, TSN stack RMII, MII mode
DAC R5F YES Yes. Example: dac_sine_dma Constant voltage, Square wave generation, Sine wave generation with and without DMA, Ramp wave generation, Random Voltage generation -
ECAP R5F YES yes. Example : ecap_edma ECAP APWM mode, PWM capture, DMA trigger in both APWM and Capture Modes, ecap signal monitoring example -
EDMA R5F YES NA DMA transfer using interrupt and polling mode, QDMA Transfer, Channel Chaining, PaRAM Linking -
EPWM R5F YES Yes. Example: epwm_dma, epwm_xcmp_dma Multiple EPWM Sync from Top Module, PWM outputs A and B in up-down count mode, Trip zone, Update PWM using EDMA, Valley switching, High resolution time period adjustment, chopper module features, type5 features -
EQEP R5F YES NA Speed and Position measurement. Frequency Measurement, Speed and Direction Measurement, cw-ccw modes -
FSI R5F YES Yes. Example: fsi_loopback_dma RX, TX, polling, interrupt mode, Dma, single lane loopback. - FSI Spi Mode
GPIO R5F YES NA Output, Input and Interrupt functionality -
I2C R5F YES No Controller mode, basic read/write -
IPC Notify R5F YES NA Mailbox functionality, IPC between RTOS/NORTOS CPUs M4F core
IPC Rpmsg R5F YES NA RPMessage protocol based IPC M4F core
LIN R5F YES YES RX, TX, polling, interrupt, DMA mode. -
MCAN R5F YES No RX, TX, interrupt and polling mode, Corrupt Message Transmission Prevention, Error Passive state, Bus Off State, Bus Monitoring Mode -
MCSPI R5F YES Yes. Example: mcspi_loopback_dma Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode -
MDIO R5F YES NA Register read/write, link status and link interrupt enable API -
MMCSD R5F YES NA MMCSD 4bit, Raw read/write file IO, eMMC
PINMUX R5F YES NA Tested with multiple peripheral pinmuxes -
PMU R5F NO NA Tested various PMU events Counter overflow detection is not enabled
OptiFlash R5F Yes NA FLC, RL2, RAT functionality, XIP with RL2 enabled OptiShare
OSPI R5F YES Yes. Example: ospi_flash_dma Read direct, Write indirect, Read/Write commands, DMA for read -
RTI R5F YES No Counter read, timebase selection, comparator setup for Interrupt, DMA requests Capture feature, fast enabling/disabling of events not tested
RESOLVER R5F YES No Angle and Speed Calcution. input Band Pass Filter, Manual Phase Gain Correction and Manual Ideal Sample Selection Mode calculation, Non-Rotational Safety Diagnostic features, Dual motor/Single motor redundant sensing Tuning, Rotational Safety Diagnostic features
SDFM R5F YES yes. Example : sdfm_filter_sync_dmaread Filter data read from CPU, Filter data read with PWM sync, triggered DMA read from the Filter FIFO, ECAP Clock LoopBack -
SOC R5F YES NA Lock/unlock MMRs, clock enable, set Hz, Xbar configuration, SW Warm Reset, Address Translation -
SPINLOCK R5F NA NA Lock, unlock HW spinlock -
UART R5F YES Yes. Example: uart_echo_dma Basic read/write at baud rate 115200, polling, interrupt mode HW flow control not tested, DMA mode not supported
WATCHDOG R5F YES NA Reset mode, Interrupt mode -

Trigonometric Operations

Peripheral Supported CPUs SysConfig Support DMA Supported Key features tested Key features not tested / NOT supported
TMU R5F NO NA TMU Operations, Pipelining, Contex Save Square Root, Division Operations. more than 1 Interrupt Nesting for the contex save is not Supported.

Board Device Drivers

Peripheral Supported CPUs SysConfig Support Key features tested Key features not tested
EEPROM R5F YES Only compiled -
FLASH R5F YES OSPI Flash -
LED R5F YES GPIO -
ETHPHY R5F YES Tested with ethercat_slave_beckhoff_ssc_demo example -
PMIC R5F YES LDO Voltage control -

Networking

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
Time-Sensitive Networking(gPTP-IEEE 802.1AS) R5F NO FreeRTOS gPTP IEEE 802.1 AS-2020 compliant gPTP stack, End Nodes and Bridge mode support, YANG data model configuration Multi-Clock Domain
LwIP R5F YES FreeRTOS TCP/UDP IP networking stack with and without checksum offload enabled, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping Other LwIP features
Ethernet driver (ENET) R5F YES FreeRTOS Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, CPSW EST, interrupt pacing, Policer and Classifier, MDIO Manual Mode, Credit Based Shaper (IEEE 802.1Qav), Strapped PHY (Early Ethernet) RMII, MII mode
ICSS-EMAC R5F YES FreeRTOS Switch and MAC features, Storm Prevention (MAC), Host Statistics, Multicast Filtering Promiscuous Mode
Ether-ring Implementation R5F NO FreeRTOS Duplicate Rejection, Ring termination and Packet Duplication Latency measurement, Performance KPIs

Safety Diagnostic Library

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
MCRC R5F NA NORTOS Full CPU, Auto CPU Mode and Semi CPU Auto Mode -
DCC R5F NA NORTOS Single Shot and Continuous modes -
PBIST R5F NA NORTOS Memories supported by MSS PBIST controller. -
ESM R5F NA NORTOS Tested in combination with RTI, DCC -
RTI R5F NA NORTOS WINDOWSIZE_100_PERCENT, WINDOWSIZE_50_PERCENT ,Latency/Propagation timing error(early)(50% window),Latency/Propagation timing error(late)(50% window) -
ECC R5F NA NORTOS ECC of MSS_L2, R5F TCM, MCAN, VIM, ICSSM, TPTC R5F Cache - DED
ECC Bus Safety R5F NA NORTOS AHB, AXI, TPTC -
CCM R5F NA NORTOS CCM Self Test Mode,Error Forcing Mode and Self Test Error Forcing Mode. TMU and RL2 are also validated -
R5F STC(LBIST), Static Register Read R5F NA NORTOS STC of R5F, R5F CPU Static Register Read -
TMU ROM Checksum R5F NA NORTOS ROM checksum for TMU -
Time out Gasket(STOG) R5F NA NORTOS Timeout gasket feature -
Thermal Monitor(VTM) R5F NA NORTOS Over, under and thershold temperature interrupts -
Integrated Example R5F NA FreeRTOS Integrated example with all the SDL modules integrated in to one example. ECC for TPTC, ECC Bus Safety and STC.

Note: SDL is validated only on ControlCard.

PRU IO

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
Empty PRU YES Bare Metal Empty project to get started with PRU firmware development -

Fixed Issues

ID Head Line Module Applicable Releases Applicable Devices Resolution/Comments
PROC_SDL-7615 ECC example fails for SEC and DED for TPTC memories. SDL 09.00.00 Onwards AM263x, AM263Px Fixed the example.
PROC_SDL-8393 In ECC bus safety, error injection test writes to address 0x0. SDL 09.01.00 Onwards AM263x, AM263Px Fixed the source code and example.
MCUSDK-13821 ADC reference monitor instance doesn't match the reference buffer instance ADC 10.00.00 AM263x, AM263Px Update the monitor instances.
MCUSDK-12262 EPWM deadband example failure EPWM 09.02.00 AM263x, AM263Px removed sync between the epwms and used the global tbclksync to synchronize the EPWMs
MCUSDK-13164 AM26x: EPWM DeadBand example failure EPWM 10.00.00 onwards phase shift adds a tbclk delay. added another EPWM instance to sync.
MCUSDK-12265 SDFM example failure on am263px-lp SDFM 09.01.00 AM263Px GEL updates on new CCS version, Previously working only with SBL
MCUSDK-13634 EPWM: Remove eventsUsed from Action Qualifier Syscfg. EPWM 10.00.00 onwards removed unused eventUsed element from the examples syscfg
MCUSDK-13670 SDFM ECAP loopback example used explicit HW_REG_RD SDFM 10.00.00 onwards updated the register read with corresponding API.
MCUSDK-13641, CODEGEN-12832 Increased build time for examples using Link Time Optimization (-flto) with TI-ARM-CLANG 4.0.0 LTS Build 10.00.00 onwards Issue fixed in latest 4.0.1 LTS compiler release.
MCUSDK-13727 OSPI Phy Tuning not working on AM263P LP Board with ISSI Flash OSPI 09.02.00 onwards Fixed in E2 revision of AM263P LP board. For E1 board, board modification is needed for DQS and LBK signals as mentioned in the Board User guide.

Known Issues

ID Head Line Module Reported in release Workaround
MCUSDK-13865 HRPWM Deadband sfo example has 1ns jitter EPWM 10.00.00 onwards -
MCUSDK-13201 HRPWM waveform not generating (in updwon count) when prescaler is non-zero and HRPE is enabled EPWM 10.00.01 onwards None
MCUSDK-13834 EQEP: EQEP frequency measurement example is not working as expected EQEP 10.00.01 onwards None
MCUSDK-14059 CMPSS DE example has Glitch in PWM output CMPSS 10.00.01 onwards None
MCUSDK-14051 EQEP : CW CCW example doesn't use polling or interrupt EQEP 10.00.01 None
MCUSDK-12312 ROM bootloader fails when booting from Macronix Flash on AM263Px-LP SBL 09.01.00 Use UART/CCS Boot
MCUSDK-12313 OSPI Phy Tuning not working on Macronix Flash on AM263Px-LP SBL 09.01.00 Use UART/CCS Boot
MCUSDK-12289 32 KB TCM is used in examples sysconfig MPU module, size should be 64 KB Common 09.01.00 Use 64KB TCM in user application
MCUSDK-12265 SDFM example failure on am263px-lp SDFM 09.01.00 None
MCUSDK-11675 INDAC write only works if MPU for flash is only configured as Strongly-ordered OSPI 09.01.00 None
MCUSDK-13111 Memory Configurator/syscfg auto-linker generator doesn't support reordering Build 09.01.00 onwards -
MCUSDK-13109 RTI Interrupt req is pulse type and not level type RTI 09.01.00 onwards -
MCUSDK-13014 The memory read feature of uniflash erases the memory Flash 09.01.00 onwards -
MCUSDK-13011 Multicore Empty project not working properly FreeRTOS 09.01.00 onwards -
MCUSDK-12986 FreeRTOS: Barrier instructions missing in Interrupt Disable/Enable API's FreeRTOS 09.01.00 onwards -
PINDSW-7715 Dual EMAC instance not working with both ports together for icss_emac_lwip example ICSS-EMAC 09.02.00 onwards None
PINDSW-7746 Low iperf values in TCP and UDP ICSS-EMAC 09.02.00 onwards None
PINDSW-8118 Enabling DHCP mode in icss_emac_lwip example causes assert ICSS-EMAC 09.02.00 onwards None
MCUSDK-12756 MbedTLS - Timing side channel attack in RSA private operation exposing plaintext. Mbed-TLS 08.06.00 onwards None
PROC_SDL-8392 In ECC bus safety example, ECC error is not properly cleared at the source. SDL 09.00.00 onwards None
PROC_SDL-8787 ECC TPTC and STC examples are not supported in SDL integrated example. SDL 10.01.00 onwards Use standalone examples.
PROC_SDL-8519 In ECC for R5F data cache only, double bit test is not supported. SDL 10.01.00 onwards None.
PROC_SDL-8857 SDL integrated example does not support ECC Bus Safety. SDL 10.01.00 onwards Use standalone example.
PROC_SDL-8859 STC example does not support R5FSS0. SDL 10.01.00 onwards Update the example to run the test for R5FSS0 from R5FSS1.
PROC_SDL-8864 D-tag and D-data ECC examples fail in release profile. SDL 10.01.00 onwards None.
PROC_SDL-8866 BTCM ECC example fails in release profile.. SDL 10.01.00 onwards Use debug profile.
MCUSDK-13473 UART Uniflash script fails with images > 1MB SBL 09.02.00 onwards Use JTAG based flashing
MCUSDK-13013 OSPI missing ECC_FAIL signal OSPI 09.02.00 onwards Configure pinmux for ECC_FAIL in application
MCUSDK-13517 FOTA firmware authentication does not happen on-the-fly FOTA 09.02.00 onwards -
MCUSDK-13660 Watchdog interrupt example not working Watchdog 09.02.00 onwards -
MCUSDK-12140 Flash Driver does not handle repeated id in read id Flash 09.02.00 onwards -
MCUSDK-12703 Multicore XIP Fails OptiFlash 09.02.00 onwards -
MCUSDK-13494 RL2 syscfg allows arbitrary flash size ranges SBL 09.02.00 onwards Access only permitted space from application
MCUSDK-13495 Applications with XIP sections more than 1MB fails to boot Flash, SBL 09.02.00 onwards -
MCUSDK-13375 "FOTA STIG Read" fails when pipeline is enabled OptiFlash 09.02.00 onwards Disable pipeline during XIP
MCUSDK-13630 Cache should not be enabled at L2 Bank boundaries Cache 09.02.00 onwards Create MPU configurations for end of each L2 Bank with Non Cached attribute
MCUSDK-13652 Readelf throws warning while parsing RS note SBL, QSPI 10.00.00 onwards -
MCUSDK-13182 SysCfg unexpectedly changes OSPI Pin OSPI 10.00.00 onwards Reconfigure OSPI Pins to original state after updating OSPI configurables.
MCUSDK-13874 Syscfg load json function for flash configuration imports does not work OSPI Load flash json button action never completes, it just keeps loading. -
MCUSDK-14110 Error building examples in CCS in mac Infra Example build fails in CCS only in MAC Machines Use makefile based build
MCUSDK-13513 AM263Px: UDP and TCP IPERF TX is unstable with 100Mbps link speed Networking 10.00.00 onwards -

Errata

ID Head Line Module SDK Status
i2189 OSPI: Controller PHY Tuning Algorithm OSPI Open
i2311 USART: Spurious DMA Interrupts UART Implemented
i2324 No synchronizer present between GCM and GCD status signals Common Implemented
i2345 CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks CPSW Implemented
i2350 McSPI data transfer using EDMA in 'ABSYNC' mode stops after 32 bits transfer McSPI Open
i2351 OSPI: Controller does not support Continuous Read mode with NAND Flash OSPI Open
i2354 SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events SDFM Open
i2356 ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set ADC Implemented
i2383 OSPI: 2-byte address is not supported in PHY DDR mode OSPI Open
i2401 CPSW: Host Timestamps Cause CPSW Port to Lock up CPSW Open
i2404 Race condition in mailbox registers resulting in events miss IPC, Mailbox Implemented
i2405 CONTROLSS: Race condition OUTPUT_XBAR and PWM_XBAR resulting in event miss Crossbar Open

Limitations

ID Head Line Module Reported in release Workaround
MCUSDK-13630 Cache should not be enabled at L2 Bank boundaries Cache 09.02.00 onwards Create MPU configurations for end of each L2 Bank with Non Cached attribute
MCUSDK-13630 Cache should not be enabled at L2 Bank boundaries Cache 09.02.00 onwards Create MPU configurations for end of each L2 Bank with Non Cached attribute
MCUSDK-13220 Multi Core Elf format has few limitations documented at Understanding Multicore ELF image format Infra 10.00.00 onwards -

Upgrade and Compatibility Information

Compiler Options

Module Affected API Change Additional Remarks

SOC Device Drivers

Module Affected API Change Additional Remarks
Resolver RDC_getDiagnosticsSinCosGainDriftData, RDC_setDiagnosticsSinCosGainDriftData structure udpate Diag_Mon_SinCos_Gain_drift_data threshold elements to type uint16_t from int16_t, gain_drift_en element name is updated to match.
Resolver RDC_init structure udpate Core_config_t gainByass elements to type uint16_t from int16_t
Resolver RDC_getCalibrationData return type changed form uint32_t to uint16_t returns the 16 bit ADC sample data, hence the change
Resolver RDC_enableDcOffsetAutoCorrection Active low bit action update -
Resolver RDC_getGainEstimation return type changed form int16_t* to float* Gain value is returned as gain squared. Please refer the API description for more details

Networking

Module Affected API Change Additional Remarks
Networking and Ethernet None Ethernet (CPSW) Examples are moved to a new diretory to source/networking/enet/core/examples from examples/networking -
Networking and Ethernet Ethernet PHY APIs Ethernet PHY driver source code is moved to board driver component. The corresponding location is moved to source/board/ethphy/enet from source/networking/enet/core/src/phy -