AM263Px MCU+ SDK  10.00.00
Release Notes 10.00.00

Table of Contents

Attention
1. There are known issues about increased build time for networking examples having Link Time Optimizations (LTO) enabled. Similar issue will be observed when enabling LTO on other examples. See Known Issues below.
2. Also refer to individual module pages for more details on each feature, unsupported features, important usage guidelines.
3. Multi Core ELF image format support has been added (Understanding Multicore ELF image format). RPRC format will be deprecated from SDK 11.0.
4. There is a known issue of OSPI Phy Tuning not working on AM263P LP Board with ISSI Flash. So, Phy tuning is disabled by default in Examples and SBL OSPI.
Note
The examples will show usage of SW modules and APIs on a specific CPU instance and OS combination.
Unless explicitly noted otherwise, the SW modules would work in both FreeRTOS and no-RTOS environment.
Unless explicitly noted otherwise, the SW modules would work on any of the R5F's present on the SOC.
Attention
Current PMIC support in SDK is bare minimum meant to power up the modules and should not be used beyond this including safety use-case etc
Note
CSP 12.7 or beyond needs to be used for XIP load/run from CCS. Refer Update CSP for installation steps.

New in this Release

Feature Module
Sysconfig support for PRU Projects PRUICSS
Fast Boot support for Improved boot time (Achieving Fast Secure Boot and Boot time calculator) SBL
MacOS support Infra
Multi Core ELF(MCELF) image format support (Understanding Multicore ELF image format) Build
OSPI Flash File System support (OSPI Flash File IO) QSPI
MMCSD LLD support (MMCSD Low Level Driver) MMCSD
CANFD HLD support (CANFD (HLD)) MCAN
SBL CAN support (SBL CAN UNIFLASH) SBL
JTAG Based Flashing support (SBL JTAG Uniflash) SBL
C++ Example project Examples
Real Time Debug support (Enabling Real Time Debug) Infra
Blackbird PMIC Driver support PMIC
Smart Layout Tool support OptiFlash
FOTA Accelerator support (How to use Flash Operation Scheduler Hardware) OptiFlash
Fota A/B Swap support (How to A/B Swap? Working of bootseg IP) OptiFlash
Support for Ethernet Add-on boards - Industrial and Automotive PHYs Ethernet

Modules Not tested/supported in this release

Device and Validation Information

SOC Supported CPUs EVM Host PC
AM263Px R5F AM263Px ControlCard E2 Rev (referred to as am263Px-cc in code).
Windows 10 64b or Ubuntu 18.04 64b
AM263Px R5F AM263Px LaunchPad (referred to as am263Px-lp in code).
Windows 10 64b or Ubuntu 18.04 64b

Dependent Tools and Compiler Information

Tools Supported CPUs Version
Code Composer Studio R5F 12.8.0
SysConfig R5F 1.21.0 build, build 3721
TI ARM CLANG R5F 4.0.0.LTS
FreeRTOS Kernel R5F 10.4.3
LwIP R5F STABLE-2_2_0_RELEASE
Mbed-TLS R5F mbedtls-3.0.0

Key Features

Experimental Features

Attention
Features listed below are early versions and should be considered as "experimental".
Users can evaluate the feature, however the feature is not fully tested at TI side.
TI would not support these feature on public e2e.
Experimental features will be enabled with limited examples and SW modules.
Feature Module
GUI for UART Uniflash Tool Bootloader

OS Kernel

OS Supported CPUs SysConfig Support Key features tested Key features not tested / NOT supported
FreeRTOS Kernel R5F NA Task, Task notification, interrupts, semaphores, mutexs, timers Task load measurement using FreeRTOS run time statistics APIs. Limited support for ROV features.
FreeRTOS POSIX R5F NA pthread, mqueue, semaphore, clock -
NO RTOS R5F NA See Driver Porting Layer (DPL) below -

Driver Porting Layer (DPL)

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
Cache R5F YES FreeRTOS, NORTOS Cache write back, invalidate, enable/disable -
Clock R5F YES FreeRTOS, NORTOS Tick timer at user specified resolution, timeouts and delays -
CpuId R5F NA FreeRTOS, NORTOS Verify Core ID and Cluster ID that application is currently running on -
CycleCounter R5F NA FreeRTOS, NORTOS Measure CPU cycles using CPU specific internal counters -
Debug R5F YES FreeRTOS, NORTOS Logging and assert to any combo of: UART, CCS, shared memory -
Heap R5F NA FreeRTOS, NORTOS Create arbitrary heaps in user defined memory segments -
Hwi R5F YES FreeRTOS, NORTOS Interrupt register, enable/disable/restore, Interrupt prioritization -
MPU R5F YES FreeRTOS, NORTOS Setup MPU and control access to address space -
Semaphore R5F NA FreeRTOS, NORTOS Binary, Counting Semaphore, recursive mutexs with timeout -
Task R5F NA FreeRTOS Create, delete tasks -
Timer R5F YES FreeRTOS, NORTOS Configure arbitrary timers -

Secondary Bootloader (SBL)

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
Bootloader R5FSS0-0 YES NORTOS Boot modes: OSPI, UART. All R5F's. RPRC, MCELF, multi-core image format Force Dual Core Mode

SOC Device Drivers

Peripheral Supported CPUs SysConfig Support DMA Supported Key features tested Key features not tested / NOT supported
ADC, ADC_R R5F YES Yes. Examples: adc_soc_continuous_dma, adc_alternate_dma_trigger Single software triggered conversion, Multiple ADC trigger using PWM, Result read using DMA (normal and alternate triggers), EPWM trip through PPB limit, PPB features, Burst mode, Single and Differential mode, Interrupt with Offset from Aquisition Window, EPWM/ECAP/RTI triggered conversions, Trigger Repeater for Undersampling and Oversampling, Global Force on Multiple ADCs, Internal DAC Loopback to Calibration Channels, Safety Checker and Aggregator, Open Short Detection feature External channel selection
Bootloader R5F YES Yes. DMA enabled for SBL OSPI Boot modes: OSPI, UART. All R5F's -
CMPSS R5F YES NA Asynchronous PWM trip, digital filter CMPSS Dac LoopBack feature
CPSW R5F YES No MAC loopback, PHY loopback, LWIP: Getting IP, Ping, Iperf, Layer 2 MAC, Layer 2 PTP Timestamping and Ethernet CPSW Switch support, TSN stack RMII, MII mode
DAC R5F YES Yes. Example: dac_sine_dma Constant voltage, Square wave generation, Sine wave generation with and without DMA, Ramp wave generation, Random Voltage generation -
ECAP R5F YES yes. Example : ecap_edma ECAP APWM mode, PWM capture, DMA trigger in both APWM and Capture Modes, ecap signal monitoring example -
EDMA R5F YES NA DMA transfer using interrupt and polling mode, QDMA Transfer, Channel Chaining, PaRAM Linking -
EPWM R5F YES Yes. Example: epwm_dma, epwm_xcmp_dma Multiple EPWM Sync from Top Module, PWM outputs A and B in up-down count mode, Trip zone, Update PWM using EDMA, Valley switching, High resolution time period adjustment, chopper module features, type5 features -
EQEP R5F YES NA Speed and Position measurement. Frequency Measurement -
FSI R5F YES Yes. Example: fsi_loopback_dma RX, TX, polling, interrupt mode, Dma, single lane loopback. - FSI Spi Mode
GPIO R5F YES NA Output, Input and Interrupt functionality -
I2C R5F YES No Controller mode, basic read/write -
IPC Notify R5F YES NA Mailbox functionality, IPC between RTOS/NORTOS CPUs M4F core
IPC Rpmsg R5F YES NA RPMessage protocol based IPC M4F core
MCAN R5F YES No RX, TX, interrupt and polling mode, Corrupt Message Transmission Prevention, Error Passive state, Bus Off State, Bus Monitoring Mode -
MCSPI R5F YES Yes. Example: mcspi_loopback_dma Controller/Peripheral mode, basic read/write, polling, interrupt and DMA mode -
MDIO R5F YES NA Register read/write, link status and link interrupt enable API -
MMCSD R5F YES NA MMCSD 4bit, Raw read/write file IO, eMMC
PINMUX R5F YES NA Tested with multiple peripheral pinmuxes -
PMU R5F NO NA Tested various PMU events Counter overflow detection is not enabled
OptiFlash R5F Yes NA FLC, RL2, RAT functionality, XIP with RL2 enabled OptiShare
OSPI R5F YES Yes. Example: ospi_flash_dma Read direct, Write indirect, Read/Write commands, DMA for read -
RTI R5F YES No Counter read, timebase selection, comparator setup for Interrupt, DMA requests Capture feature, fast enabling/disabling of events not tested
RESOLVER R5F YES No Angle and Speed Calcution. input Band Pass Filter, Manual Phase Gain Correction and Manual Ideal Sample Selection Mode calculation Tuning, Safety Diagnostic features
SDFM R5F YES yes. Example : sdfm_filter_sync_dmaread Filter data read from CPU, Filter data read with PWM sync, triggered DMA read from the Filter FIFO, ECAP Clock LoopBack -
SOC R5F YES NA Lock/unlock MMRs, clock enable, set Hz, Xbar configuration, SW Warm Reset, Address Translation -
SPINLOCK R5F NA NA Lock, unlock HW spinlock -
UART R5F YES Yes. Example: uart_echo_dma Basic read/write at baud rate 115200, polling, interrupt mode HW flow control not tested, DMA mode not supported
WATCHDOG R5F YES NA Reset mode, Interrupt mode -

Trigonometric Operations

Peripheral Supported CPUs SysConfig Support DMA Supported Key features tested Key features not tested / NOT supported
TMU R5F NO NA TMU Operations, Pipelining, Contex Save Square Root, Division Operations. more than 1 Interrupt Nesting for the contex save is not Supported.

Board Device Drivers

Peripheral Supported CPUs SysConfig Support Key features tested Key features not tested
EEPROM R5F YES Only compiled -
FLASH R5F YES OSPI Flash -
LED R5F YES GPIO -
ETHPHY R5F YES Tested with ethercat_slave_beckhoff_ssc_demo example -
PMIC R5F YES LDO Voltage control -

Networking

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
Time-Sensitive Networking(gPTP-IEEE 802.1AS) R5F NO FreeRTOS gPTP IEEE 802.1 AS-2020 compliant gPTP stack, End Nodes and Bridge mode support, YANG data model configuration Multi-Clock Domain
LwIP R5F YES FreeRTOS TCP/UDP IP networking stack with and without checksum offload enabled, TCP/UDP IP networking stack with server and client functionality, basic Socket APIs, netconn APIs and raw APIs, DHCP, ping, TCP iperf, scatter-gather, DSCP priority mapping Other LwIP features
Ethernet driver (ENET) R5F YES FreeRTOS Ethernet as port using CPSW, MAC loopback and PHY loopback, Layer 2 MAC, Packet Timestamping, CPSW Switch, CPSW EST, interrupt pacing, Policer and Classifier, MDIO Manual Mode, Credit Based Shaper (IEEE 802.1Qav), Strapped PHY (Early Ethernet) RMII, MII mode
ICSS-EMAC R5F YES FreeRTOS Switch and MAC features, Storm Prevention (MAC), Host Statistics, Multicast Filtering Promiscuous Mode

Safety Diagnostic Library

Module Supported CPUs SysConfig Support OS support Key features tested Key features not tested / NOT supported
MCRC R5F NA NORTOS Full CPU, Auto CPU Mode and Semi CPU Auto Mode -
DCC R5F NA NORTOS Single Shot and Continuous modes -
PBIST R5F NA NORTOS Memories supported by MSS PBIST controller. -
ESM R5F NA NORTOS Tested in combination with RTI, DCC -
RTI R5F NA NORTOS WINDOWSIZE_100_PERCENT, WINDOWSIZE_50_PERCENT ,Latency/Propagation timing error(early)(50% window),Latency/Propagation timing error(late)(50% window) -
ECC R5F NA NORTOS ECC of MSS_L2, R5F TCM, MCAN, VIM, ICSSM, TPTC R5F Cache
ECC Bus Safety R5F NA NORTOS AHB, AXI, TPTC -
CCM R5F NA NORTOS CCM Self Test Mode,Error Forcing Mode and Self Test Error Forcing Mode. TMU and RL2 are also validated -
R5F STC(LBIST), Static Register Read R5F NA NORTOS STC of R5F, R5F CPU Static Register Read -
TMU ROM Checksum R5F NA NORTOS ROM checksum for TMU -
Time out Gasket(STOG) R5F NA NORTOS Timeout gasket feature -
Thermal Monitor(VTM) R5F NA NORTOS Over, under and thershold temperature interrupts -

Note: SDL is validate only on ControlCard.

PRU IO

Module Supported CPUs SysConfig Support OS Support Key features tested Key features not tested
Empty PRU YES Bare Metal Empty project to get started with PRU firmware development -

Fixed Issues

ID Head Line Module Applicable Releases Applicable Devices Resolution/Comments
PROC_SDL-7347 MCRC does not provide API to configure data width, CRC algo etc. MCRC 09.00.00 Onwards AM263x, AM263Px -
PROC_SDL-6910 Update to move some of the non static registers. R5F CPU UTILS 09.00.00 Onwards AM263x, AM263Px Updated R5F UTILS structure to move some of the non static registers.
MCUSDK-12247 Syscfg: ouptutxbar generated code doesnt change the instance Control Drivers 10.00 AM263Px Updated SOC_xbar syscfg device data.
MCUSDK-13491 API EPWM_setActionQualifierShadowLoadMode does not set Shadow Mode EPWM 09.02.00 AM263x, AM263Px -
MCUSDK-13199 EPWM : HRPWM_setHiResCounterCompareValue writes incorrect value EPWM 09.02.00 AM263x, AM263Px -
PINDSW-8097 Wrong PHY Config when using the QSPI Boot mode ICSS-EMAC 09.02.00 Onwards AM263x, AM263Px Fixed the application intiialization sequence and added required delay for PHY Powerup to SMI ready.
MCUSDK-13531 UART DMA transfer fail UART 09.02.00 Onwards AM263x, AM263Px Added typecasting for UART Transaction in driver.
MCUSDK-13427 McSPI 3 Pin mode failure in DMA mode McSPI 09.02.00 Onwards AM263x, AM263Px Update XBAR config in 3 Pin mode.
MCUSDK-13275 UART Clock selection missing options in SysCfg UART 09.02.00 Onwards AM263x, AM263Px Updated SysCfg module to add UART clock selection.
MCUSDK-12651 Data flush missing DMA mode UART 09.02.00 Onwards AM263x, AM263Px Added Data flush in UART DMA TX ISR.
MCUSDK-9459 UART DMA transfer fail for Trigger level > 1 UART 09.02.00 Onwards AM263x, AM263Px Added trigger level selection support in SysCfg.
MCUSDK-13437 JTAG Flasher does not enable DAC Mode after flashing image SBL 09.02.00 Onwards AM263Px Enabled DAC Mode after flashing.
MCUSDK-13105 TI Uniflash Tool not working for am263px-lp Uniflash 09.02.00 Onwards AM263Px Added Uniflash support.

Known Issues

ID Head Line Module Reported in release Workaround
MCUSDK-13641, CODEGEN-12832 Increased build time for examples using Link Time Optimization (-flto) with TI-ARM-CLANG 4.0.0 LTS Build 10.00.00 onwards -
MCUSDK-12262 AM263Px: EPWM deadband example failure EPWM 09.02.00 remove sync between the epwms and use the global tbclksync to synchronize the EPWMs
MCUSDK-11507 ENET: CPSW MAC port is stuck forever and dropping all the Rx/Tx packets with reception of corrupts preamble CPSW 09.00.01 None
MCUSDK-12312 ROM bootloader fails when booting from Macronix Flash on AM263Px-LP SBL 09.01.00 Use UART/CCS Boot
MCUSDK-12313 OSPI Phy Tuning not working on Macronix Flash on AM263Px-LP SBL 09.01.00 Use UART/CCS Boot
MCUSDK-12289 32 KB TCM is used in examples sysconfig MPU module, size should be 64 KB Common 09.01.00 Use 64KB TCM in user application
MCUSDK-12265 SDFM example failure on am263px-lp SDFM 09.01.00 None
MCUSDK-11675 INDAC write only works if MPU for flash is only configured as Strongly-ordered OSPI 09.01.00 None
MCUSDK-13111 Memory Configurator/syscfg auto-linker generator doesn't support reordering Build 09.01.00 onwards -
MCUSDK-13109 RTI Interrupt req is pulse type and not level type RTI 09.01.00 onwards -
MCUSDK-13014 The memory read feature of uniflash erases the memory Flash 09.01.00 onwards -
MCUSDK-13011 Multicore Empty project not working properly FreeRTOS 09.01.00 onwards -
MCUSDK-12986 FreeRTOS: Barrier instructions missing in Interrupt Disable/Enable API's FreeRTOS 09.01.00 onwards -
PINDSW-7715 Dual EMAC instance not working with both ports together for icss_emac_lwip example ICSS-EMAC 09.02.00 onwards None
PINDSW-7746 Low iperf values in TCP and UDP ICSS-EMAC 09.02.00 onwards None
PINDSW-8118 Enabling DHCP mode in icss_emac_lwip example causes assert ICSS-EMAC 09.02.00 onwards None
MCUSDK-12756 MbedTLS - Timing side channel attack in RSA private operation exposing plaintext. Mbed-TLS 08.06.00 onwards None
PROC_SDL-7615 ECC example fails for SEC and DED for TPTC memories. SDL 09.02.00 onwards None
PROC_SDL-8392 In ECC bus safety example, ECC error is not properly cleared at the source. SDL 09.00.00 onwards None
PROC_SDL-8393 In ECC bus safety, error injection test writes to address 0x0. SDL 09.00.00 onwards None
MCUSDK-13473 UART Uniflash script fails with images > 1MB SBL 09.02.00 onwards Use JTAG based flashing
MCUSDK-13013 OSPI missing ECC_FAIL signal OSPI 09.02.00 onwards Configure pinmux for ECC_FAIL in application
MCUSDK-13517 FOTA firmware authentication does not happen on-the-fly FOTA 09.02.00 onwards -
MCUSDK-13660 Watchdog interrupt example not working Watchdog 09.02.00 onwards -
MCUSDK-12140 Flash Driver does not handle repeated id in read id Flash 09.02.00 onwards -
MCUSDK-12703 Multicore XIP Fails OptiFlash 09.02.00 onwards -
MCUSDK-13494 RL2 syscfg allows arbitrary flash size ranges SBL 09.02.00 onwards Access only permitted space from application
MCUSDK-13495 Applications with XIP sections more than 1MB fails to boot Flash, SBL 09.02.00 onwards -
MCUSDK-13375 "FOTA STIG Read" fails when pipeline is enabled OptiFlash 09.02.00 onwards Disable pipeline during XIP
MCUSDK-13630 Cache should not be enabled at L2 Bank boundaries Cache 09.02.00 onwards Create MPU configurations for end of each L2 Bank with Non Cached attribute
MCUSDK-13652 Readelf throws warning while parsing RS note SBL, QSPI 10.00.00 onwards -
MCUSDK-13182 SysCfg unexpectedly changes OSPI Pin OSPI 10.00.00 onwards Reconfigure OSPI Pins to original state after updating OSPI configurables.
MCUSDK-13727 OSPI Phy Tuning not working on AM263P LP Board with ISSI Flash OSPI 09.02.00 onwards Disable Phy tuning in application.

Errata

ID Head Line Module SDK Status
i2189 OSPI: Controller PHY Tuning Algorithm OSPI Open
i2311 USART: Spurious DMA Interrupts UART Implemented
i2324 No synchronizer present between GCM and GCD status signals Common Implemented
i2345 CPSW: Ethernet Packet corruption occurs if CPDMA fetches a packet which spans across memory banks CPSW Implemented
i2350 McSPI data transfer using EDMA in 'ABSYNC' mode stops after 32 bits transfer McSPI Open
i2351 OSPI: Controller does not support Continuous Read mode with NAND Flash OSPI Open
i2354 SDFM: Two Back-to-Back Writes to SDCPARMx Register Bit Fields CEVT1SEL, CEVT2SEL, and HZEN Within Three SD-Modulator Clock Cycles can Corrupt SDFM State Machine, Resulting in Spurious Comparator Events SDFM Open
i2356 ADC: Interrupts may Stop if INTxCONT (Continue-to-Interrupt Mode) is not Set ADC Implemented
i2383 OSPI: 2-byte address is not supported in PHY DDR mode OSPI Open
i2401 CPSW: Host Timestamps Cause CPSW Port to Lock up CPSW Open
i2404 Race condition in mailbox registers resulting in events miss IPC, Mailbox Implemented
i2405 CONTROLSS: Race condition OUTPUT_XBAR and PWM_XBAR resulting in event miss Crossbar Open

Limitations

ID Head Line Module Reported in release Workaround
MCUSDK-13630 Cache should not be enabled at L2 Bank boundaries Cache 09.02.00 onwards Create MPU configurations for end of each L2 Bank with Non Cached attribute
MCUSDK-13630 Cache should not be enabled at L2 Bank boundaries Cache 09.02.00 onwards Create MPU configurations for end of each L2 Bank with Non Cached attribute
MCUSDK-13220 Multi Core Elf format has few limitations documented at Understanding Multicore ELF image format Infra 10.00.00 onwards -

Upgrade and Compatibility Information

Compiler Options

Module Affected API Change Additional Remarks

SOC Device Drivers

Module Affected API Change Additional Remarks
Sysconfig EPWM TBCLKSYNC and Halt configurations moved to ti_drivers_open_close.c The TBCLKSYNC should be not enabled until the init configurations are done. The individual control to enable the tbclksyn in the init or not is added. Refer to SOC_setMultipleEpwmTbClk for usage in the applications.
Sysconfig SDFM Added Pinmux configurations for clock loopback
Default is set as disabled, to maintain backward compatibility
Sysconfig CMPSS Added LoopBack configurations for DAC
Default is set as disabled, to maintain backward compatibility
Sysconfig ADC Added Internal Refernece enable controls, Loop back controls Default is set as enabled, to maintain backward compatibility
ADC SOC_enableAdcInternalReference, SOC_enableAdcReferenceMonitor, SOC_getAdcReferenceStatus Added Internal Refernece enable controls in drivers Reference monitoring status should be checked before powering up the ADC analog converter.
EPWM EPWM_setActionQualifierShadowLoadMode updated parenthesis for API operations -
EPWM HRPWM_setHiResCounterCompareValue Updated the Assert check. Fixed Overwriting to the CMPx register. -
Security HSM Client, Secure IPC Notify, Crypto driver These drivers are moved to "source/security/security_common" Update the include paths and included libraries for application build.

Networking

Module Affected API Change Additional Remarks
- - - -