Introduction

This document gives a basic introduction to configuring different IPs, which is part of OptiFlash.

How to configure RL2?

RL2 is, basically, an L2 cache controller. Highlighting the controller keyword here, because, unlike the L1 cache controller, which has internal cache memory, RL2 does not have internal cache memory. RL2 needs to be configured, and a part of On-chip SRAM needs to be assigned for RL2 cache memory.

There are three configurations that are largely needed:

1. Size of the L2 cache
2. Range of memory to cache
3. SRAM memory region to be used as L2 cache memory This SRAM memory region is an L2 remote region.

These configurations can be done from syscfg as follows:

By selecting Layer2 Cache from the OptiFlash drop-down, the above configurations come:

1. Make sure the above module is enabled. This helps in enabling and disabling Layer 2 caches without losing configurations.
2. External Flash cached region start address and External Flash cached region end address define the range of addresses that need to be cached in L2 Cache.
3. Size of cache is the size of L2 cache that is required to be configured.
4. After this, select the memory region where the L2 cache bank should be located. This should be L2 memory (In case of am263px, L2 memory is OCRAM)

How to configure FLC.

FLC is a simplified DMA. To configure FLC, in syscfg, it can be done by clicking to the Fast Local Copy nav menu item under OptiFlash drop down menu at the bottom.

Use Add button to to add FLC instances. For Am263px case, there are a total of 4 FLC instances per R5 core. All info that needs to be given is source address, destination address and size. Make sure that all these fields are 4K aligned.

How to configure RAT.

Region base address translation or RAT can be configured using the following fields.

Region Size: Size of RAT region.

Region Base Address (hex): Size aligned base address

Region Translated Address (hex): Size aligned translated address