AM243x MCU+ SDK  09.01.00
dcc/v0/sdl_dcc.h
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39 #ifndef SDL_DCC_H_
40 #define SDL_DCC_H_
41 
42 /* ========================================================================== */
43 /* Include Files */
44 /* ========================================================================== */
45 
46 #include <sdl/include/sdl_types.h>
47 #include <sdl/include/hw_types.h>
48 
49 #include <sdl/dcc/v0/sdlr_dcc2.h>
50 #include <sdl/dcc/v0/soc/sdl_dcc_soc.h>
51 
52 #ifdef __cplusplus
53 extern "C" {
54 #endif
55 
56 /* ========================================================================== */
57 /* Macros & Typedefs */
58 /* ========================================================================== */
59 
63 #define DCC_SRC0_COUNT_MAX (0xFFFFFU)
64 
68 #define DCC_SRC0_VALID_MAX (0x0FFFFU)
69 
73 #define DCC_SRC1_COUNT_MAX (0xFFFFFU)
74 
75 #define DCC_MIN_CLK0_VLD_SEED (4u)
76 
80 #define SDL_DCC_CLK0_SRC_NUM (3u)
81 
85 #define SDL_DCC_CLK1_SRC_NUM (10u)
86 
90 #define SDL_DCC_MODES_NUM (3u)
91 
102 typedef uint32_t SDL_DCC_Mode;
103 
104 #define SDL_DCC_MODE_SINGLE_SHOT_1 (SDL_DCC2_DCCGCTRL_SINGLESHOT_MODE1)
105 
106 #define SDL_DCC_MODE_SINGLE_SHOT_2 (SDL_DCC2_DCCGCTRL_SINGLESHOT_MODE2)
107 
108 #define SDL_DCC_MODE_CONTINUOUS (SDL_DCC2_DCCGCTRL_SINGLESHOT_DISABLE)
109 
120 typedef uint32_t SDL_DCC_ClkSrc0;
121 
122 #define SDL_DCC_CLK0_SRC_CLOCK0_0 (SDL_DCC2_DCCCLKSRC0_CLKSRC0_0)
123 
124 #define SDL_DCC_CLK0_SRC_CLOCK0_1 (SDL_DCC2_DCCCLKSRC0_CLKSRC0_1)
125 
126 #define SDL_DCC_CLK0_SRC_CLOCK0_2 (SDL_DCC2_DCCCLKSRC0_CLKSRC0_2)
127 
138 typedef uint32_t SDL_DCC_ClkSrc1;
139 #define SDL_DCC_CLK1_SRC_CLOCK1 (SDL_DCC2_DCCCLKSRC1_CLKSRC_0)
140 
141 #define SDL_DCC_CLK1_SRC_CLOCKSRC0 (SDL_DCC2_DCCCLKSRC1_CLKSRC_1)
142 
143 #define SDL_DCC_CLK1_SRC_CLOCKSRC1 (SDL_DCC2_DCCCLKSRC1_CLKSRC_2)
144 
145 #define SDL_DCC_CLK1_SRC_CLOCKSRC2 (SDL_DCC2_DCCCLKSRC1_CLKSRC_3)
146 
147 #define SDL_DCC_CLK1_SRC_CLOCKSRC3 (SDL_DCC2_DCCCLKSRC1_CLKSRC_4)
148 
149 #define SDL_DCC_CLK1_SRC_CLOCKSRC4 (SDL_DCC2_DCCCLKSRC1_CLKSRC_5)
150 
151 #define SDL_DCC_CLK1_SRC_CLOCKSRC5 (SDL_DCC2_DCCCLKSRC1_CLKSRC_6)
152 
153 #define SDL_DCC_CLK1_SRC_CLOCKSRC6 (SDL_DCC2_DCCCLKSRC1_CLKSRC_7)
154 
155 #define SDL_DCC_CLK1_SRC_CLOCKSRC7 (SDL_DCC2_DCCCLKSRC1_CLKSRC_8)
156 
157 #define SDL_DCC_CLK1_SRC_FICLK (SDL_DCC2_DCCCLKSRC1_CLKSRC_OTHER)
158 
169 typedef uint32_t SDL_DCC_IntrType;
170 
171 #define SDL_DCC_INTERRUPT_ERR (0x0U)
172 
173 #define SDL_DCC_INTERRUPT_DONE (0x1U)
174 
177 /* ========================================================================== */
178 /* Structures */
179 /* ========================================================================== */
180 
184 typedef struct {
197  uint32_t clk0Seed;
199  uint32_t clk0ValidSeed;
201  uint32_t clk1Seed;
204 
205 
209 typedef struct {
210  bool doneIntr;
211  /* Indicates if a done interrupt is currently pending */
212  bool errIntr;
213  /* Indicates if an error interrupt is currently pending */
215  /* DCC config structure */
216  uint32_t clk0Cnt;
217  /* Current COUNT0 value of clock source 0 */
218  uint32_t clk0Valid;
219  /* Current VALID0 value */
220  uint32_t clk1Cnt;
221  /* Current COUNT1 value of clock source 1 */
223 
224 
228 typedef struct {
229  uint32_t DCC_REV;
230  /* DCC revision register */
231  uint32_t DCC_CNTSEED0;
232  /* COUNT0 SEED register */
233  uint32_t DCC_VALIDSEED0;
234  /* VALID0 SEED register */
235  uint32_t DCC_CNTSEED1;
236  /* COUNT1 SEED register */
237  uint32_t DCC_CLKSRC1;
238  /* CLOCK SOURCE1 register */
239  uint32_t DCC_CLKSRC0;
240  /* CLOCK SOURCE0 register */
242 
243 /* ========================================================================== */
244 /* Global Variables */
245 /* ========================================================================== */
246 
247 /* None */
248 
249 /* ========================================================================== */
250 /* Function Declarations */
251 /* ========================================================================== */
252 
263 int32_t SDL_DCC_configure(SDL_DCC_Inst instance, const SDL_DCC_Config *pConfig);
264 
272 int32_t SDL_DCC_verifyConfig(SDL_DCC_Inst instance, const SDL_DCC_Config *pConfig);
273 
279 int32_t SDL_DCC_enable(SDL_DCC_Inst instance);
280 
286 int32_t SDL_DCC_disable(SDL_DCC_Inst instance);
287 
295 int32_t SDL_DCC_getStatus(SDL_DCC_Inst instance, SDL_DCC_Status *pStatus);
296 
305 
314 
323 
331 int32_t SDL_DCC_getStaticRegs(SDL_DCC_Inst instance, SDL_DCC_StaticRegs *pStaticRegs);
332 
333 
336 #ifdef __cplusplus
337 }
338 
339 #endif /*extern "C" */
340 
341 #endif
SDL_DCC_verifyConfig
int32_t SDL_DCC_verifyConfig(SDL_DCC_Inst instance, const SDL_DCC_Config *pConfig)
This API is used to verify the configuration for DCC module.
SDL_DCC_StaticRegs::DCC_CLKSRC1
uint32_t DCC_CLKSRC1
Definition: dcc/v0/sdl_dcc.h:237
SDL_DCC_configure
int32_t SDL_DCC_configure(SDL_DCC_Inst instance, const SDL_DCC_Config *pConfig)
This API is used to configure DCC module.
SDL_DCC_Status::clk0Valid
uint32_t clk0Valid
Definition: dcc/v0/sdl_dcc.h:218
SDL_DCC_Config::clk0Seed
uint32_t clk0Seed
Definition: dcc/v0/sdl_dcc.h:197
SDL_DCC_enableIntr
int32_t SDL_DCC_enableIntr(SDL_DCC_Inst instance, SDL_DCC_IntrType intr)
This API is used to Enable the interrupts.
SDL_DCC_disableIntr
int32_t SDL_DCC_disableIntr(SDL_DCC_Inst instance, SDL_DCC_IntrType intr)
This API is used to Disable the interrupts.
SDL_DCC_enable
int32_t SDL_DCC_enable(SDL_DCC_Inst instance)
This API is used to enable the DCC module.
SDL_DCC_Mode
uint32_t SDL_DCC_Mode
Enum to select the DCC Operation Mode. DCC can either operate in single shot or continuous mode.
Definition: dcc/v0/sdl_dcc.h:102
SDL_DCC_IntrType
uint32_t SDL_DCC_IntrType
Enum for DCC interrupts.
Definition: dcc/v0/sdl_dcc.h:169
SDL_DCC_StaticRegs
Structure containing DCC Static Registers.
Definition: dcc/v0/sdl_dcc.h:228
SDL_DCC_disable
int32_t SDL_DCC_disable(SDL_DCC_Inst instance)
This API is used to disable the DCC module.
SDL_DCC_Status::clk1Cnt
uint32_t clk1Cnt
Definition: dcc/v0/sdl_dcc.h:220
SDL_DCC_Status::errIntr
bool errIntr
Definition: dcc/v0/sdl_dcc.h:212
SDL_DCC_Status::doneIntr
bool doneIntr
Definition: dcc/v0/sdl_dcc.h:210
SDL_DCC_Status::config
SDL_DCC_Config config
Definition: dcc/v0/sdl_dcc.h:214
SDL_DCC_Config::clk1Seed
uint32_t clk1Seed
Definition: dcc/v0/sdl_dcc.h:201
SDL_DCC_StaticRegs::DCC_CNTSEED1
uint32_t DCC_CNTSEED1
Definition: dcc/v0/sdl_dcc.h:235
SDL_DCC_clearIntr
int32_t SDL_DCC_clearIntr(SDL_DCC_Inst instance, SDL_DCC_IntrType intr)
This API is used to clear the interrupts.
SDL_DCC_Inst
SDL_DCC_Inst
Enum for different DCC module instances supported.
Definition: sdl_soc_dcc.h:67
SDL_DCC_StaticRegs::DCC_VALIDSEED0
uint32_t DCC_VALIDSEED0
Definition: dcc/v0/sdl_dcc.h:233
SDL_DCC_Config
Structure containing parameters for DCC module configuration.
Definition: dcc/v0/sdl_dcc.h:184
SDL_DCC_Status::clk0Cnt
uint32_t clk0Cnt
Definition: dcc/v0/sdl_dcc.h:216
SDL_DCC_getStatus
int32_t SDL_DCC_getStatus(SDL_DCC_Inst instance, SDL_DCC_Status *pStatus)
This API is used to get the stauts of DCC module.
SDL_DCC_Config::clk1Src
SDL_DCC_ClkSrc1 clk1Src
Definition: dcc/v0/sdl_dcc.h:193
SDL_DCC_StaticRegs::DCC_CNTSEED0
uint32_t DCC_CNTSEED0
Definition: dcc/v0/sdl_dcc.h:231
SDL_DCC_StaticRegs::DCC_REV
uint32_t DCC_REV
Definition: dcc/v0/sdl_dcc.h:229
SDL_DCC_Config::mode
SDL_DCC_Mode mode
Definition: dcc/v0/sdl_dcc.h:185
SDL_DCC_getStaticRegs
int32_t SDL_DCC_getStaticRegs(SDL_DCC_Inst instance, SDL_DCC_StaticRegs *pStaticRegs)
This API is used to get the value of static registers for DCC module.
SDL_DCC_ClkSrc0
uint32_t SDL_DCC_ClkSrc0
Enum to select the COUNT0 clock source.
Definition: dcc/v0/sdl_dcc.h:120
SDL_DCC_Config::clk0ValidSeed
uint32_t clk0ValidSeed
Definition: dcc/v0/sdl_dcc.h:199
SDL_DCC_ClkSrc1
uint32_t SDL_DCC_ClkSrc1
Enum to select the COUNT1 clock source.
Definition: dcc/v0/sdl_dcc.h:138
SDL_DCC_StaticRegs::DCC_CLKSRC0
uint32_t DCC_CLKSRC0
Definition: dcc/v0/sdl_dcc.h:239
SDL_DCC_Config::clk0Src
SDL_DCC_ClkSrc0 clk0Src
Definition: dcc/v0/sdl_dcc.h:189
SDL_DCC_Status
Structure containing DCC status.
Definition: dcc/v0/sdl_dcc.h:209