AM243x MCU+ SDK  08.03.00
icss_dlr.h
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32 
33 #ifndef ICSS_DLR_H_
34 #define ICSS_DLR_H_
35 
36 #ifdef __cplusplus
37 extern "C"
38 {
39 #endif
40 
41 
42 /* ========================================================================== */
43 /* Include Files */
44 /* ========================================================================== */
45 #include <stdint.h>
47 #include <kernel/dpl/ClockP.h>
48 #include <kernel/dpl/HwiP.h>
49 
50 #ifdef TEST_DEBUG
51 #include "testing.h"
52 #endif
53 
54 /* ========================================================================== */
55 /* Macros & Typedefs */
56 /* ========================================================================== */
57 /*#define DLR_DEBUG*/
58 
60 /*#define IS_A_DLR_SUPERVISOR*/
61 
62 #define DEFAULT_DLR_PACKET_SIZE 60
63 
64 #define ETHERNET_FRAME_SIZE_60 60
65 
67 #define IEP_WD_PRE_DIV_10US 2000
68 
70 #define PORT0_WATCH_DOG_ID 0 /*PD_WD*/
71 
72 #define PORT1_WATCH_DOG_ID 1 /*PDI_WD*/
73 
74 #define IS_A_LINK_STATUS_FRAME DLR_TRUE
75 #define IS_A_NEIGHBOR_STAT_FRAME DLR_FALSE
76 
77 /*Generic flags*/
78 #define BOTH_LINKS_UP 0x0
79 #define PORT0_IS_DOWN 0x2
80 #define PORT1_IS_DOWN 0x1
81 #define BOTH_LINKS_DOWN 0x3
82 
83 /*PRUSS INTC Mask for PRU EVENT 5*/
84 #define PORT0_WD_ISR_MASK 0x2000000
85 /*PRUSS INTC Mask for PRU EVENT 5*/
86 #define PORT1_WD_ISR_MASK 0x4000000
87 
92 #define PDI_WD_TRIGGER_RX_SOF (0 << 4)
93 
98 #define PDI_WD_TRIGGER_LATCH_IN (1 << 4)
99 
104 #define PDI_WD_TRIGGER_SYNC0_OUT (2 << 4)
105 
110 #define PDI_WD_TRIGGER_SYNC1_OUT (3 << 4)
111 
112 #ifdef DLR_DEBUG
113 #define MAX_EVENTS_CAPTURED 1000
114 
115 /*DLR events for debugging*/
116 #define LINK1_BREAK 1
117 #define LINK2_BREAK 2
118 #define BOTH_LINK_DISABLED 3
119 #define EMPTY_SIGNON_FRAME_RCVD 4
120 #define COMPLETE_SIGNON_FRAME_RCVD 5
121 
122 #define RING_FAULT_RCVD_PORT0 6
123 #define RING_FAULT_RCVD_PORT1 7
124 
125 #define RING_FAULT_TRANSITION_PORT0 8
126 #define RING_FAULT_TRANSITION_PORT1 9
127 
128 #define RING_NORMAL_TRANSITION_PORT0 10
129 #define RING_NORMAL_TRANSITION_PORT1 11
130 
131 #define START_TIMER0 12
132 #define START_TIMER1 13
133 
134 #define NCRES_RCVD_PORT0 14
135 #define NCRES_RCVD_PORT1 15
136 
137 #define NCREQ_RCVD_PORT0 16
138 #define NCREQ_RCVD_PORT1 17
139 
140 #define LOCFAULT_RCVD_PORT0 18
141 #define LOCFAULT_RCVD_PORT1 19
142 
143 #define BEACON0_MISSED_FAULT 20
144 #define BEACON1_MISSED_FAULT 21
145 #define BEACON0_MISSED_NORMAL 22
146 #define BEACON1_MISSED_NORMAL 23
147 
148 #define LINK1_FAULT_BREAK 24
149 #define LINK2_FAULT_BREAK 25
150 
151 #define LINK1_NORMAL_BREAK 27
152 #define LINK2_NORMAL_BREAK 28
153 
154 #define NEIGHBOR_TIMEOUT_PORT0_RETRY 29
155 #define NEIGHBOR_TIMEOUT_PORT1_RETRY 30
156 #define NEIGHBOR_TIMEOUT_PORT0_MAX 31
157 #define NEIGHBOR_TIMEOUT_PORT1_MAX 32
158 
159 #define DLR_RESET_MACHINE 33
160 
161 #define BEACON0_MISSED 34
162 #define BEACON1_MISSED 35
163 
164 #define STOP_BOTH_TIMERS_PORT0 36
165 #define STOP_BOTH_TIMERS_PORT1 37
166 
167 #define PORT0_BEACON_STALL 38
168 #define PORT1_BEACON_STALL 39
169 #endif
170 
172 #define DEFAULT_BEACON_INTERVAL_VARIABLE 400 /*in microseconds*/
173 #define DEFAULT_BEACON_TIMEOUT_VARIABLE (DEFAULT_BEACON_INTERVAL_VARIABLE * 4) /*in microseconds*/
174 
175 #define DEFAULT_NEIGHBOR_TIMEOUT_INTERVAL 100 /*in milliseconds*/
176 
177 #define DEFAULT_DLR_PERIODIC_INTERVAL 100 /*in milliseconds*/
178 
180 #define MAX_NUM_RETRIES 2
181 
183 #define BEACON_CPU_STALL_THRESHOLD 4
184 
188 #define DLR_DEFAULT_CAPABILITIES (1 << 7) | (1 << 1)
189 
190 /*DLR Packet Generation Offsets*/
191 #define DLR_SIGNON_FRAME_SIZE ICSS_EMAC_MAXMTU
192 
193 #define DLR_COMMON_FRAME_HEADER_SIZE 18
194 #define DLR_COMMON_FRAME_OFFSET 12
195 
197 #define ICSS_DLR_PORT0_INT_FLAG 0x200000
198 
199 #define ICSS_DLR_PORT1_INT_FLAG 0x400000
200 
202 #define DLR_DMTIMER4_ID 3
203 
204 #define DLR_DMTIMER5_ID 4
205 
206 typedef struct dlr_Config_s *EIP_DLRHandle;
207 
211 typedef enum
212 {
218  NODE_NORMAL = 2
223 typedef enum
224 {
228  RING_FAULT = 2
230 
234 typedef enum
235 {
239  RING_TOP = 1
241 
245 typedef enum
246 {
256  RAPID_FAULT = 4
258 
262 typedef enum
263 {
264  /*indicates the node is functioning as a backup*/
266  /*indicates the device is functioning as the active ring supervisor*/
268  /*indicates the device is functioning as a normal ring node*/
270  /*indicates the device is operating in a non-DLR topology*/
271  NON_DLR = 3,
275 
277 
278 /* ========================================================================== */
279 /* Structure Declarations */
280 /* ========================================================================== */
281 
285 typedef struct
286 {
288  uint8_t MAC[6];
290  uint8_t numExceptions;
291 
292 } exceptionList;
293 
297 typedef struct
298 {
300  uint8_t node_state;
302  uint8_t ring_state;
304  uint8_t topology;
306  uint8_t status;
308  uint8_t superStatus;
309 
311 
315 typedef struct
316 {
317 
321  uint8_t superEnable;
323  uint32_t beaconInterval;
325  uint32_t beaconTimeout;
326 
328  uint16_t vLanId;
329 
331  uint8_t supPrecedence;
332 
333 } superConfig;
334 
338 typedef struct
339 {
340 
342  uint8_t supMACAddress[6];
343 
345  uint32_t supIPAddress;
346 
348 
353 typedef struct
354 {
356  uint32_t ipAddr;
358  uint8_t macAddr[6];
359 
361  uint16_t deviceNum;
363 
367 typedef struct
368 {
369  uint32_t ipAddr;
370  uint8_t macAddr[6];
372 
376 typedef struct
377 {
384 
385 #ifdef IS_A_DLR_SUPERVISOR
386 
387  lastActiveNode activeNode[2];
388 #endif
389 
400  uint32_t dlrCapabilities;
401 
404 
409 
411  uint8_t port0IntNum;
412 
414  uint8_t port1IntNum;
415 
418 
421 
422 #ifdef IS_A_DLR_SUPERVISOR
423 
424  uint32_t numRingFaultsPowerUp;
425 
427  uint16_t ringParticipantsCount;
428 
430  protocolParticipants **ringNodes;
431 #endif
432 
433 } dlrStruct;
434 
435 
436 typedef struct dlr_Config_s
437 {
440  uint8_t macId[6];
441  /* MAC ID passed to ICSS-EMAC during ICSS-EMAC initialization*/
444  uint32_t deviceIP;
446  uint32_t sequenceID;
451  /*Clock handle for DLR periodic processing*/
454  uint8_t dlrEmptyFrame[DEFAULT_DLR_PACKET_SIZE];
456  uint8_t checkForLoop;
459  uint8_t pktSendCounter;
460  uint8_t ISRcountPort[ICSS_EMAC_MAX_PORTS_PER_INSTANCE];
461 } dlr_Config;
462 
463 /* ========================================================================== */
464 /* Function Declarations */
465 /* ========================================================================== */
466 
478 void EIP_DLR_init(EIP_DLRHandle dlrHandle);
493 void EIP_DLR_start(EIP_DLRHandle dlrHandle) ;
501 void EIP_DLR_stop(EIP_DLRHandle dlrHandle);
508 void EIP_DLR_port0ISR(uintptr_t arg);
515 void EIP_DLR_port1ISR(uintptr_t arg);
522 void EIP_DLR_beaconTimeoutISR_P0(uintptr_t arg);
523 
530 void EIP_DLR_beaconTimeoutISR_P1(uintptr_t arg);
531 
539 void EIP_DLR_port0ProcessLinkBrk(uint8_t linkStatus, void *arg2);
547 void EIP_DLR_port1ProcessLinkBrk(uint8_t linkStatus, void *arg2);
572 void EIP_DLR_addVlanID(uint8_t *src, uint16_t vlanID);
587 void EIP_DLR_genNCReqFrame(EIP_DLRHandle dlrHandle, uint8_t *src,
588  uint8_t sourcePort);
602 void EIP_DLR_genNCResFrame(uint8_t *src, uint8_t sourcePort, uint8_t reqSrcPort,
603  uint32_t sequenceId);
618 void EIP_DLR_genNeighborLinkStatFrame(EIP_DLRHandle dlrHandle, uint8_t *src,
619  uint8_t sourcePort,
620  uint8_t linkOrNeighbor, uint8_t linkStatus);
629 void EIP_DLR_initDLRFrameHeader(uint8_t *src, uint8_t *header);
630 
639 void EIP_DLR_addSignOnNumNodes(uint8_t *src, uint16_t numNodes);
649 void EIP_DLR_processDLRFrame(EIP_DLRHandle dlrHandle, uint8_t *pktBuffer,
650  uint8_t portNum, uint16_t size);
702 int32_t EIP_DLR_isrInit(EIP_DLRHandle dlrHandle);
713 void EIP_DLR_periodicProcessing(ClockP_Object *obj, void *userArg);
714 
715 #ifdef DLR_DEBUG
716 void genSeqOfEvents(uint8_t event);
717 #endif
718 
728 void EIP_DLR_addToExceptionList(EIP_DLRHandle dlrHandle, uint8_t *macId);
739 
750 uint8_t EIP_DLR_checkSupervisorException(uint8_t *macId,
751  EIP_DLRHandle dlrHandle);
760 void EIP_DLR_addModuleIPAddress(EIP_DLRHandle dlrHandle, uint32_t newIP);
761 
769 
777 void EIP_DLR_enable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id);
778 
786 void EIP_DLR_disable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id);
787 
797  uint16_t periodInMicroSec, uint8_t id);
806 
811 #ifdef __cplusplus
812 }
813 #endif
814 
815 #endif /* ICSS_DLR_H_ */
dlr_Config::dlrObj
dlrStruct * dlrObj
Definition: icss_dlr.h:438
superConfig::vLanId
uint16_t vLanId
Definition: icss_dlr.h:328
dlrStateMachineVar
State machine variables, part of DLR Object and L2 implementation.
Definition: icss_dlr.h:298
dlr_Config::dlrPeriodicTimerObject
ClockP_Object dlrPeriodicTimerObject
Definition: icss_dlr.h:452
dlrStruct::beaconTimeoutIntNum_P0
uint8_t beaconTimeoutIntNum_P0
Definition: icss_dlr.h:417
ICSS_EMAC_Handle
struct ICSS_EMAC_Config_s * ICSS_EMAC_Handle
Alias for ICSS EMAC Handle containing base addresses and modules.
Definition: icss_emac.h:368
size
uint16_t size
Definition: tisci_boardcfg.h:1
EIP_DLR_setTimeout_WD_IEP
void EIP_DLR_setTimeout_WD_IEP(EIP_DLRHandle dlrHandle, uint16_t periodInMicroSec, uint8_t id)
Set the timeout value in watchdog.
EIP_DLR_beaconTimeoutISR_P1
void EIP_DLR_beaconTimeoutISR_P1(uintptr_t arg)
ISR for beacon timeout for Port 1.
EIP_DLR_beaconTimeoutISR_P0
void EIP_DLR_beaconTimeoutISR_P0(uintptr_t arg)
ISR for beacon timeout for Port 0.
EIP_DLR_stop
void EIP_DLR_stop(EIP_DLRHandle dlrHandle)
API to stop the DLR driver Halt DLR. Calling this disables DLR on the device.
superConfig::supPrecedence
uint8_t supPrecedence
Definition: icss_dlr.h:331
nwStatus
nwStatus
network status : possible values for Attribute ID 2
Definition: icss_dlr.h:246
dlr_Config::tracePktIntervalCount
uint32_t tracePktIntervalCount
Definition: icss_dlr.h:457
EIP_DLR_enable_WD_IEP
void EIP_DLR_enable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id)
Enable the IEP Watch dog timers.
FEATURE_UNSUPPORTED
@ FEATURE_UNSUPPORTED
Definition: icss_dlr.h:274
dlrStruct::port0IntNum
uint8_t port0IntNum
Definition: icss_dlr.h:411
dlr_Config::pruicssHandle
PRUICSS_Handle pruicssHandle
Definition: icss_dlr.h:442
NODE_NORMAL
@ NODE_NORMAL
Definition: icss_dlr.h:218
activeSuperAddr::supIPAddress
uint32_t supIPAddress
Definition: icss_dlr.h:345
ClockP_Object
Opaque clock object used with the clock APIs.
Definition: ClockP.h:63
nodeState
nodeState
node state machine states
Definition: icss_dlr.h:212
dlr_Config::checkForLoop
uint8_t checkForLoop
Definition: icss_dlr.h:456
EIP_DLR_neighborTimeoutISR1
void EIP_DLR_neighborTimeoutISR1(ClockP_Object *obj, void *arg)
ISR for Neighbor timeout timer for port 1.
EIP_DLR_processDLRFrame
void EIP_DLR_processDLRFrame(EIP_DLRHandle dlrHandle, uint8_t *pktBuffer, uint8_t portNum, uint16_t size)
Processes a sign on and Neighbor check request frame.
BACKUP_NODE
@ BACKUP_NODE
Definition: icss_dlr.h:265
EIP_DLRHandle
struct dlr_Config_s * EIP_DLRHandle
Definition: icss_dlr.h:206
DEFAULT_DLR_PACKET_SIZE
#define DEFAULT_DLR_PACKET_SIZE
Definition: icss_dlr.h:62
NODE_IDLE
@ NODE_IDLE
Definition: icss_dlr.h:214
lastActiveNode::deviceNum
uint16_t deviceNum
Definition: icss_dlr.h:361
EIP_DLR_isrInit
int32_t EIP_DLR_isrInit(EIP_DLRHandle dlrHandle)
UNEXPECTED_LOOP
@ UNEXPECTED_LOOP
Definition: icss_dlr.h:252
icss_emac.h
dlr_Config::deviceIP
uint32_t deviceIP
Definition: icss_dlr.h:444
EIP_DLR_port1ProcessLinkBrk
void EIP_DLR_port1ProcessLinkBrk(uint8_t linkStatus, void *arg2)
Process DLR state machine in the event of a link break on Port1.
dlrStruct::port1IntObject
HwiP_Object port1IntObject
Definition: icss_dlr.h:406
NORMAL_STAT
@ NORMAL_STAT
Definition: icss_dlr.h:248
EIP_DLR_genNCReqFrame
void EIP_DLR_genNCReqFrame(EIP_DLRHandle dlrHandle, uint8_t *src, uint8_t sourcePort)
supervisorStatus
supervisorStatus
device role: possible values for Attribute ID 3
Definition: icss_dlr.h:263
dlrStruct::beaconTimeoutIntP0Object
HwiP_Object beaconTimeoutIntP0Object
Definition: icss_dlr.h:407
dlrStruct::addr
activeSuperAddr addr
Definition: icss_dlr.h:381
exceptionList::numExceptions
uint8_t numExceptions
Definition: icss_dlr.h:290
EIP_DLR_setDefaultValue
void EIP_DLR_setDefaultValue(EIP_DLRHandle dlrHandle)
dlr_Config::emacHandle
ICSS_EMAC_Handle emacHandle
Definition: icss_dlr.h:439
EIP_DLR_genNeighborLinkStatFrame
void EIP_DLR_genNeighborLinkStatFrame(EIP_DLRHandle dlrHandle, uint8_t *src, uint8_t sourcePort, uint8_t linkOrNeighbor, uint8_t linkStatus)
EIP_DLR_addToExceptionList
void EIP_DLR_addToExceptionList(EIP_DLRHandle dlrHandle, uint8_t *macId)
RING_NORMAL
@ RING_NORMAL
Definition: icss_dlr.h:226
dlrStruct::beaconTimeoutIntP1Object
HwiP_Object beaconTimeoutIntP1Object
Definition: icss_dlr.h:408
EIP_DLR_addSignOnNumNodes
void EIP_DLR_addSignOnNumNodes(uint8_t *src, uint16_t numNodes)
EIP_DLR_switchToNormal
void EIP_DLR_switchToNormal(EIP_DLRHandle dlrHandle)
dlrStruct::port1IntNum
uint8_t port1IntNum
Definition: icss_dlr.h:414
ClockP.h
RING_NODE
@ RING_NODE
Definition: icss_dlr.h:269
RING_TOP
@ RING_TOP
Definition: icss_dlr.h:239
EIP_DLR_neighborTimeoutISR0
void EIP_DLR_neighborTimeoutISR0(ClockP_Object *obj, void *arg)
ISR for Neighbor timeout timer for port 0.
dlr_Config::sequenceID
uint32_t sequenceID
Definition: icss_dlr.h:446
RING_FAULT_STAT
@ RING_FAULT_STAT
Definition: icss_dlr.h:250
dlrStruct::beaconTimeoutIntNum_P1
uint8_t beaconTimeoutIntNum_P1
Definition: icss_dlr.h:420
superConfig
Supervisor configuration. Attribute ID 4.
Definition: icss_dlr.h:316
dlrStruct::SMVariables
dlrStateMachineVar SMVariables
Definition: icss_dlr.h:383
EIP_DLR_resetStateMachine
void EIP_DLR_resetStateMachine(EIP_DLRHandle dlrHandle)
Initialize the state machine when it goes back to idle state.
dlrStruct::dlrCapabilities
uint32_t dlrCapabilities
Definition: icss_dlr.h:400
HwiP.h
EIP_DLR_setDivider_WD_IEP
void EIP_DLR_setDivider_WD_IEP(EIP_DLRHandle dlrHandle)
Sets the clock divider to 1us for IEP watch dog timers.
ringState
ringState
ring state values
Definition: icss_dlr.h:224
dlrStateMachineVar::superStatus
uint8_t superStatus
Definition: icss_dlr.h:308
EIP_DLR_start
void EIP_DLR_start(EIP_DLRHandle dlrHandle)
API to start the DLR driver Calling this enables DLR on the device.
protocolParticipants::ipAddr
uint32_t ipAddr
Definition: icss_dlr.h:369
dlrStruct::supConfig
superConfig supConfig
Definition: icss_dlr.h:379
EIP_DLR_disable_WD_IEP
void EIP_DLR_disable_WD_IEP(EIP_DLRHandle dlrHandle, uint8_t id)
Disable the IEP Watch dog timers.
NON_DLR
@ NON_DLR
Definition: icss_dlr.h:271
dlr_Config
Definition: icss_dlr.h:437
EIP_DLR_checkSupervisorException
uint8_t EIP_DLR_checkSupervisorException(uint8_t *macId, EIP_DLRHandle dlrHandle)
EIP_DLR_init
void EIP_DLR_init(EIP_DLRHandle dlrHandle)
API to initialize the DLR driver.
EIP_DLR_clearExceptionList
void EIP_DLR_clearExceptionList(EIP_DLRHandle dlrHandle)
dlrStateMachineVar::status
uint8_t status
Definition: icss_dlr.h:306
EIP_DLR_port1ISR
void EIP_DLR_port1ISR(uintptr_t arg)
Fast ISR for Port 1, bypasses the buffer copy and NDK.
EIP_DLR_switchToFault
void EIP_DLR_switchToFault(EIP_DLRHandle dlrHandle)
dlrStateMachineVar::topology
uint8_t topology
Definition: icss_dlr.h:304
mode
char mode[32]
Definition: tisci_pm_core.h:1
exceptionList
List of MAC ID's which are exempted from Learning, this is for DLR implementation.
Definition: icss_dlr.h:286
nwTopology
nwTopology
network topology : possible values for Attribute ID 1
Definition: icss_dlr.h:235
NODE_FAULT
@ NODE_FAULT
Definition: icss_dlr.h:216
dlrStruct::activeSuperPred
uint8_t activeSuperPred
Definition: icss_dlr.h:403
protocolParticipants
IP and MAC of the Ring devices. Attribute ID 9.
Definition: icss_dlr.h:368
dlrStruct::port0IntObject
HwiP_Object port0IntObject
Definition: icss_dlr.h:405
HwiP_Object
Opaque Hwi object used with the Hwi APIs.
Definition: HwiP.h:91
RAPID_FAULT
@ RAPID_FAULT
Definition: icss_dlr.h:256
superConfig::beaconTimeout
uint32_t beaconTimeout
Definition: icss_dlr.h:325
lastActiveNode
Last active node at the end of the chain Class for Attributes 6 and 7.
Definition: icss_dlr.h:354
EIP_DLR_initDLRFrameHeader
void EIP_DLR_initDLRFrameHeader(uint8_t *src, uint8_t *header)
lastActiveNode::ipAddr
uint32_t ipAddr
Definition: icss_dlr.h:356
dlr_Config::exclusionList
exceptionList * exclusionList
Definition: icss_dlr.h:448
dlr_Config::pktSendCounter
uint8_t pktSendCounter
Definition: icss_dlr.h:459
RING_FAULT
@ RING_FAULT
Definition: icss_dlr.h:228
EIP_DLR_addModuleIPAddress
void EIP_DLR_addModuleIPAddress(EIP_DLRHandle dlrHandle, uint32_t newIP)
dlrStateMachineVar::node_state
uint8_t node_state
Definition: icss_dlr.h:300
superConfig::beaconInterval
uint32_t beaconInterval
Definition: icss_dlr.h:323
ACTIVE_RING_SUPERVISOR
@ ACTIVE_RING_SUPERVISOR
Definition: icss_dlr.h:267
EIP_DLR_periodicProcessing
void EIP_DLR_periodicProcessing(ClockP_Object *obj, void *userArg)
superConfig::superEnable
uint8_t superEnable
Definition: icss_dlr.h:321
dlrStruct
DLR parent structure through which all other structures can be accessed.
Definition: icss_dlr.h:377
EIP_DLR_set_pdi_wd_trigger_mode
void EIP_DLR_set_pdi_wd_trigger_mode(EIP_DLRHandle dlrHandle, uint32_t mode)
Set the PDI WD trigger mode.
EIP_DLR_deinit
void EIP_DLR_deinit(EIP_DLRHandle dlrHandle)
API to de-initialize the DLR driver.
PRUICSS_Handle
struct PRUICSS_Config_s * PRUICSS_Handle
A handle that is returned from a PRUICSS_open() call. This handle is required for calling other APIs.
Definition: pruicss/g_v0/pruicss.h:234
activeSuperAddr
Supervisor address, part of DLR Object. Attribute ID 10.
Definition: icss_dlr.h:339
dlr_Config::stateMachineCount
uint32_t stateMachineCount
Definition: icss_dlr.h:458
dlrStateMachineVar::ring_state
uint8_t ring_state
Definition: icss_dlr.h:302
EIP_DLR_port0ISR
void EIP_DLR_port0ISR(uintptr_t arg)
Fast ISR for Port 0, bypasses the buffer copy and NDK.
PARTIAL_FAULT
@ PARTIAL_FAULT
Definition: icss_dlr.h:254
EIP_DLR_genNCResFrame
void EIP_DLR_genNCResFrame(uint8_t *src, uint8_t sourcePort, uint8_t reqSrcPort, uint32_t sequenceId)
EIP_DLR_port0ProcessLinkBrk
void EIP_DLR_port0ProcessLinkBrk(uint8_t linkStatus, void *arg2)
Process DLR state machine in the event of a link break on Port0.
EIP_DLR_dRAMInit
void EIP_DLR_dRAMInit(EIP_DLRHandle dlrHandle)
EIP_DLR_addVlanID
void EIP_DLR_addVlanID(uint8_t *src, uint16_t vlanID)
ICSS_EMAC_MAX_PORTS_PER_INSTANCE
#define ICSS_EMAC_MAX_PORTS_PER_INSTANCE
Maximum number of Ports in a single ICSS
Definition: icss_emac.h:66
LINEAR_TOP
@ LINEAR_TOP
Definition: icss_dlr.h:237