Feature | Module |
32 Task Priority Levels for FreeRTOS Tasks | DPL, FreeRTOS |
Upgrade to Beckhoff Slave Stack Code version 5.13 for EtherCAT examples | Industrial Communications Toolkit |
PCIe Buffer Transfer between EP and RC modes. Legacy interrupt support. MSI and MSIx capability | PCIe |
Firewall configuration to enable DMA for secure device | DMA |
Serial Interface implementation supporting ADS127L11 IC (1.067 MSPS) | PRU-IO |
Memory footprint optimization in Enet LLD, LWIP, ICSSG | ENET, ICSSG, LWIP |
Buffered IO boot media support | Bootloader |
C++ build support and example project added | Generic |
Added API to check if the interrupt router output is free | Sciclient |
ICSS based Ethernet, support for DSCP | ENET |
Enabled combined boot flow (ROM loads SYSFW) | Bootloader |
SBL Encryption support | Bootloader, Security |
Below features are not support on AM243X LAUNCHPAD due to SOC or board constraints,
OS | Supported CPUs | SysConfig Support | Key features tested | Key features not tested / NOT supported |
FreeRTOS Kernel | R5F, M4F, A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | Only single core A53 FreeRTOS is supported. Second core is NOT used. |
FreeRTOS SMP Kernel | A53 | NA | Task, Task notification, interrupts, semaphores, mutexes, timers, event groups. ROV views in CCS IDE, Task load measurement using FreeRTOS run time statistics APIs. | - |
FreeRTOS POSIX | R5F, M4F, A53 | NA | pthread, mqueue, semaphore, clock | - |
NO RTOS | R5F, M4F, A53 | NA | See Driver Porting Layer (DPL) below | Only single core A53 NORTOS is supported. Second core is NOT used. |
Module | Supported CPUs | SysConfig Support | OS support | Key features tested | Key features not tested / NOT supported |
Address Translate | M4F | YES | FreeRTOS, NORTOS | Use RAT to allow M4F access to peripheral address space | - |
Cache | R5F, A53 | YES | FreeRTOS, NORTOS | Cache write back, invalidate, enable/disable | - |
Clock | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Tick timer at user specified resolution, timeouts and delays | - |
CpuId | R5F | NA | FreeRTOS, NORTOS | Verify Core ID and Cluster ID that application is running | - |
CycleCounter | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Measure CPU cycles using CPU specific internal counters | - |
Debug | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Logging and assert to any combo of: UART, CCS, shared memory | - |
Heap | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Create arbitrary heaps in user defined memory segments | - |
Hwi | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Interrupt register, enable/disable/restore | - |
MPU | R5F, M4F | YES | FreeRTOS, NORTOS | Setup MPU and control access to address space | - |
MMU | A53 | YES | NORTOS | Setup MMU and control access to address space | - |
Semaphore | R5F, M4F, A53 | NA | FreeRTOS, NORTOS | Binary, Counting Semaphore, recursive mutexs with timeout | - |
Task | R5F, M4F, A53 | NA | FreeRTOS | Create, delete tasks | - |
Timer | R5F, M4F, A53 | YES | FreeRTOS, NORTOS | Configure arbitrary timers | - |
Event | R5F, M4F | YES | FreeRTOS | Setting, getting, clearing, and waiting of Event bits | - |
Peripheral | Supported CPUs | SysConfig Support | DMA Supported | Key features tested | Key features not tested / NOT supported |
ADC | R5F | YES | No | Single conversion (one-shot mode), interrupt mode, DMA mode | Continuous conversion not tested |
CRC | R5F | YES | No | CRC in full CPU mode | - |
DDR | R5F | YES | No | Tested LPDDR4 at 400MHz frequency. | - |
ECAP | R5F | YES | No | Frequency, Duty cycle, interrupt mode | PWM mode not tested |
EPWM | R5F | YES | No | Different Frequency, Duty cycle, interrupt mode, Deadband and chopper module | Tripzone module not tested |
EQEP | R5F | YES | No | Signal Frequency and Direction, interrupt mode | - |
FSI (RX/TX) | R5F | YES | No | RX, TX, polling, interrupt mode, single/dual lanes | - |
GPIO | R5F, M4F, A53 | YES | No | Basic input/output, GPIO as interrupt | GPIO as interrupt is not tested for A53. |
GTC | R5F, A53 | NA | No | Enable GTC, setting FID (Frequency indicator) | - |
I2C | R5F, M4F, A53 | YES | No | Master mode, basic read/write, polling and interrupt mode | Slave mode not supported. M4F not tested due to EVM limitation |
IPC Notify | R5F, M4F, A53 | YES | No | Low latency IPC between RTOS/NORTOS CPUs | - |
IPC Rpmsg | R5F, M4F, A53 | YES | No | RPMessage protocol based IPC for all R5F, M4F, A53 running NORTOS/FreeRTOS/Linux | - |
MCAN | R5F | YES | No | RX, TX, interrupt and polling mode | - |
MCSPI | R5F, M4F | YES | Yes | Master/Slave mode, basic read/write, polling, interrupt and DMA mode | - |
MDIO | R5F | NA | No | Register read/write, link status and link interrupt enable API | - |
MMCSD | R5F | YES | Yes | Raw read/write and file I/O on MMCSD0 eMMC, and MMCSD1 SD. eMMC tested till HS SDR mode (8-bit data, 52 MHz), SD tested till SD HS mode (4-bit, 25 MHz) | Interrupt mode not tested |
OSPI | R5F | YES | Yes | Read direct, Write indirect, Read/Write commands, DMA for read, PHY Mode | Interrupt mode not supported |
PCIe | R5F | YES | No | Buffer Transfer between EP and RC modes. Legacy interrupt | MSI and MSIx capability |
Pinmux | R5F, M4F, A53 | YES | No | Tested with multiple peripheral pinmuxes | - |
PRUICSS | R5F | YES | No | Tested with Ethercat, EtherNet/IP, IO-Link, ICSS-EMAC, HDSL, EnDat | - |
SOC | R5F, M4F, A53 | YES | No | lock/unlock MMRs, get CPU clock, CPU name, clock enable, set frequency, SW Warm/POR Reset, Address Translation | - |
Sciclient | R5F, M4F, A53 | YES | No | Tested with clock setup, module on/off | - |
SPINLOCK | R5F, M4F, A53 | NA | No | Lock, unlock HW spinlocks | - |
UART | R5F, M4F, A53 | YES | Yes | Basic read/write, polling, interrupt mode, | HW flow control not tested. DMA mode not supported |
UDMA | R5F, A53 | YES | Yes | Basic memory copy, SW trigger, Chaining | - |
WDT | R5F, A53 | YES | No | Interrupt after watchdog expiry | Reset not supported |
Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
EtherCAT Slave FWHAL | R5F | NO | FreeRTOS | Tested with ethercat_slave_beckhoff_ssc_demo example | Reset isolation |
EtherCAT Slave Evaluation Stack | R5F | NO | FreeRTOS | Tested with ethercat_slave_demo examples | - |
EtherNet/IP Adapter FWHAL | R5F | NO | FreeRTOS | Tested with ethernetip_adapter_demo examples | Multicast Filtering |
EtherNet/IP Adapter Evaluation Stack | R5F | NO | FreeRTOS | Tested with ethernetip_adapter_demo examples | - |
IO-Link Master Evaluation Stack | R5F | NO | FreeRTOS | Tested with iolink_master_demo example | - |
Profinet Device FWHAL | R5F | NO | FreeRTOS | Tested with profinet_device_demo examples | IRT, MRP |
Profinet Device Evaluation Stack | R5F | NO | FreeRTOS | Tested with profinet_device_demo examples | - |
Module | Supported CPUs | SysConfig Support | OS Support | Key features tested | Key features not tested |
LwIP | R5F | YES | FreeRTOS | TCP/UDP IP networking stack, DHCP, ping, TCP iperf, TCP/UDP IP | Other LwIP features, performance and memory optimizations pending, more robustness tests pending |
Ethernet driver (ENET) | R5F | YES | FreeRTOS | Ethernet as port using CPSW and ICSS, Layer 2 MAC, Layer 2 PTP Timestamping, CPSW Switch | - |
ICSS-EMAC | R5F | YES | FreeRTOS | Tested switch mode with ethernetip_adapter_demo and profinet_device_demo examples | EMAC mode, VLAN/Multicast Filtering |
ICSS TimeSync | R5F | NO | FreeRTOS | Tested E2E mode with ethernetip_adapter_demo examples | P2P mode, Transparent Clock mode |
ADS127L11 | R5F | YES | FREERTOS | Serial Interface with ADS127L11 IC | Empty | PRU | NO | Bare Metal | Empty project to get started with PRU firmware development |
ID | Head Line | Module | Applicable Releases | Applicable Devices | Resolution/Comments |
MCUSDK-3811 | Incorrect value for DLR Neighbor Check Interval in EtherNet/IP Adapter FWHAL | EtherNet/IP Adapter FWHAL | 7.3.0 onwards | AM64x, AM243x | Fixed |
MCUSDK-3644 | Removed GCC's objcopy in the boardcfg-gen makefile | Build | 8.1.0 onwards | AM64x, AM243x | Fixed |
MCUSDK-3558 | Secure Boot: DMA based applications fail on HS device | SBL SCIClient UDMA | 8.2.0 | AM64x, AM243x | Fixed |
MCUSDK-3424 | SBL OSPI fails to load image using OSPI DMA in HS device | SBL OSPI UDMA | 8.2.0 | AM64x, AM243x | Fixed |
MCUSDK-3513 | SBL JTAG Example flash write fails if file size is not aligned to multiple of flash page size | SBL | 8.2.0 | AM64x, AM243x | Fixed |
MCUSDK-3453 | Enet: UDMA unable to process icssg rx timestamp and some bytes of packet content after Allocated Packets | Enet | 8.1.0 onwards | AM64x, AM243x | Fixed |
MCUSDK-2753 | SOC_controlModuleLockMMR() doesn't lock CTRLMMR registers | Common | 8.1.0 onwards | AM243x | Fixed |
MCUSDK-3408 | sbl_uart_uniflash write incorrect data to flash due to XMODEM 1024 byte alignment | SBL | 8.2.0 | AM64x, AM243x | Fixed |
MCUSDK-3398 | [SOC]Address translation for R5FSS1 is missing | SOC | 7.3.0 onwards | AM64x, AM243x | Fixed |
MCUSDK-3712 | [FSI]Maximum value of external inputs for triggering frame transmission is limited to 32 | SOC | 7.3.0 onwards | AM64x, AM243x | Fixed |
MCUSDK-3879 | DPL : Inconsistent MPU config for shared memory | DPL | 7.3.0 onwards | AM64x, AM243x | Fixed |
MCUSDK-3453 | Enet ICSSG: UDMA unable to process RX timestamp and packet content while reusing PDs | Enet | 8.1.0 onwards | AM64x, AM243x | Fixed |
PINDSW-5325 | Frame length and frame data is corrupted in MAC mode | ENET | 8.2.0 | AM64x, AM243x | Fixed |
PINDSW-5315 | Zeroing of priority field for 802.1q ingress frames for icssg | ENET | 8.2.0 | AM64x, AM243x | Fixed |
PINDSW-5318 | Switching stalls when traffic is applied to DUT during bootup | ENET | 8.2.0 | AM64x, AM243x | Fixed |
PINDSW-5280 | Higher Cut-through latency and incorrect length(2000 byte) for a smaller packet size(~70 bytes) in 100M/10M link speeds | ENET | 8.2.0 | AM64x, AM243x | Fixed |
MCUSDK-3947 | [MCAN]MCAN message acceptance filter masking is incorrect | MCAN | 07_03_00 | Fixed |
MCUSDK-1922 | SBL UART appimage size limitation of less then 384 KB | SBL | 7.3.0 onwards | AM64x, AM243x | Use the buffered IO implementation of SBL UART |
MCUSDK-3325 | DDR_VTT_EN is not set by software | DDR | 8.1.0 onwards | AM64x, AM243x | - |
MCUSDK-3124 | AddrTranslateP_setRegion() clears bits in system address above LS 32-bits for R5F RAT | DPL | 8.2.0 | AM64x, AM243x | - |
MCUSDK-3408 | sbl_uart_uniflash writing incorrect data to flash | SBL | 8.2.0 | AM64x, AM243x | - |
MCUSDK-3424 | SBL OSPI fails to load image using OSPI DMA in HS device | OSPI, SBL, UDMA | 8.2.0 | AM64x, AM243x | - |
MCUSDK-3928 | MCU+ SDK board library incorrect condition for while loop | BOARD | 8.2.0 | AM243x | - |
MCUSDK-4046 | Enable I2C in sysconfig to build HDSL diagnostic application if using HDSL-AM64x-E1 Transceiver card | HDSL | 8.2.0 | AM64x | - |
ID | Head Line | Module | Applicable Releases | Applicable Devices | Workaround |
MCUSDK-626 | DMA not working with ADC FIFO 1 | ADC | 7.3.0 onwards | AM64x, AM243x | Use ADC FIFO 0 |
MCUSDK-1016 | Semaphore does not function as expected when "post" call is present in multiple ISRs at different priorities | DPL | 7.3.0 onwards | AM64x, AM243x | Interrupt nesting should be disabled. SDK disables interrupt nesting by default. |
MCUSDK-1900 | UART Hardware Flow Control is not working | UART | 7.3.0 onwards | AM243x | - |
MCUSDK-2113 | [Docs] Sysfw RM/PM documentation doesn't specify AM243x | Docs | 8.0.0 onwards | AM243x | - |
MCUSDK-2135 | Insufficient UDMA TX channels allocated for Dual-mac mode | Enet | 8.1.0 onwards | AM64x, AM243x | Allocate minimum of 2 TX channels(ENET_CFG_TX_CHANNELS_NUM macro) in enet_cfg.h file |
MCUSDK-2319 | 2 PRU(ICSS) driver instances are added while changing Enet ICSSG instance to ICSSG0 in SysConfig | SYSCFG | 8.1.0 onwards | AM64x, AM243x | Please remove the extra one manually |
MCUSDK-2409 | MCRC CRCSetPSASeedSig() API sets channel mode to DATA capture | CRC | 8.1.0 onwards | AM64x | |
MCUSDK-2419 | MCSPI TX Only mode is not functional in DMA mode | MCSPI, UDMA | 8.2.0 onwards | AM64x, AM243x | Use TX/RX mode and ignore RX. |
MCUSDK-2715 | PKA ECDSA sign verify is not working for P-521 and BrainPool P-512R1 curves | SECURITY | 8.2.0 onwards | AM64x, AM243x | - |
MCUSDK-3626 | Enet: Phy tuning is not done correctly on AM64x/AM243x and AM263x platforms | Enet | 8.1.0 onwards | AM64x, AM243x | PHY delay is not tuned but set to value based on limited testing on a small set of boards.If packet drops are still seen, we can force the phy to set to 100mbps.Make below change in application code: linkCfg->speed = ENET_SPEED_100MBIT; linkCfg->duplexity = ENET_DUPLEX_FULL; |
MCUSDK-4080 | DDR_init call after warm reset causes crash in System in OSPI mode | DDR | 8.2.0 | AM64x, AM243x | DDR_init should not be called in SBL if DDR is already initialized |
MCUSDK-4379 | Low Tx side throughput seen when tested using iperf application | DDR | 8.3.0 | AM64x, AM243x | - |
MCUSDK-4379 | Low Tx side throughput seen when tested using iperf application | INDUS_PROTOCOL_HSR_PRP | 8.3.0 | AM64x, AM243x |
Replace mcu_plus_sdk\source\networking\lwip\lwip-config\am243x\lwipopts.h and mcu_plus_sdk\source\networking\lwip\lwip-config\am243x\lwippools.h from MCU PLUS SDK 8.2.0 release and rebuild lwip_freertos, lwip-contrib and icss_emac_lwip_if libraries.
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This section lists changes which could affect user applications developed using older SDK versions. Read this carefully to see if you need to do any changes in your existing application when migrating to this SDK version relative to previous SDK version. Also refer to older SDK version release notes to see changes in earlier SDKs.