SPI master chip select (CSN)
This resource implements Serial Peripheral Interface (SPI) chip select pins (CSN) for the SPI Data Transfer resource. Multiple chip select pins can be used to access multiple SPI slaves, with shared clock and data lines for all slaves. The pins are mapped in the I/O Mapping Panel.
The CSN signal is active low.
The CSN pins can be configured individually as driven high (default) or pulled high while deasserted.
It is assumed that the SPI signals are not shared with another SPI master. The SCLK and MOSI lines are driven while CSN is deasserted to prevent these lines from floating. The MISO line can be configured as no pull, pull-up or pull-down. Note that the MISO input buffer is disabled while CSN is deasserted, and will not cause leakage if the pin is left floating in this state (with no pull).
For information on the SPI_POLx_PHAy constants, see the SPI Data Transfer resource documentation.
// Read the accelerometer spiCfg(SPI_POL0_PHA0, 6); spiBegin(AUXIO_SPI_CSN_ACCEL); spiTx8bit(0x42); spiRx16bit(output.x); spiRx16bit(output.y); spiRx16bit(output.z); spiEnd(AUXIO_SPI_CSN_ACCEL);
None.
None.
Prototype: spiBegin(#auxio)
Asserts the selected SPI chip select pin (active low). This procedure shall be called at the start of an SPI transfer.
Prototype: spiEnd(#auxio)
Deasserts the selected SPI chip select pin (active low). This procedure shall be called at the end of an SPI transfer.