tivx_soc_j721e.h

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#ifndef TIVX_SOC_J721E_H_
#define TIVX_SOC_J721E_H_

#ifndef SOC_J721E
#define SOC_J721E
#endif

#ifndef VPAC1
#define VPAC1
#endif

#ifndef VPAC_COUNT
#define VPAC_COUNT  (1U)
#endif

#ifndef C7X_COUNT
#define C7X_COUNT  (1U)
#endif

#ifndef C7XMMA_COUNT
#define C7XMMA_COUNT  (1U)
#endif

/* Name of this SoC */
#define SOC_NAME "j721e"

#ifdef __cplusplus
extern "C" {
#endif

#define TIVX_TARGET_MPU_0      "MPU-0"

#define TIVX_TARGET_MPU_1      "MPU-1"

#define TIVX_TARGET_MPU_2      "MPU-2"

#define TIVX_TARGET_MPU_3      "MPU-3"

#define TIVX_TARGET_DSP1        "DSP-1"

#define TIVX_TARGET_DSP2        "DSP-2"

#define TIVX_TARGET_DSP_C7_1    "DSP_C7-1"

#define TIVX_TARGET_DSP_C7_1_PRI_1    TIVX_TARGET_DSP_C7_1

#define TIVX_TARGET_DSP_C7_1_PRI_2    "DSP_C7-1_PRI_2"

#define TIVX_TARGET_DSP_C7_1_PRI_3    "DSP_C7-1_PRI_3"

#define TIVX_TARGET_DSP_C7_1_PRI_4    "DSP_C7-1_PRI_4"

#define TIVX_TARGET_DSP_C7_1_PRI_5    "DSP_C7-1_PRI_5"

#define TIVX_TARGET_DSP_C7_1_PRI_6    "DSP_C7-1_PRI_6"

#define TIVX_TARGET_DSP_C7_1_PRI_7    "DSP_C7-1_PRI_7"

#define TIVX_TARGET_DSP_C7_1_PRI_8    "DSP_C7-1_PRI_8"

#define TIVX_TARGET_MCU2_0      "MCU2-0"

#define TIVX_TARGET_MCU2_1      "MCU2-1"

#define TIVX_TARGET_MCU3_0      "MCU3-0"

#define TIVX_TARGET_MCU3_1      "MCU3-1"

#define TIVX_TARGET_CAPTURE1     "CAPTURE1"

#define TIVX_TARGET_CAPTURE2     "CAPTURE2"

#define TIVX_TARGET_CAPTURE3     "CAPTURE3"

#define TIVX_TARGET_CAPTURE4     "CAPTURE4"

#define TIVX_TARGET_CAPTURE5     "CAPTURE5"

#define TIVX_TARGET_CAPTURE6     "CAPTURE6"

#define TIVX_TARGET_CAPTURE7     "CAPTURE7"

#define TIVX_TARGET_CAPTURE8     "CAPTURE8"

#define TIVX_TARGET_CSITX     "CSITX"

#define TIVX_TARGET_DISPLAY_M2M1     "DSS_M2M1"

#define TIVX_TARGET_DISPLAY_M2M2     "DSS_M2M2"

#define TIVX_TARGET_DISPLAY_M2M3     "DSS_M2M3"

#define TIVX_TARGET_DISPLAY_M2M4     "DSS_M2M4"

#define TIVX_TARGET_DISPLAY1     "DISPLAY1"

#define TIVX_TARGET_DISPLAY2     "DISPLAY2"

#define TIVX_TARGET_DMPAC_DOF    "DMPAC_DOF"

#define TIVX_TARGET_DMPAC_SDE    "DMPAC_SDE"

#define TIVX_TARGET_VPAC_LDC1    "VPAC_LDC1"

#define TIVX_TARGET_VPAC_MSC1    "VPAC_MSC1"

#define TIVX_TARGET_VPAC_MSC2    "VPAC_MSC2"

#define TIVX_TARGET_VPAC_NF      "VPAC_NF"

#define TIVX_TARGET_VPAC_VISS1   "VPAC_VISS1"

#define TIVX_TARGET_VPAC_FC      "VPAC_FC"

typedef enum _tivx_cpu_id_e {

    TIVX_CPU_ID_DSP1 = 0,

    TIVX_CPU_ID_DSP2 = 1,

    TIVX_CPU_ID_DSP_C7_1 = 2,

    TIVX_CPU_ID_MCU2_0 = 3,

    TIVX_CPU_ID_VPAC1 = TIVX_CPU_ID_MCU2_0,

    TIVX_CPU_ID_VIDEO_IO = TIVX_CPU_ID_MCU2_0,

    TIVX_CPU_ID_MCU2_1 = 4,

    TIVX_CPU_ID_DMPAC = TIVX_CPU_ID_MCU2_1,

    TIVX_CPU_ID_MPU_0 = 5,

    TIVX_CPU_ID_MCU3_0 = 6,

    TIVX_CPU_ID_MCU3_1 = 7,

    TIVX_CPU_ID_MAX = 8,

    TIVX_CPU_ID_INVALID = 0xFF

} tivx_cpu_id_e;


#ifdef __cplusplus
}
#endif

#endif