Platform Development Kit (PDK)

Welcome

This package consists of the Texas Instruments Platform Development Kit for Jacinto family of SoC’s .

The Texas Instruments Platform Development Kit (PDK) is a single scalable software driver package that offers streamlined development on TI’s Processors. The PDK package contains device abstraction layer libraries and peripheral/board level sample/demo examples that demonstrate the capabilities of the peripherals for development, deployment and execution of applications.

Table of Contents

• 1. Overview
  • 1.1. Introduction
  • 1.2. Scope
  • 1.3. Technical Support
  • 1.4. TI Disclaimer
• 2. Release Notes
  • 2.1. Release Notes - 10_01_00
  • 2.2. Release Notes - 10_00_00
  • 2.3. Release Notes - 09_02_00
  • 2.4. Release Notes - 09_01_00
  • 2.5. Release Notes - 09_00_00
  • 2.6. Release Notes - 08_06_00
  • 2.7. Release Notes - 08_05_00
  • 2.8. Release Notes - 08_04_00
  • 2.9. Release Notes - 08_02_00
  • 2.10. Release Notes - 08_01_00
  • 2.11. Release Notes - 08_00_00
  • 2.12. Release Notes - 07_03_00
  • 2.13. Release Notes - 07_01_00
  • 2.14. Release Notes - 07_00_00
  • 2.15. Release Notes - 06_02_00
  • 2.16. Release Notes - 06_01_00
• 3. Getting Started
  • 3.1. Building the PDK
  • 3.2. Supported Boards/SOCs
  • 3.3. Build Steps
  • 3.4. Library Path and Naming Convention
• 4. Modules
  • 4.1. CSL
  • 4.2. FreeRTOS
  • 4.3. SafeRTOS
  • 4.4. OSAL
  • 4.5. DSS
  • 4.6. CSIRX
  • 4.7. ENET
  • 4.8. FVID2 User Guide
  • 4.9. GPIO
  • 4.10. I2C
  • 4.11. IPC
  • 4.12. MCAN
  • 4.13. McASP
  • 4.14. PM
  • 4.15. SA
  • 4.16. SCICLIENT
  • 4.17. OTP KEYWRITER
  • 4.18. SPI
  • 4.19. OSPI
  • 4.20. UART
  • 4.21. UDMA
  • 4.22. PMIC
  • 4.23. MMCSD
  • 4.24. Low Power Manager (LPM)
  • 4.25. Safety Checkers
• 5. Bootloader (SBL)
  • 5.1. SBL Overview
  • 5.2. J721E SBL
  • 5.3. Boot App
  • 5.4. Boot HLOS
• 6. Board/EVM Abstraction
  • 6.1. Board Support
  • 6.2. UNIFLASH
• 7. How to Guides
  • 7.1. Run a Application from DDR on R5 Cores
  • 7.2. Relocation of sections at runtime
  • 7.3. Building and Running Memory Benchmarking Configurations
• 8. Frequently Asked Questions
  • 8.1. FAQ - Common
  • 8.2. FAQ - CAN
  • 8.3. FAQ - FVID2
  • 8.4. FAQ - C7x : Steps to switch C7x SysBIOS application from secure mode to non-secure mode
  • 8.5. FAQ - Used Resources - Interrupt
  • 8.6. JACINTO UDMA Resources
  • 8.7. FAQ - Supported Cores by example applications
  • 8.8. FAQ - How to set the clock for a given module and clock
  • 8.9. FAQ - Running Apps on secure devices
  • 8.10. FAQ - CSI2RX
• 9. Developer Notes
  • 9.1. FreeRTOS Usage and Migration Guidelines
  • 9.2. FreeRTOS Real-time Object View (ROV)
  • 9.3. IPC LLD Migration Guide
  • 9.4. XIP Using Dummy App
  • 9.5. XIP Using Two Appimages
  • 9.6. TI ARM CLANG Usage and Migration Guidelines
  • 9.7. SafeRTOS Usage and Migration Guidelines

Support

For technical support please post your questions at http://e2e.ti.com.