I2C CSL API

Introduction

CSL I2C driver interface

Macros
#define	CSL_I2C_CFG_MST_TX
#define	CSL_I2C_CFG_MST_RX   ((uint32_t)CSL_I2C_CON_MST_MASK)
#define	CSL_I2C_CFG_STOP   ((uint32_t)CSL_I2C_CON_STP_MASK)
#define	CSL_I2C_CFG_N0RMAL_MODE   ((uint32_t)0 << CSL_I2C_CON_STB_SHIFT)
#define	CSL_I2C_CFG_SRT_BYTE_MODE   ((uint32_t)CSL_I2C_CON_STB_MASK)
#define	CSL_I2C_CFG_7BIT_SLAVE_ADDR   ((uint32_t)0 << CSL_I2C_CON_XSA_SHIFT)
#define	CSL_I2C_CFG_10BIT_SLAVE_ADDR   ((uint32_t)CSL_I2C_CON_XSA_MASK)
#define	CSL_I2C_CFG_10BIT_OWN_ADDR_0   ((uint32_t)CSL_I2C_CON_XOA0_MASK)
#define	CSL_I2C_CFG_10BIT_OWN_ADDR_1   ((uint32_t)CSL_I2C_CON_XOA1_MASK)
#define	CSL_I2C_CFG_10BIT_OWN_ADDR_2   ((uint32_t)CSL_I2C_CON_XOA2_MASK)
#define	CSL_I2C_CFG_10BIT_OWN_ADDR_3   ((uint32_t)CSL_I2C_CON_XOA3_MASK)
#define	CSL_I2C_CFG_7BIT_OWN_ADDR_0   ((uint32_t)0 << CSL_I2C_CON_XOA0_SHIFT)
#define	CSL_I2C_CFG_7BIT_OWN_ADDR_1   ((uint32_t)0 << CSL_I2C_CON_XOA1_SHIFT)
#define	CSL_I2C_CFG_7BIT_OWN_ADDR_2   ((uint32_t)0 << CSL_I2C_CON_XOA2_SHIFT)
#define	CSL_I2C_CFG_7BIT_OWN_ADDR_3   ((uint32_t)0 << CSL_I2C_CON_XOA3_SHIFT)
#define	CSL_I2C_CFG_MST_ENABLE   ((uint32_t)CSL_I2C_CON_I2C_EN_MASK)
#define	CSL_I2C_CFG_START   ((uint32_t)CSL_I2C_CON_STT_MASK)
#define	CSL_I2C_CFG_MST   ((uint32_t)CSL_I2C_CON_MST_MASK)
#define	CSL_I2C_CFG_HS_MOD   ((uint32_t)CSL_I2C_CON_OPMODE_HSI2C << CSL_I2C_CON_OPMODE_SHIFT)

Macro Definition Documentation

CSL_I2C_CFG_MST_TX

#define CSL_I2C_CFG_MST_TX

Value:

(((uint32_t)CSL_I2C_CON_TRX_MASK) | \
                                         (uint32_t)(CSL_I2C_CON_MST_MASK))

CSL_I2C_CFG_MST_RX

#define CSL_I2C_CFG_MST_RX   ((uint32_t)CSL_I2C_CON_MST_MASK)

CSL_I2C_CFG_STOP

#define CSL_I2C_CFG_STOP   ((uint32_t)CSL_I2C_CON_STP_MASK)

CSL_I2C_CFG_N0RMAL_MODE

#define CSL_I2C_CFG_N0RMAL_MODE   ((uint32_t)0 << CSL_I2C_CON_STB_SHIFT)

CSL_I2C_CFG_SRT_BYTE_MODE

#define CSL_I2C_CFG_SRT_BYTE_MODE   ((uint32_t)CSL_I2C_CON_STB_MASK)

CSL_I2C_CFG_7BIT_SLAVE_ADDR

#define CSL_I2C_CFG_7BIT_SLAVE_ADDR   ((uint32_t)0 << CSL_I2C_CON_XSA_SHIFT)

CSL_I2C_CFG_10BIT_SLAVE_ADDR

#define CSL_I2C_CFG_10BIT_SLAVE_ADDR   ((uint32_t)CSL_I2C_CON_XSA_MASK)

CSL_I2C_CFG_10BIT_OWN_ADDR_0

#define CSL_I2C_CFG_10BIT_OWN_ADDR_0   ((uint32_t)CSL_I2C_CON_XOA0_MASK)

CSL_I2C_CFG_10BIT_OWN_ADDR_1

#define CSL_I2C_CFG_10BIT_OWN_ADDR_1   ((uint32_t)CSL_I2C_CON_XOA1_MASK)

CSL_I2C_CFG_10BIT_OWN_ADDR_2

#define CSL_I2C_CFG_10BIT_OWN_ADDR_2   ((uint32_t)CSL_I2C_CON_XOA2_MASK)

CSL_I2C_CFG_10BIT_OWN_ADDR_3

#define CSL_I2C_CFG_10BIT_OWN_ADDR_3   ((uint32_t)CSL_I2C_CON_XOA3_MASK)

CSL_I2C_CFG_7BIT_OWN_ADDR_0

#define CSL_I2C_CFG_7BIT_OWN_ADDR_0   ((uint32_t)0 << CSL_I2C_CON_XOA0_SHIFT)

CSL_I2C_CFG_7BIT_OWN_ADDR_1

#define CSL_I2C_CFG_7BIT_OWN_ADDR_1   ((uint32_t)0 << CSL_I2C_CON_XOA1_SHIFT)

CSL_I2C_CFG_7BIT_OWN_ADDR_2

#define CSL_I2C_CFG_7BIT_OWN_ADDR_2   ((uint32_t)0 << CSL_I2C_CON_XOA2_SHIFT)

CSL_I2C_CFG_7BIT_OWN_ADDR_3

#define CSL_I2C_CFG_7BIT_OWN_ADDR_3   ((uint32_t)0 << CSL_I2C_CON_XOA3_SHIFT)

CSL_I2C_CFG_MST_ENABLE

#define CSL_I2C_CFG_MST_ENABLE   ((uint32_t)CSL_I2C_CON_I2C_EN_MASK)

CSL_I2C_CFG_START

#define CSL_I2C_CFG_START   ((uint32_t)CSL_I2C_CON_STT_MASK)

CSL_I2C_CFG_MST

#define CSL_I2C_CFG_MST   ((uint32_t)CSL_I2C_CON_MST_MASK)

CSL_I2C_CFG_HS_MOD

#define CSL_I2C_CFG_HS_MOD   ((uint32_t)CSL_I2C_CON_OPMODE_HSI2C << CSL_I2C_CON_OPMODE_SHIFT)