2.1. Release Notes - 10_00_00¶
2.1.1. Introduction¶
This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.
New features added / supported is listed below and defects fixed are highlighted in Fixed Issues. Also please check Upgrade and Compatibility for backward compatibility
2.1.2. What’s New¶
ID |
Description |
Module |
Supported Platforms |
|---|---|---|---|
ETHFW-2710 |
Enet Driver shall support >400 Mbps throughput with TCP |
ENET |
J721E,J7200,J721S2,J784S4 |
ETHFW-2761 |
Enet Driver shall support examples for mcu3_0 core |
ENET |
J721E,J7200,J721S2,J784S4 |
ETHFW-2620 |
Enet LLD: PPS signal generation |
ENET |
J721E,J7200,J721S2,J784S4 |
2.1.3. Upgrade and Compatibility¶
2.1.3.1. CSL¶
CSL files have been moved from CSL folder to the corresponding driver folder.
UDMA CSL files have been moved from <pdk/ti/csl/src/ip/*> to <pdk/ti/drv/udma/src/*>. UDMA CSL is now compiled as part of udma library and not ti.csl library.
I2C CSL files have been moved from <pdk/ti/csl/src/ip/i2c/*> to <pdk/ti/drv/i2c/src/*>. I2C CSL is now compiled as part of ti.drv.i2c library and not ti.csl library.
CLEC files have been moved from <ti/csl/src/ip/clec/*> to <ti/csl/arch/c7x/src/clec/*>. CLEC for C7x is now compiled as part of ti.csl.init library and not ti.csl library.
Moved from |
Moved to |
|---|---|
ti/csl/src/ip/udmap |
ti/drv/udma/src/udmap |
ti/csl/src/ip/ringacc |
ti/drv/udma/src/ringacc |
ti/csl/src/ip/proxy |
ti/drv/udma/src/proxy |
ti/csl/src/ip/intaggr |
ti/drv/udma/src/intaggr |
ti/csl/src/ip/dru |
ti/drv/udma/src/dru |
ti/csl/src/ip/clec |
ti/csl/arch/c7x/src/clec |
ti/csl/src/ip/i2c/* |
ti/drv/i2c/src/csl/* |
ti/csl/src/ip/mailbox/* |
ti/drv/ipc/src/mailbox/* |
Note
I2C CSL driver directories have been rearranged and folder version is different (V1 instead of V2) However the code/HW remains the same.
2.1.3.2. Security Boardcfg¶
Enabled the safety host in Boardcfg as mcu1_0 to allow firewall read access
This allows TIFS safety checker functionality; previously safety host was not enabled
2.1.3.3. SBL¶
SBL OSPI now uses DMA to copy application image to the internal memory
2.1.3.4. ENET¶
The application interface of lwIP-to-Enet adaptation layer provides a callback (LwipifEnetAppIf_RxHandleInfo::handleErrPktFxn) which applications can set in order to process MAC control, short or error packets (i.e. for diagnostics purpose). User must configure MAC ports to copy those packet types to host port, otherwise they will be dropped inside CPSW and will not reach software, irrespective of the callback being set or not.
Error code information field (errCode) has been added to DMA packet data structure (EnetUdma_PktInfo). When MAC ports are configured to copy error packets to host port, application must check that errCode is 0. This field is meant to be used for inspection of packets with errors which are otherwise dropped by CPSW.
Transmit Packet scatter gather list (EnetUdma_SGListEntry) has flag for disabling cache operations per scatter segment (disableCacheOps). This is useful when Application is doing cache operations and in cases where portion of data is not changing.
2.1.4. Device Support¶
J721E SR1.1 and SR 2.0, J721E-HS-SE SR1.1 and SR2.0, J721E-HS-FS SR2.0 (BOARD=j721e_evm)
Associated TIFS versions:
TIFS name
J721E SR revision
tifs.bin
SR1.1 & SR2.0 GP
tifs-sr1.1-hs-enc.bin
SR1.1 HS-SE
tifs_sr2-hs-enc.bin
SR2.0 HS-SE
tifs_sr2-hs-fs-enc.bin
SR2.0 HS-FS
2.1.5. Validation Information¶
For details on the validated examples refer to the platform specific test report available here.
2.1.6. Tool Chain Information¶
Component |
Version |
|---|---|
FreeRTOS Kernel tag |
V 10.5.1 |
lwIP stack |
2.2.0 |
TI ARM CLANG |
3.2.2.LTS |
GCC ARM code generation tools |
ARCH64 9.2-2019.12 |
CGT XML Processing Scripts |
2.61.00 |
Component |
Version |
|---|---|
TI C6x code generation tools |
8.3.7 |
TI C7x code generation tools |
4.1.0.LTS |
2.1.7. Change Request¶
Refer to monthly roadmap slides for changes in the planned features
2.1.8. Fixed Issues¶
ID |
Head Line |
Module |
Affected Versions |
Affected Platforms |
|---|---|---|---|---|
Missing support for 1-8-8 read mode on OSPI |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
|
IPC: stack corruption of taskWaiter used in RPMessage_getRemoteEndPt |
PDK |
08.00.00 |
J721E, J7200, J721S2, J784S4 |
|
[DSS] FVID2_DF_RGBX24_8888 not supported in writeback pipeline |
PDK |
09.02.00 |
J721E,J721S2,J784S4 |
|
Sciclient: gSciclientHandle initialization throws an error with GHS Safety Compiler |
PDK |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
In emmc HS200 speed mode we are getting output frequency as 100MHz |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
Boot App sets the GTC clock to 250 MHz instead of 200 MHz |
PDK |
09.01.00 |
J721E,J721S2,J784S4 |
|
DSS: Dss_dctrlDrvSetLayerParamsIoctl does not support layerEnable = false |
PDK |
09.01.00 |
J721E,J721S2,J784S4 |
|
Set Owner HOST ID of DM core to MCU_0_R5_0 |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
UDMA: Driver does not clear flush bit in case of teardown for TX channels |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
|
Main R5 cores fail IPC test using safertos firmware from SDK 9.1+ |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
OSPI Tuning algorithm has incorrect logic while searching secondary Rx high point |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
Documentation: FreeRTOS version is incorrect in the older releases |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
|
Documentation: PDK: UDMA resource needs to be documented for each driver |
PDK |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
Enet: ALE: Buffer overflow in ALE policer dump |
ENET |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
enet: mdio: Failure in PHY reg read in manual mode in ‘debug’ profile |
ENET |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
ID |
Head Line |
Module |
Affected Versions |
Affected Platforms |
|---|---|---|---|---|
Missing support for 1-8-8 read mode on OSPI |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
|
Sciclient: gSciclientHandle initialization throws an error with GHS Safety Compiler |
PDK |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
IPC: stack corruption of taskWaiter used in RPMessage_getRemoteEndPt |
PDK |
08.00.00 |
J721E, J7200, J721S2, J784S4 |
|
In emmc HS200 speed mode we are getting output frequency as 100MHz |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
Set Owner HOST ID of DM core to MCU_0_R5_0 |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
UDMA: Driver does not clear flush bit in case of teardown for TX channels |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
|
Main R5 cores fail IPC test using safertos firmware from SDK 9.1+ |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
OSPI Tuning algorithm has incorrect logic while searching secondary Rx high point |
PDK |
09.01.00 |
J721E,J7200,J721S2,J784S4 |
|
Documentation: FreeRTOS version is incorrect in the older releases |
PDK |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
Documentation: PDK: UDMA resource needs to be documented for each driver |
PDK |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
Enet: ALE: Buffer overflow in ALE policer dump |
ENET |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
|
enet: mdio: Failure in PHY reg read in manual mode in ‘debug’ profile |
ENET |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
2.1.9. Known Issues¶
ID |
Head Line |
Module |
Reported in Release |
Affected Platforms |
Impact |
Workaround in this release |
|---|---|---|---|---|---|---|
OSPI driver sets auto-polling dummy cycles only for J721e |
PDK |
09.02.00 |
J721E,J7200,J721S2,J784S4 |
NA |
NA |
|
LoadP_freertos shows 100% when the timer rollover occurs every 2^32 microseconds |
PDK |
09.02.00 |
J721E,J721S2,J784S4 |
NA |
NA |
|
CSIRX: Dual and 4 Pixels mode for RAW8 data is not working |
PDK |
09.00.00 |
J721E,J721S2,J784S4 |
NA |
NA |
|
DDR and MSMC Memory Benchmarking Apps are not working |
PDK |
09.01.00 |
J721E, J7200, J721S2, J784S4 |
Not able to measure benchmarks for DDR & MSMC |
None |
|
BoardFlashOpen fails for Nand in DTR mode |
PDK |
09.01.00 |
J721E, J7200, J721S2, J784S4 |
Cant open flash in DDR mode if already opened and closed |
NA |
|
[I2C]: SCL line held low for longer duration on NACK |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
NA |
NA |
|
MMCSD driver has unoptimized delay values |
PDK |
09.00.00 |
J721E,J7200,J721S2,J784S4 |
NA |
NA |
|
[McSPI]: SPI does not work in DMA mode if transfer size is not a multiple of trigger level |
PDK |
07.03.00 |
J721E |
NA |
NA |
|
[SPI] DMA mode does not work for SPI5 |
PDK |
07.01.00 |
J721E |
NA |
NA |
|
IPC Performance Test hangs after loading the binary |
PDK |
08.01.00 |
J721E, J7200, J721S2, J784S4 |
Not able to get performace numbers for IPC |
NA |
|
Keywriter example application is not validated for release |
PDK |
09.02.00 |
J721E, J7200, J721S2, J784S4 |
Keywriter might flash incomplete/incorrect keys in efuse |
None, contact TI for working keywriter binary via e2e |
|
EthFW will get stuck waiting for link if link partner is not ready |
ENET |
08.x.00 |
J721E, J7200, J721S2, J784S4 |
Indefinite polling could happen in SGMII link is not up |
NA |
|
Enet: Memory footprint on J7 devices is ~10MB |
ENET |
09.01.00 |
J721E, J7200, J721S2, J784S4 |
NA |
NA |
2.1.10. Limitations¶
2.1.10.1. PDK¶
PDK examples do not support SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.
TI Clang compiler does not enable O3 optimization level and Thumb2 mode which were enabled by default with TI ARM CGT compiler. This has an impact on driver throughput. E.g. Ethernet performance has reduced by ~20% on J721E
2.1.10.2. ENET¶
Scatter-gather functionality is currently supported only for packet transmission.
gPTP stack is supported only in FreeRTOS.