8. Frequently Asked Questions

• 8.1. FAQ - Common
  • 8.1.1. Generic
    • 8.1.1.1. What does PDK stand for?
    • 8.1.1.2. What do I get with PDK, and how do I get started?
  • 8.1.2. Build
    • 8.1.2.1. What are the common issues faced during the build?
  • 8.1.3. Code Composer Studio
    • 8.1.3.1. Unable to connect to MCU 11 or MCU21
    • 8.1.3.2. CCS cannot resolve source or variables
  • 8.1.4. BoardCfg RM
    • 8.1.4.1. How to integrate updated RM BoardCfg in PDK?
• 8.2. FAQ - CAN
  • 8.2.1. What is CAN?
  • 8.2.2. How is bit-rate calculated?
  • 8.2.3. What is CAN bus termination?
  • 8.2.4. What is Transceiver Delay Compensation Value(TDCV) and how is it calculated?
  • 8.2.5. Things to consider/check before sending a message over CAN bus
  • 8.2.6. CAN communication failed, where to start debug?
• 8.3. FAQ - FVID2
  • 8.3.1. Data Formats Support on Video IPs/ISP on Jacinto-7 Devices
    • 8.3.1.1. Data Format Support on CSIRX, CSITX, VISS, and DSS Modules:
    • 8.3.1.2. Data Format Compatibility on CSIRX, CSITX, VISS, and DSS Modules:
• 8.4. FAQ - C7x : Steps to switch C7x SysBIOS application from secure mode to non-secure mode
  • 8.4.1. Introduction
  • 8.4.2. Step 1: SysBIOS config file changes to enable boot to non-secure
  • 8.4.3. Step 2: Linker command file changes
  • 8.4.4. Step 3: MMU initialization to setup secure and non-secure MMU tables
  • 8.4.5. Step 4: CLEC initialization to allow non-secure mode access
  • 8.4.6. Step 5: Cache initialization to partition L1/L2 as cache vs RAM
  • 8.4.7. Step 6: Sciclient init to use non-secure mode
  • 8.4.8. Step 7: Build and run
• 8.5. FAQ - Used Resources - Interrupt
  • 8.5.1. J721E
    • 8.5.1.1. MPU
    • 8.5.1.2. MCU 10 (MCU Domain)
    • 8.5.1.3. MCU 11 (MCU Domain)
    • 8.5.1.4. MCU 20 (Main Domain)
    • 8.5.1.5. MCU 21 (Main Domain)
    • 8.5.1.6. MCU 30 (Main Domain)
    • 8.5.1.7. MCU 31 (Main Domain)
    • 8.5.1.8. C66x 1 (Main Domain)
    • 8.5.1.9. C66x 2 (Main Domain)
    • 8.5.1.10. C7x 1 (Main Domain)
• 8.6. JACINTO UDMA Resources
  • 8.6.1. Introduction
  • 8.6.2. UDMA Channels and PSIL Threads
    • 8.6.2.1. MAIN NAVSS UDMA PSIL Description
    • 8.6.2.2. MCU NAVSS UDMA PSIL Description
  • 8.6.3. UDMA Rings
  • 8.6.4. UDMA Proxy
  • 8.6.5. UDMA Event
    • 8.6.5.1. Global Events
• 8.7. FAQ - Supported Cores by example applications
  • 8.7.1. Introduction
• 8.8. FAQ - How to set the clock for a given module and clock
  • 8.8.1. Introduction
  • 8.8.2. Default clock state of the system
  • 8.8.3. Setting the clock for a device
• 8.9. FAQ - Running Apps on secure devices
  • 8.9.1. Introduction
    • 8.9.1.1. Device Types
    • 8.9.1.2. JTAG Connectivity
  • 8.9.2. Signing
  • 8.9.3. Building PDK Applications
  • 8.9.4. References
• 8.10. FAQ - CSI2RX
  • 8.10.1. What is CSI2?
  • 8.10.2. How is Lane Speed Band selected?
  • 8.10.3. Things to consider/check before sending a frame over CSI2RX bus
  • 8.10.4. CSI2RX communication failed, where to start debug?
    • 8.10.4.1. Errors detected during reception: