2.2. Release Notes - 09_01_00

2.2.1. Introduction

This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.

New features added / supported is listed below and defects fixed are highlighted in Fixed Issues. Also please check Upgrade and Compatibility for backward compatibility

2.2.2. What’s New

ID

Description

Module

Supported Platforms

PDK-11949

CSL examples description

CSL

J721E,J7200,J721S2,J784S4

PDK-12829

CSI-TX Driver shall support creation of multiple instances per port

CSITX

J721E,J721S2,J784S4

ETHFW-2020

Enet: Integration of lwIP version 2.2.0

ENET

J721E,J7200,J721S2,J784S4

ETHFW-2160

Enet: CPSW: Context save/restore

ENET

J721E,J7200,J721S2,J784S4

ETHFW-2475

CPSW: ALE shall support policer table partitions

ENET

J721E,J7200,J721S2,J784S4

ETHFW-2462

Enet: Trace log timestamp support

ENET

J721E,J7200,J721S2,J784S4

ETHFW-2488

Enet: Unique error code generation

ENET

J721E,J7200,J721S2,J784S4

2.2.3. Upgrade and Compatibility

2.2.3.1. TI Arm Clang (R5 Compiler)

  • Updated ti-cgt-arrmllvm(clang) compiler from version 2.3.1 to version 3.2.0

  • Enabled thumb mode for compiling libraries/applications

2.2.3.1.1. OSAL

  • extended_system_pre_init and extended_system_post_cinit APIs extended by OSAL.

  • These APIs act as hooks to _system_pre_init and _system_post_cinit respectively.

2.2.3.2. OSPI

  • In SDR mode the minimum baudRateDiv to be configured needs to be 4 to maintain data integrity.

  • In DDR mode the minimum baudRateDiv to be configured needs to be 8 to maintain data integrity.

2.2.4. Device Support

  • J721E SR1.1 and SR 2.0, J721E-HS-SE SR1.1 and SR2.0, J721E-HS-FS SR2.0 (BOARD=j721e_evm)

  • Associated TIFS versions:

    TIFS name

    J721E SR revision

    tifs.bin

    SR1.1 & SR2.0 GP

    tifs-sr1.1-hs-enc.bin

    SR1.1 HS-SE

    tifs_sr2-hs-enc.bin

    SR2.0 HS-SE

    tifs_sr2-hs-fs-enc.bin

    SR2.0 HS-FS

2.2.5. Validation Information

For details on the validated examples refer to the platform specific test report available here.

2.2.6. Tool Chain Information

Component

Version

FreeRTOS Kernel

10.5.1

lwIP stack

2.2.0

TI ARM CLANG

3.2.0.LTS

GCC ARM code generation tools

ARCH64 9.2-2019.12

CGT XML Processing Scripts

2.61.00

Component

Version

TI C6x code generation tools

8.3.7

TI C7x code generation tools

4.0.0.LTS

2.2.7. Change Request

Refer to monthly roadmap slides for changes in the planned features

2.2.8. Fixed Issues

ID

Head Line

Module

Affected Versions

Affected Platforms

PDK-13294

[CSIRX]: Dual Pixel mode for YUV422 is not working

CSIRX

09.00.00

J721E,J721S2,J784S4

PDK-13309

[VTM] Workaround for errata i2053 enabled wrongly for J721S2/J784S4

CSL

09.00.00

J721E

PDK-13312

CSL: SPINLOCKLockStatusFree() implementation is wrong

CSL

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13326

[McSPI]: Incorrect condition for setting triggerlevel in DMA Mode

MCSPI

09.00.00

J721E,J721S2,J784S4,J7200

PDK-9571

[SPI] Transfer stalls when transfer length is not multiple of FIFO length in DMA mode

MCSPI

09.00.00

J721E

PDK-10410

[McSPI]: Based on fifosize, driver sets the trigger level incorrectly.

MCSPI

07.03.00

J721E

PDK-10411

[McSPI]: Driver allows enable FIFO for all channels in multi-channel mode

MCSPI

07.03.00

J721E

PDK-10412

[McSPI]: No interface to provide DMA information per channel

MCSPI

07.03.00

J721E

PDK-13387

Udma_rmGetSciclientDefaultBoardCfgRmRange() error check is incorrect

UDMA

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13271

CSL GPIO libraries still present in SDK

CSL, GPIO

08.06.00

J721E

PDK-13231

Incorrect R5F MPU configurations for J7

CSL

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13368

Outdated list of UART application in SDK doc

COMMON

09.00.00

J721E,J721S2,J784S4,J7200

PDK-12253

C7x context switch/restore does not happen correctly with SafeRTOS

OSAL

08.05.00

J721E,J721S2,J784S4,J7200

PDK-12901

[I2C]: Observing reduced I2C frequency when configured for 400KHz

I2C

08.06.00

J721E

PDK-13066

Inconsistent timing in FreeRTOS UT

OSAL

08.06.00

J721E

PDK-13080

[SafeRTOS]: Port does not support post_cinit()

OSAL

08.06.00

J721E,J721S2,J784S4,J7200

PDK-13192

[DSS-WB] Path does not support RGB888 format

DSS

08.04.00

J721E,J721S2,J784S4,J7200

PDK-13327

MMCSD reports floating point exception if input and output clocks are equal

MMCSD

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13416

Error checks missing in SBL for Board APIs

SBL

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13298

Documentation: SDK 9.0 Release documentation broken from 5.2.6.2 to 5.2.11.9

SBL

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13293

SBL: Out of order disablement of firewall in HS platforms

SBL

09.00.00

J721E,J721S2,J784S4,J7200

PDK-13174

C7x cannot run new image after running Clear CLEC Secure Claim image

SBL

08.06.00

J721E,J721S2,J784S4

PDK-12986

Sciserver not building on windows environment

SCICLIENT

08.06.00

J721E,J721S2,J784S4

PDK-12878

Sciclient_rmIrqDeleteRoute API does not check return status

SCICLIENT

08.02.00

J721E

ETHFW-2084

Cable connect/disconnect can cause CPSW unrecoverable condition

ENET

09.00.00

J721E, J7200, J721S2, J784S4

ETHFW-2458

Sending Preamble (32 one’s) is missing in MDIO Read/Write operation in Manual Mode

ENET

09.00.00

J721E, J7200, J721S2, J784S4

ETHFW-2491

Sending packets with high throughput to lwip-stack causes flow to get blocked

ENET

09.00.00

J721E, J7200, J721S2, J784S4

2.2.9. Known Issues

ID

Head Line

Module

Reported in Release

Affected Platforms

Impact

Workaround in this release

PDK-10409

[McSPI]: SPI does not work in DMA mode when transfer size is not multiple of trigger level

MCSPI

07.03.00

J721E

transfer size should always be a multiple of trigger level

NA

PDK-12540

CSI-TX takes longer time to queue and dequeue in driver than expected.

CSI2TX

08.04.00

J721E, J721S2,J784S4

CSITX performance doesnot meet threoretical performance at 2.5 GBPS

NA

PDK-9696

[SPI] DMA mode does not work for SPI5

MCSPI

07.01.00

J721E

Transfer does not complete and there is no callback.

NA

PDK-13453

Unnecessary delays in MMCSD driver

EMMC, MMCSD

09.00.00

J721E,J7200, J721S2,J784S4

Increase in eMMC boot time.

NA

PDK-12986

IPC: stack corruption of taskWaiter used in RPMessage_getRemoteEndPt

IPC

08.00.00

J721E,J721S2,J784S4

pOsalPrms->lockHIsrGate(module.gateSwi) used to disable interrupts is not protecting against SVC instructions, and causing a stack corruption.

NA

PDK-13522

[CSIRX] All streams are by default enabled/disabled affecting CSITX

CSITX

09.00.00

J721E, J721S2,J784S4

This affects the performance of the CSITX

NA

PDK-13527

DP to HDMI adaptor is not working

DSS

09.01.00

J721E, J721S2,J784S4

This affects the performance of the CSITX

NA

PDK-13500

[SciClient] Write protection sequence is incorrect in Sciclient_serviceSecureProxy API

SCICLIENT

09.00.00

J721E, J721S2,J784S4

unable to access the message in Sciclient_serviceSecureProxy

NA

PDK-13557

CSITX driver initialization fails second time after successful teardown

CSITX

09.01.00

J721E, J721S2,J784S4

unable to create multiple nodes with same CSITX instance

NA

ETHFW-2088

EthFW will get stuck waiting for link if link partner is not ready

ENET

08.x.00

J721E, J7200, J721S2, J784S4

Indefinite polling could happen in SGMII link is not up

Link partner should be available when port is open.

ETHFW-2140

SGMII: Wrong RGMII clock after changing SERDES refclk of 156.25MHz

ENET

08.06.00, 09.00.00

J7200

RGMII and SGMII port configuration cannot exist

None.

ETHFW-2242

enet: mdio: Failure in PHY reg read in manual mode in ‘debug’ profile

ENET

09.00.00

J721E, J7200, J721S2, J784S4

MDIO operations will fail

Workaround integrated in SDK 9.0

ETHFW-2539

examples: EST: Assertion caused by invalid sizeThresEn check

ENET

09.01.00

J721E, J7200, J721S2, J784S4

Example app issue, EST feature fully functional

NA

2.2.10. Limitations

2.2.10.1. PDK

  1. PDK examples do not support SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.

  2. TI Clang compiler does not enable O3 optimization level and Thumb2 mode which were enabled by default with TI ARM CGT compiler. This has an impact on driver throughput. E.g. Ethernet performance has reduced by ~20% on J721E

2.2.10.2. ENET

  • Scatter-gather functionality is currently supported only for packet transmission.

  • gPTP stack is supported only in FreeRTOS.