2.9. Release Notes - 08_00_00

2.9.1. Introduction

This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.

New features added / supported is listed below and defects fixed are highlighted in Fixed Issues. Also please check Upgrade and Compatibility for backward compatibility

2.9.2. What’s New

ID

Description

Module

Supported Platforms

PDK-9782

PDK OSAL: Support for SW Timer, Mailbox, Mutex, Heap and Load modules

OSAL

J721E, J7200, AM65xx

PDK-9369

PDK OSAL Support for FreeRTOS on R5F

OSAL

J721E, J7200, AM65xx

JACINTOREQ-1429

PDK R5F Drivers Migration to support FreeRTOS

ALL

J721E, J7200, AM65xx

PDK-9679 PDK-9678

Uniflash Update for XIP Flow and XIP Flashing Flow update

COMMON

J721E, J7200, AM65xx

JACINTOREQ-1212

Enet LLD: Integrate open source LWIP TCP/IP stack

Enet

J721E, J7200, AM65xx

ID

Description

Module

Supported Platforms

PDK-9541

DDR Boot Time Optimizations

BOARD

J721E, J7200

PDK-6879

WA for DDR: VRCG high current mode must be used during LPDDR4 CBT

BOARD

J721E, J7200

ID

Description

Module

Supported Platforms

PDK-9355

FreeRTOS Support on C6x for CPU

OSAL,COMMON

J721E

PDK-9323

DSS M2M: Scaling

DSS

J721E

PDK-9322

DSS M2M: Multi-Channel Support

DSS

J721E

PDK-5200

FlexConnect: Memory -> VISS -> MSC -> Memory (YUV420)

VHWA

J721E

PDK-8778

Keywriter - PDK SBL example application

SBL, SECURITY

J721E

2.9.3. Upgrade and Compatibility

2.9.3.1. FreeRTOS

This release introduces FreeRTOS Support for J721E PDK Drivers/Examples on R5F, C66x, C7x cores.
PDK drivers/examples are migrated and validated with FreeRTOS running in R5F cores.

This is also the last release with TI-RTOS(SysBIOS) support.
PDK drivers/examples on all cores are validated with TI-RTOS(SysBIOS) as well in this release.
TI-RTOS(SysBIOS) Support on all cores will be scoped out from next release.

FreeRTOS is not supported on A72 core.
TI-RTOS(SysBIOS) / Non-OS(Baremetal) Support for examples on A72 core will be de-scoped from next release.

All C66x and C7x PDK Drivers/Examples continue to use TI-RTOS(SysBIOS) itself in this release.
C66x and C7x Drivers/Examples in PDK will be migrated and validated with FreeRTOS in the next release.

See FreeRTOS Chapter for more details.

2.9.3.2. lwIP

This release introduces lwIP TCP/IP stack support for J721E on R5F, C66x, C7x cores. lwIP is supported and validated with FreeRTOS, it’s not supported on TI-RTOS (SysBIOS).

Enet LLD implements the lwIP driver interface which enables lwIP stack to run transparently on top of the Ethernet peripherals supported by Enet driver. Enet LLD provides a lwIP example application which showcases lwIP integration on peripherals supported by Enet driver, where user can run tests such as ping, UDP/TCP echo and iperf. This example supports DHCP and static IP. For more information, see Enet LLD examples section.

lwIP stack is enabled for CPSW_2G and CPSW_9G.

This is the last release with TI NDK TCP/IP stack support. Enet LLD NIMU example has been validated as well on supported cores in this release. TI NDK stack support will be scoped out starting from next release.

2.9.3.3. OSAL

As part of FreeRTOS Migration, following new OSAL modules are added

  • ClockP <= SW Timer

  • MailboxP <= Software Mailbox

  • MutexP <= Mutex

  • HeapP <= For creating arbitrary heaps

  • LoadP <= Task / CPU Load measurement [FreeRTOS Only]

Also following are the updates for existing OSAL modules.

  • EventP
    • New API EventP_wait()

    • EventP_pend() supports only SysBIOS. This will be obsolete in next release. Migrate to new similar API EventP_wait()

  • QueueP
    • Header file is renamed to QueueP.h from Queue.h

    • Following OSAL Queue APIs supports only SysBIOS and will be obsolete in next release. Migrate to new QueueP APIs

    Old API

    New API

    Osal_Queue_Handle

    QueueP_Handle

    Osal_Queue_Elem

    QueueP_Elem

    -NA-

    QueueP_Params

    -NA-

    QueueP_Params_init

    Osal_Queue_construct + Osal_Queue_handle

    QueueP_create

    -NA-

    QueueP_delete

    Osal_Queue_put

    QueueP_put

    Osal_Queue_get

    QueueP_get

    Osal_Queue_empty

    QueueP_isEmpty

2.9.3.4. DDR

DDR Boot time(initialization + training) is optimized in this release and is now in the range of ~35 ms.

This includes:-

  • DDR Register Settings updates and

  • Disabled DDR Register write verification, given there is DDR inline ECC. (Support for register Verification post init/training will be provided in future release.)


Priming of DDR for ECC is now optimized by usage of UDMA.

Following in PDK_INSTALL_DIR/packages/ti/board/src/j721e_evm/include/board_cfg.h can be modified as per the user requirement.

/* Note with ECC enabled, all memory is not usable: 1/8 memory used for inline ECC */
#define BOARD_DDR_ECC_END_ADDR                          (0xF1FFFFFFU)
/* Enable/Disable DDR Memory Prime for ECC. Define the following macro to enable. */
#undef BOARD_DDR_ENABLE_DDR_MEM_PRIME

2.9.3.5. XIP

A new twin appimage bootflow has been introduced. There is one appimage for RAM sections and one appimage for xip sections.

  • For each CPU, the compiler+linker toolchain is used to create the application .out “ELF” file which can be loaded and run via CCS

  • The below “post build” steps are then used to convert the application .out into a “flash” friendly format - For each CPU, out2rpc is used to convert the ELF .out to a binary file containing only the loadable sections. This is called a RPRC file. - For each CPU, xipGen is used to split this RPRC file into two RPRC files. - One RPRC, containing the section that during boot need to be loaded to RAM - Second RPRC, containing the section that during boot are not loaded to RAM but are instead “eXecuted In Place”, i.e XIP - multiCoreGen is then used to combine all the non-XIP RPRC files per CPU into a single .appimage file which is a concatenation of the individual CPU specific RPRC files. - multiCoreGen is used again to combine all the XIP RPRC files per CPU into a single .appimage_xip file which is a concatenation of the individual CPU specific RPRC XIP files.

  • This .appimage and .appimage_xip is then flashed to the EVM using Uniflash

  • Upon booting, the SBL interpets the .appimage and loads the RAM sections into respective memory.

  • The .appimage_xip contains the sections that are executed in place.

See XIP Programming Guide for more details.

2.9.3.6. SMP mode

  • SMP Support is de-scoped and PDK Examples will not support execution in SMP mode

2.9.3.7. Board Diagnostics

  • Board diagnostics stress test is not supported

2.9.3.8. PCIe, USB

  • PCIE and USB Support is removed for J721E.

2.9.4. Device Support

  • J721E EVM SR1.0 and SR1.1, J721E-HS EVM (BOARD=j721e_evm)

  • Associated TIFS versions:

    TIFS name

    J721E SR revision

    tifs.bin

    SR1.0 & SR1.1 GP

    tifs-hs-enc.bin

    SR1.0 HS

    tifs-sr1.1-hs-enc.bin

    SR1.1 HS

2.9.5. Validation Information

For details on the validated examples refer to the platform specific test report available here.

2.9.6. Tool Chain Information

Component

Version

FreeRTOS Kernel

10.5.1

Sys Bios

6_83_02_07

XDC Tools

3_61_04_40_core

lwIP stack

2.1.2

lwIP-contrib

2.1.0

Network Development Kit (NDK)

3_80_00_19

Network Services for NDK (NS)

2_80_00_17

TI ARM R5F code generation tools

20.2.0.LTS

PRU code generation tools

2.3.3

GCC ARM code generation tools

ARCH64 9.2-2019.12

CGT XML Processing Scripts

2.61.00

System Analyzer (UIA Target)

2_41_00_01

Component

Version

TI C6x code generation tools

8.3.7

TI C7x code generation tools

1.4.2.LTS

2.9.7. Change Request

ID

Head Line

Original Fix Version

New Fix Version

JACINTOREQ-1518

PDK: R5 SafeRTOS CPU support descope

08.00.00

08.01.00

JACINTOREQ-1441

PDK: C7x FreeRTOS CPU support descope

08.00.00

08.01.00

JACINTOREQ-1504

PDK: PCIE and USB Descope for J721E

08.00.00

None

2.9.8. Fixed Issues

ID

Head Line

Module

Affected Versions

Affected Platforms

PDK-10131

[McSPI] Incorrect input clock in example

McSPI

07.03.00

J721E, J7200

PDK-9437

Increase in Boot time when DDR ECC is enabled

Board

07.02.00

J721E, J7200

PDK-9426

ECAP CSL Capture Event Counter Reset Function Fails

CSL

07.03.00

J721E, J7200

PDK-6793

osal - semaphore should not be used for mutex

OSAL

06.02.00

J721E, J7200

PDK-9594

UDMA: Event Disable and Enable Failure for shared events

UDMA

07.03.00

J721E, J7200, AM65xx

PDK-10315

[SBL]: SBL does not set NB priorities for the HS device

SBL

07.03.00

J721E-HS, J7200-HS

ID

Head Line

Module

Affected Versions

Affected Platforms

PDK-10304

Using RPMessage_recvNb() causes Mutex Overflow

IPC

07.01.00

J721E

PDK-9873

[CSIRX]: Incorrect condition check when starting the stream

CSIRX

07.03.00

J721E

PDK-9759

[Board]: SciClient_init from Board_init should not application SciClient_init configuration

Board

07.03.00

J721E

PDK-9756

[CSITX]: Incorrect DPHY instance used in the driver

CSITX

07.03.00

J721E

PDK-9694

[CSITX]: CSITX supports only 4 lane speeds

CSITX

07.03.00

J721E

PDK-9681

[DSS CSL-FL]DSS displays corrupted data OR w/o colors on the screen

DSS

07.03.00

J721E

PDK-9677

Interrupt mode in sciclient is not working on HS Device

SciClient

07.01.00

J721E

PDK-9673

csl: serdes: invertTXPolarity not set by CSL_serdesLaneEnable()

CSL

07.01.00

J721E

PDK-9456

I2C Driver does not return error when camera/client is not available on the I2C bus

I2C

07.02.00

J721E

PDK-9433

MASTER _BYPASS bit in PHY_MASTER_CONTROL should be controlled based on the clock

OSPI

07.02.00

J721E

PDK-9376

[SciClient]Clock Source Macros are missing for odd numbered GP Timers

SciClient

07.01.00

J721E

PDK-8848

pixel clock for HDMI is fixed/hardcoded

DSS

07.01.00

J721E

PDK-8653

CSI2-RX: Stream FIFO Overflow observed for 4 channel input with FrameSync

CSIRX

06.02.00

J721E

PDK-8600

SBL optimizations for OSPI boot mode

SBL

07.00.00

J721E

PDK-6992

[DSS]: Support for BT 601 requires additional patch

DSS

07.00.00

J721E

PDK-5224

Active DP -> HDMI adapter doesn’t work

DSS

00.03.00

J721E

2.9.9. Known Issues

ID

Head Line

Module

Reported in Release

Affected Platforms

Impact

Workaround in this release

PDK-6975

Pulsar (R5F) : High priority interrupt is missed by VIM

CSL, OSAL

07.00.00

J721E, J7200, AM65xx

Baremetal implementation is pending

Use SYSBIOS instead of baremetal

PDK-8320

ICSS V1 CSL not up to date with ICSSG

CSL

07.00.00

J721E, AM65xx

None

Patch available. Will be included in next release

PDK-9676

UART : Potential interrupt storm

UART

07.02.00

J7200, J721E

Error interrupt resulting in hang.

None

PDK-8601

CSL ECC test application fails on J721E and J7200

CSL

07.01.00

J721E, J7200

None

None

PDK-9696

[SPI] DMA mode does not work for SPI5

McSPI

07.01.00

J721E

Cannot use DMA with SPI5

Disable DMA for SPI5 OR use another instance of SPI

PDK-9571

[SPI] Transfer stalls when transfer length is not multiple of FIFO length in DMA mode

McSPI

07.02.00

J721E

Cannot transfer data if data size is not multiple of FIFO length in DMA mode

Use transfer size in multiple of FIFO length

PDK-9947

[CSIRX]: hangs is observed when re-running example with different number of channels

CSIRX

07.03.00

J721E

Unable to re-run application with different number of cameras

Power-cycle the board before reloading the application next time

PDK-8407

J721E: MCU Timer 0 is not usable from application (sysbios) with SBL

OSAL, SBL

07.01.00

J721E

None

Use any other timer

PDK-8300

UDMA MCU NAVSS Channel Num 5 is not functional, when booting the application using the SBL bootloader.

UDMA

07.01.00

J721E

Low Impact. UDMA MCU NAVSS Channel 5 can’t be used when booting the application using the SBL bootloader.

Use any other channel. In the defaultBoardCfg Channel no. 5 is not used. The issue will be seen only when the boardcfg is updated to use channel 5.

PDK-6789

MCU/Main NAVSS UDMA memcpy from L2SRAM fails

UDMA

07.00.00

J721E

Transfer works fine when source buffer, destination buffer and TRPD buffers are in L2SRAM. The issue happens only when the ring memory is in L2SRAM location

Use ring memory from non-L2SRAM location

PDK-6549

MCU2 core diagnostic tests not running through sbl

BOARD

07.00.00

J721E

None

Use CCS/JTAG to run the tests

PDK-6548

Display port (eDP) diagnostic test failure

BOARD

07.00.00

J721E

None

Use display sample application

PDK-5228

Output mismatch when each region requiring 3 TRs

VHWA

01.00.00

J721E

In multi-region mode with more then 3 TR per region can’t be used

In multi-region mode for each region less than 3 TR should be used

ETHFW-1843

mcu1_0: Exception in NIMU example in SD card boot

ENET

08.00.00

J721E

Affects SD card boot of mcu1_0 TI-RTOS image

Another timer instance can be used

ETHFW-1845

examples: MAC loopback app test causes abort in debug mode during restart

ENET

08.00.00

J721E

Impacts only ‘debug’ example app

None

PDK-9528

SBL prebuild binary for J721E HS doesn’t work from package

SBL

07.03.00

J721E-HS

None

Cleanup the SBL library and re-build the SBL image for HS. Commands: - Clean sbl_lib_uart (make sbl_lib_uart_clean) - Build for HS (make -sj sbl_uart_img_hs)

PDK-10292

Sciclient Firewall Testapp Fails on HS Device

SCICLIENT

07.03.00

J721E-HS

None

None

2.9.10. Limitations

2.9.10.1. PDK

  • PDK examples do not support SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.

2.9.10.2. ENET

  • lwIP stack integration doesn’t support checksum hardware-offload feature.

  • ICSSG integration with lwIP and NDK is done only for ICSSG Dual-MAC. Driver level support is available for Dual-MAC and Switch.

  • TimeSync PTP integration is done only for ICSSG-Dual MAC.

  • TimeSync is possible only in one MAC port at a time.

  • Different VLAN modes are not supported in Dual-MAC mode (within given ICSSG MAC ports). Both MACs should either be in VLAN aware or VLAN unaware mode.

  • Independent VLAN learning is not supported in Dual-MAC mode.