7.3. Building and Running Memory Benchmarking Configurations

7.3.1. Demo Overview

  • This demo provides a means of measuring the performance of a realistic application where the text of the application is sitting in various memory locations and the data is sitting in On-Chip-Memory RAM (referred to as OCM, OCMC or OCMRAM).

  • The application executes 10 different configurations of the same text varying by data vs. instruction cache intensity. Each test calls 16 separate functions 500 total times in random order.

  • The most instruction intensive example achieves a instruction cache miss rate (ICM/sec) of ~3-4 million per second when run entirely from OCMRAM. This is a rate that we have similarly seen in real-world customer examples.

  • More data instensive tests have more repetitive code, achieving much lower ICM rates.

Application Output

Description

Mem Cpy size    => 100

Size of the memcpy in bytes executed by each task

Exec Time in usec => 2567

Amount of time in microseconds

Iter            => 1

Number of times the test was run

Task calls      => 500

Number of randomly ordered calls to the 16 tasks

Inst Cache miss => 11421

Total instruction cache misses

Inst Cache acc  => 650207

Total instruction cache accesses

num switches    => 1469

Number of total context switches

num instr exec  => 1029260

Total number of executed instructions

ICM/sec         => 4449162

Instruction cache misses per second

INST/sec        => 400958317

Instructions executed per second

7.3.2. Supported Configurations

Core

SOC

Supported Memory Configs (MEM_CONF)

mcu1_0

j721e

ocmc msmc ddr xip

mcu2_0

j721e

ocmc msmc ddr xip

mcu1_0 + mcu2_0

j721e

ocmc ddr xip

mcu1_0

j7200

ocmc msmc ddr xip

mcu2_0

j7200

ocmc msmc ddr xip

mcu1_0 + mcu2_0

j7200

ocmc ddr xip

mcu1_0

j721s2

ocmc msmc ddr xip

mcu2_0

j721s2

ocmc msmc ddr xip

mcu1_0 + mcu2_0

j721s2

ocmc ddr xip

mcu1_0

j784s4

ocmc msmc ddr xip

mcu2_0

j784s4

ocmc msmc ddr xip

mcu1_0 + mcu2_0

j784s4

ocmc ddr xip

7.3.3. How to Build

  • Go to the build folder <pdk_install_path>/packages/ti/build/ and execute the below instructions

7.3.3.1. Single Core Memory Benchmarking

  • Following are the single core memory benchmarking apps that are supported:

  1. OCMC Single Core Benchmarking

  2. XIP Single Core Benchmarking

  3. MSMC Single Core Benchmarking

  4. DDR Single Core Benchmarking

    OCMC Single Core Benchmarking

    • Build the bootloader using below command

      • make sbl_cust_rat_main_ocm_img BOARD=<board_name> CORE=<core_name> -sj

    • Build the application using below command

      • make ocmc_memory_benchmarking_app_freertos BOARD=<board_name> CORE=<core_name> -sj

    • Note : sbl_cust_rat_main_ocm_img is similar to sbl_cust_img but main ocmc memory is rat mapped to DDR. And for j721e main OCMC is located at 32 bit address so rat mapping is not needed.

    • Note : Use sbl_cust_img for j721e_evm

    XIP Single Core Benchmarking

    • Build the bootloader using below command

      • make sbl_xip_img BOARD=<board_name> CORE=<core_name> -sj

      • Note : If you are benchmarking for 133 MHz OSPI frequecy then use sbl_xip_133_img

    • Build the application using below command

      • make xip_memory_benchmarking_app_freertos BOARD=<board_name> CORE=<core_name> -sj

    MSMC Single Core Benchmarking

    • Build the bootloader using below command

      • make sbl_cust_img BOARD=<board_name> CORE=<core_name> -sj

    • Note : If you are benchmarking mcu2_0 application on j7200/j721s2/j784s4 use sbl_cust_rat_main_ocm_img since main OCMC for j7200/j721s2/j784s4 is RAT mapped to DDR

    • Build the application using below command

      • make msmc_memory_benchmarking_app_freertos BOARD=<board_name> CORE=<core_name> -sj

    DDR Single Core Benchmarking

    • Build the bootloader using below command

      • make sbl_cust_img BOARD=<board_name> CORE=<core_name> -sj

    • Note : If you are benchmarking mcu2_0 application on j7200/j721s2/j784s4 use sbl_cust_rat_main_ocm_img since main OCMC for j7200/j721s2/j784s4 is RAT mapped to DDR

    • Build the application using below command

      • make ddr_memory_benchmarking_app_freertos BOARD=<board_name> CORE=<core_name> -sj

7.3.3.2. Multicore Core Benchmarking

  • To build multicore benchmarking apps, dual core benchmarking apps needs to built on mcu1_0 and mcu2_0.

  • Following are the multicore memory benchmarking apps that are supported:

  1. OCMC Multicore Core Benchmarking

  2. XIP Multicore Core Benchmarking

  3. MSMC Multicore Core Benchmarking

  4. DDR Multicore Core Benchmarking

    OCMC Multicore Core Benchmarking

    • Build the bootloader using below command

      • make sbl_cust_rat_main_ocm_img BOARD=<board_name> CORE=<core_name> -sj

      • Note : Use sbl_cust_img for j721e_evm since main OCMC is located at 32 bit address and doesn’t need RAT mapping

    • Build dual core application first and then multicore application using below commands

      • make ocmc_dual_core_memory_benchmarking_app_freertos CORE=mcu1_0 BOARD=<board_name> -sj

      • make ocmc_dual_core_memory_benchmarking_app_freertos CORE=mcu2_0 BOARD=<board_name> -sj

      • make ocmc_multicore_memory_benchmarking_app_freertos CORE=mcu2_0 BOARD=<board_name> -sj

    XIP Multicore Core Benchmarking

    • Build the bootloader

      • make sbl_xip_img BOARD=<board_name> CORE=mcu1_0 -sj

      • Note : If you are benchmarking for 133 MHz OSPI frequecy then use sbl_xip_133_img

    • Build dual core application first and then multicore application using below commands

      • make xip_dual_core_memory_benchmarking_app_freertos CORE=mcu1_0 BOARD=<board_name> -sj

      • make xip_dual_core_memory_benchmarking_app_freertos CORE=mcu2_0 BOARD=<board_name> -sj

      • make xip_multicore_memory_benchmarking_app_freertos CORE=mcu2_0 BOARD=<board_name> -sj

    DDR Multicore Core Benchmarking

    • Build the bootloader using below command

      • make sbl_cust_rat_main_ocm_img BOARD=<board_name> CORE=<core_name> -sj

      • Note : Use sbl_cust_img for j721e_evm since main OCMC is located at 32 bit address and doesn’t need RAT mapping

    • Build dual core application first and then multicore application using below commands

      • make xip_dual_core_memory_benchmarking_app_freertos CORE=mcu1_0 BOARD=<board_name> -sj

      • make xip_dual_core_memory_benchmarking_app_freertos CORE=mcu2_0 BOARD=<board_name> -sj

      • make xip_multicore_memory_benchmarking_app_freertos CORE=mcu2_0 BOARD=<board_name> -sj

7.3.4. How to Run (Linux Host Machine Assumed)

7.3.4.1. Via OSPI

  • Put the EVM in UART boot mode

  • Download and install the uniflashOSPI_FREQ_133 tool

  • For mcu1_0: Attach USB cable to UART Terminal 1 of the MCU UART port (sudo minicom -D /dev/ttyUSB*) to see the output of the application

  • For mcu2_0: Attach USB cable to UART Terminal 0 of the Main UART port (sudo minicom -D /dev/ttyUSB*) to see the output of the application

  • Power on the EVM in OSPI boot mode after flashing the below images in UART boot mode

  1. OCMC Single Core Benchmarking

  2. XIP Single Core Benchmarking

  3. MSMC Single Core Benchmarking

  4. DDR Single Core Benchmarking

  5. OCMC Multicore Core Benchmarking

  6. XIP Multicore Core Benchmarking

  7. MSMC Multicore Core Benchmarking

  8. DDR Multicore Core Benchmarking

    OCMC Single Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/binary/ocmc_memory_benchmarking_app_freertos/bin/<board_name>/ocmc_memory_benchmarking_app_<core_name>_freertos_release.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_cust_rat_main_ocm_img for benchmarking applications on mcu2_0

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

    XIP Single Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/xip/bin/sbl_xip_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/binary/xip_memory_benchmarking_app_freertos/bin/<board_name>/xip_memory_benchmarking_app_<core_name>_freertos_release.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/binary/xip_memory_benchmarking_app_freertos/bin/<board_name>/xip_memory_benchmarking_app_<core_name>_freertos_release.appimage_xip -d 3

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_xip_133_img if benchmarking for OSPI 133 MHz

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

    MSMC Single Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/binary/msmc_memory_benchmarking_app_freertos/bin/<board_name>/msmc_memory_benchmarking_app_<core_name>_freertos_release.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_cust_rat_main_ocm_img for benchmarking applications on mcu2_0

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

    DDR Single Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_cust_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/binary/ddr_memory_benchmarking_app_freertos/bin/<board_name>/ddr_memory_benchmarking_app_<core_name>_freertos_release.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_cust_rat_main_ocm_img for benchmarking applications on mcu2_0

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

    OCMC Multicore Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_cust_rat_main_ocm_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/ocmc_multicore_memory_benchmarking_app_freertos/bin/<board_name>/ocmc_multicore_memory_benchmarking_app_freertos.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_cust_img for j721e_evm

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

    XIP Multicore Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_xip_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/xip_multicore_memory_benchmarking_app_freertos/bin/<board_name>/xip_multicore_memory_benchmarking_app_freertos.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/xip_multicore_memory_benchmarking_app_freertos/bin/<board_name>/xip_multicore_memory_benchmarking_app_freertos.appimage_xip -d 3

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_xip_133_img if benchmarking for OSPI 133 MHz freqency

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

    DDR Multicore Core Benchmarking

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <uniflash_install_directory>/processors/FlashWriter/<board_name>/uart_<board_name>_flash_programmer_release.tiimage -i 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/boot/sbl/binary/<board_name>/cust/bin/sbl_cust_rat_main_ocm_img_mcu1_0_release.tiimage -d 3 -o 0

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/drv/sciclient/soc/V*/tifs.bin -d 3 -o 80000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/binary/ddr_multicore_memory_benchmarking_app_freertos/bin/<board_name>/ddr_multicore_memory_benchmarking_app_freertos.appimage -d 3 -o 100000

    • sudo <uniflash_install_directory>/dslite.sh --mode processors -c /dev/ttyUSB* -f <pdk_install_path>/packages/ti/board/src/flash/nor/ospi/nor_spi_patterns.bin -d 3 -o 3FC0000

    • Note : Flash sbl_cust_img for j721e_evm

    • Note : Flash nor_spy_pattern at 0x3FE0000 for j721e_evm

7.3.5. Addtional Notes

  • When building the sbl_cust_img, if you would like to see more verbose output, you may change the flag in /packages/ti/boot/sbl/sbl_component.mk CUST_SBL_TEST_FLAGS called “-DSBL_LOG_LEVEL” from 1 to 3. However, this will cause the cache miss rate to increase substantially and performance times to decrease. So only use this for debugging reasons, but not for actual performance benchmarking.

  • A “Mem Cpy size” of 0, means that no memcpy occurred and the application test was strictly instructions-based.

  • When building different memory configurations, it is always a good idea to do a clean build. Some consecutive builds will work, but some also will not, so it is best to be safe by building cleanly.

  • ttyUSB* is used as the MCU UART terminal and ttyUSB0 is used as Main UART Terminal. This might not always be the case, please check the same after connecting to the UART.