2.3. Release Notes - 08_05_00

2.3.1. Introduction

This release notes provides important information that will assist you in using the PDK software package for the Jacinto family of devices. This document provides the product information and known issues that are specific to the PDK software package.

New features added / supported is listed below and defects fixed are highlighted in Fixed Issues. Also please check Upgrade and Compatibility for backward compatibility

2.3.2. What’s New

ID

Description

Module

Supported Platforms

PDK-10979

UDMA : Support for scatter-gather list

UDMA

J721E, J784S4

ETHFW-1912

ENET LLD : support DMA Scatter gather TX functionality

ENET

J721E

ETHFW-1953

CPSW: lwIP: Checksum offload support

ENET

J721E

ETHFW-2027

mdio: MDIO CDC errata (i2329) workaround implementation (CPSW)

ENET

J721E

2.3.3. Upgrade and Compatibility

2.3.3.1. CSL

  • CSL ARM R5 Cache operation APIs now accepts a third argument wait, to specify if the function should wait or not until the operation is completed.

    Old

    New

    CSL_armR5CacheWb(const void * addr, int32_t size)

    CSL_armR5CacheWb(const void * addr, int32_t size, bool wait)

    CSL_armR5CacheWbInv(const void * addr, int32_t size)

    CSL_armR5CacheWbInv(const void * addr, int32_t size, bool wait)

    CSL_armR5CacheInv(const void * addr, int32_t size)

    CSL_armR5CacheInv(const void * addr, int32_t size, bool wait)

  • Added new API CSL_armR5CacheWait. This can be used to wait for the previous cache wb/wbInv/inv operation to complete.

  • For performance optimizations, following CSL cache line operation functions will not invoke memory barrier instructions. Instead end user is supposed to handle the same after updating all the required cache lines.

    1. CSL_armR5CacheInvalidateDcacheMva

    2. CSL_armR5CacheCleanDcacheMva

2.3.3.2. OSAL

  • taskFxn paramater for TaskP_Create is updated from type ‘void*’ to function pointer of type TaskP_Fxn

    • i.e, TaskP_create expects a function pointer of prototype

      void ( * TaskP_Fxn )( void *arg0, void *arg1 )
      
  • name param in TaskP_Params is updated from type uint8_t * to const char *

  • CycleprofilerP_getTimeStamp does not check for R5F PMU counter overflow and refresh the PMU counter higher bits.

    • In case of FreeRTOS, OS tick timer handles this internally by periodically checking for R5F PMU counter overflow and refresh the higher bits of PMU counter in the event of any overflow.

    • In SafeRTOS and Baremetal, this is not handled by default.

    • A new API, CycleprofilerP_refreshCounter is added to check for R5F PMU counter overflow and refresh the higher bits of PMU counter in the event of any overflow.

    • Baremetal/SafeRTOS applications can periodically invoke the new API CycleprofilerP_refreshCounter to handle R5F PMU counter overflow.

2.3.3.3. VHWA

MSC
  • VHWA_M2M_MSC_MAX_INPUT_BUFF macro is removed and instead a new macro VHWA_M2M_MSC_MAX_IN_CHANNEL is added.

  • Following parameters in Vhwa_M2mMscSl2AllocPrms structure is updated from a single dimensional array of size VHWA_M2M_MSC_MAX_INPUT_BUFF to a multi-dimensional array of size VHWA_M2M_MSC_MAX_INST x VHWA_M2M_MSC_MAX_IN_CHANNEL

    1. maxInWidth

    2. inCcsf

    3. inBuffDepth

    • Applications should update the initialization accordingly.

  • isInterleaveFormat parameter which was earlier present in CSL_MscConfig structure is now moved to Msc_ScConfig in include/msc_cfg.h

    • Applications should update the initialization accordingly.

2.3.3.4. Sciclient / TIFS

  • SYSFW/TIFS have added new PSIL host id verification check. Due to this RM PSIL messages from mcu1_0 should use MSG forwarding instead of sending the message to TIFS directly.

    • mcu1_0 will always be in secure mode when trying to send the message to TIFS directly, to avoid self blocking. And all the BoardCfg RM entries for mcu1_0 are for default non-secure host id. Hence for this case, the new PSIL host id verification will fail.

    • By using MSG forwarding, it retains the host id information of the non-secure/secure mode of mcu1_0. Setting forwarding ensures that the mcu1_0 uses the DM2DMSC secure proxy threads. NOTE: Forwarding always leads to forced polling.

    • For all other default base-port and security messages, mcu1_0 can be in secure mode and send the message to TIFS directly.

2.3.3.5. CSI

  • App can select the source CSIRX instance to re-transmit to a specific CSITX instance using newly added lpbkCsiRxInst parameter in Csitx_InstCfg structure.

  • Added a new parameter enableStrm in Csirx_CreateParams. Previously all supported streams were enabled by default, now this info should be provided by the application.

2.3.3.6. SBL

  • Migrated boot app (a tertiary boot loader) from MCUSW to PDK. This app can be used to boot any HLOS like QNX, Linux, etc. More details on BootApp migration at Boot App

2.3.4. Device Support

  • J721E SR1.1, J721E-HS SR1.1 (BOARD=j721e_evm)

  • Associated TIFS versions:

    TIFS name

    J721E SR revision

    tifs.bin

    SR1.0 & SR1.1 GP

    tifs-hs-enc.bin

    SR1.0 HS

    tifs-sr1.1-hs-enc.bin

    SR1.1 HS

2.3.5. Validation Information

For details on the validated examples refer to the platform specific test report available here.

2.3.6. Tool Chain Information

Component

Version

FreeRTOS Kernel

10.5.1

lwIP stack

2.1.2

lwIP-contrib

2.1.0

TI ARM CLANG

1.3.0.LTS

PRU code generation tools

2.3.3

GCC ARM code generation tools

ARCH64 9.2-2019.12

CGT XML Processing Scripts

2.61.00

System Analyzer (UIA Target)

2_30_01_02

Component

Version

TI C6x code generation tools

8.3.7

TI C7x code generation tools

3.0.0.STS

2.3.7. Change Request

Refer to monthly roadmap slides for changes in the planned features

2.3.8. Fixed Issues

ID

Head Line

Module

Affected Versions

Affected Platforms

PDK-8448

SBL SMP multicore boot test fails with SYSFW rearch

SBL

07.01.00

J721E-HS, J7200-HS

PDK-9528

SBL prebuild binary for J721E HS doesn’t work from package

SBL

07.03.00

J721E-HS

PDK-11085

SPI instance should be decided by SPI driver and not Board Module

OSPI

08.01.00

J721E, J7200

PDK-11240

keywriter: smek gets generated even when argument not specified

Security

08.01.00

J721E, J7200

PDK-11237

CSI-Rx UT hangs when run on mcu2_0

CSI2RX

08.02.00

J721E, J721S2

PDK-11762

Remove MCU Only mode demo code from MCUSW Boot App

LPM

08.02.00

J721E

PDK-12015

SBL: MCU2_0 or MCU3_0 cannot be booted in LockStep mode

SBL

08.02.00

J721E, J7200, J721S2, J784S4

PDK-12065

[CSIRX]: RAW12 packed output format is not working

CSI2RX

08.02.00

J721E, J721S2, J784S4

PDK-12080

taskFxn parameter is not pointer to function in TaskP_create

OSAL

08.02.00

J721E, J7200, J721S2, J784S4

PDK-12081

UART performance issues in polling mode

UART

08.02.00

J721E, J7200, J721S2, J784S4

PDK-12082

[OSAL]: Incorrect type for TaskP_Params.name variable

OSAL

08.02.00

J721E, J7200, J721S2, J784S4

PDK-12107

DM: UART Traces are not working with Linux SDK

PM

08.02.00

J721E, J7200

PDK-12154

SBL: HS boot flow should unlock ROM firewalls

SBL

08.02.00

J721E

PDK-12164

Incorrect DDR End Address with ECC enabled

BOARD

08.02.00

J721E, J7200, J721S2, J784S4

PDK-12194

Re-transmission should be enabled by default in CSL MCAN application

CSL

08.02.00

J721E, J7200, J721S2, J784S4

PDK-12204

Incorrect parameter check in Dss_m2mDrvDispPipeCfgChk API

DSS

08.02.00

J721E

PDK-12210

[CSIRX]: Incorrect powerup sequence

CSI2RX

08.04.00

J721E, J721S2, J784S4

PDK-12214

Fix event manager pipe assignment for mutliple pipe scenario

DSS

08.04.00

J721E

PDK-12218

[CSL-R5F] Incorrect usage of DMB and DSB for cache operations

CSL

08.04.00

J721E, J7200, J721S2, J784S4

PDK-12234

IPC RPMessage_recv() timeout issue

IPC

08.04.00

J721E, J7200, J721S2, J784S4

PDK-12239

CSC config get over-written for DSS and DSS_M2M

DSS

08.04.00

J721E

PDK-12248

Wrong variable name in makerules_spec documentation

COMMON

08.04.00

J721E, J7200, J721S2, J784S4

ETHFW-2029

Enet: SGMII TX/RX not enabled at 100Mbps

ENET

08.04.00

J721E, J7200, J784S4

2.3.9. Known Issues

ID

Head Line

Module

Reported in Release

Affected Platforms

Impact

Workaround in this release

PDK-6975

Pulsar (R5F) : High priority interrupt is missed by VIM

CSL, OSAL

07.00.00

J721E, J7200

Baremetal implementation is pending

Use RTOS instead of baremetal

PDK-9676

UART : Potential interrupt storm

UART

07.02.00

J7200, J721E

Error interrupt resulting in hang.

None

PDK-9696

[SPI] DMA mode does not work for SPI5

McSPI

07.01.00

J721E

Cannot use DMA with SPI5

Disable DMA for SPI5 OR use another instance of SPI

PDK-9571

[SPI] Transfer stalls when transfer length is not multiple of FIFO length in DMA mode

McSPI

07.02.00

J721E

Cannot transfer data if data size is not multiple of FIFO length in DMA mode

Use transfer size in multiple of FIFO length

PDK-8300

UDMA MCU NAVSS Channel Num 5 is not functional, when booting the application using the SBL bootloader.

UDMA

07.01.00

J721E

Low Impact. UDMA MCU NAVSS Channel 5 can’t be used when booting the application using the SBL bootloader.

Use any other channel. In the defaultBoardCfg Channel no. 5 is not used. The issue will be seen only when the boardcfg is updated to use channel 5.

PDK-6789

MCU/Main NAVSS UDMA memcpy from L2SRAM fails

UDMA

07.00.00

J721E

Transfer works fine when source buffer, destination buffer and TRPD buffers are in L2SRAM. The issue happens only when the ring memory is in L2SRAM location

Use ring memory from non-L2SRAM location

PDK-5228

Output mismatch when each region requiring 3 TRs

VHWA

01.00.00

J721E

In multi-region mode with more then 3 TR per region can’t be used

In multi-region mode for each region less than 3 TR should be used

PDK-10292

Sciclient Firewall Testapp Fails on HS Device

SCICLIENT

07.03.00

J721E-HS

None

None

PDK-10925

IPC Performance Test hangs after loading the binary

IPC

08.01.00

J721E, J7200

The app won’t work for this release

None

PDK-11457

MCU Only Mode: IPC attachment with remote cores fail

LPM

08.02.00

J721E

None

None

PDK-11458

MCU Only Mode - Linux boot fails on A72 core

LPM

08.02.00

J721E

None

None

PDK-11854

USART: Spurious DMA Interrupts

UART

08.04.00

J721E, J7200, J721S2

None

None

PDK-11973

USART: Erroneous clear/trigger of timeout interrupt

UART

08.02.00

J721E, J7200, J721S2

None

None

PDK-12023

Heap OSAL hangs if previous allocation has buffer overflow

OSAL

08.02.00

J721E, J721S2

None

None

PDK-12060

Main Domain GPIO does not service interrupts

GPIO

08.04.00

J721E, J7200

None

None

PDK-12085

[DSS] HPD Pulse event is not handled in the eDP driver

DSS

08.02.00

J721E, J721S2, J784S4

None

None

PDK-12213

IPC: stack corruption of taskWaiter used in RPMessage_getRemoteEndPt

IPC

08.00.00

J721E, J7200, J721S2, J784S4

None

Make taskWaiter element as global

PDK-12233

SciServer: Multiple definition of Hwi Data

SCICLIENT

08.04.00

J721E, J7200, J721S2, J784S4

None

None

PDK-12241

CSIRX: Incorrect DATA Shift value for RAW8 mode

CSI2RX

08.04.00

J721E, J721S2, J784S4

None

None

PDK-12242

CSIRX: Incorrect Dual Pixel mode for YUV422

CSI2RX

08.04.00

J721E, J721S2, J784S4

None

None

PDK-12243

DSS: rxBuffer range check missing in DP_mailbox

DSS

08.04.00

J721E, J721S2, J784S4

DP sink module should not send message > 1 KB size

None

PDK-12258

MCSPI DMA does not support 48bit address space

MCSPI

08.04.00

J721E, J7200, J721S2, J784S4

MCSPI is limited to 32 bit address space

None

PDK-12327

FreeRTOS taskLoad is not proper

OSAL

08.02.00

J721E, J7200, J721S2, J784S4

Task load calculations could be wrong

None

PDK-12358

Non-supported Sciclient APIs are present in header files

SCICLIENT

08.04.00

J721E, J7200, J721S2, J784S4

None

None

ETHFW-2023

Assertion from EnetMcm_coreAttach API

ENET

08.01.00

J721E, J7200, J784S4

Race condition in MCM cmd handling in ETHFW usecases

None

ETHFW-2084

Cable connect/disconnect can cause CPSW unrecoverable condition

ENET

08.00.00

J721E, J7200, J784S4

Packets will be dropped on the affected MAC port

None. Device reboot is required

2.3.10. Limitations

2.3.10.1. PDK

  • PDK examples do not support SMP mode. Some of examples still support build in SMP mode but these binaries are not supported or validated.

  • TI Clang compiler does not enable O3 optimization level and Thumb2 mode which were enabled by default with TI ARM CGT compiler. This has an impact on driver throughput. E.g. Ethernet performance has reduced by ~20% on J721E

  • For Baremetal and SafeRTOS, in case of usage of CycleprofilerP APIs the R5F PMU counter overflow is not handled by default.

    • Applications can periodically use the CycleprofilerP_refreshCounter to check overflow and refresh the higher bits of the PMU counter.

2.3.10.2. ENET

  • Scatter-gather functionality is currently supported only for packet transmission.

2.3.10.3. SafeRTOS

  • None.